[people/ms/u-boot.git] / include / configs / cm_fx6.h

/*
 * Config file for Compulab CM-FX6 board
 *
 * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/
 *
 * Author: Nikita Kiryanov <nikita@compulab.co.il>
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __CONFIG_CM_FX6_H
#define __CONFIG_CM_FX6_H

#include <asm/arch/imx-regs.h>
#include <config_distro_defaults.h>
#include "mx6_common.h"

/* Machine config */
#define CONFIG_MX6
#define CONFIG_SYS_LITTLE_ENDIAN
#define CONFIG_MACH_TYPE		4273

#ifndef CONFIG_SPL_BUILD
#define CONFIG_CMD_GPIO
#endif

/* Display information on boot */
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO
#define CONFIG_TIMESTAMP

/* CMD */
#include <config_cmd_default.h>
#define CONFIG_CMD_GREPENV
#undef CONFIG_CMD_FLASH
#undef CONFIG_CMD_LOADB
#undef CONFIG_CMD_LOADS
#undef CONFIG_CMD_XIMG
#undef CONFIG_CMD_FPGA
#undef CONFIG_CMD_IMLS

/* MMC */
#define CONFIG_MMC
#define CONFIG_CMD_MMC
#define CONFIG_GENERIC_MMC
#define CONFIG_FSL_ESDHC
#define CONFIG_FSL_USDHC
#define CONFIG_SYS_FSL_USDHC_NUM	3
#define CONFIG_SYS_FSL_ESDHC_ADDR	USDHC2_BASE_ADDR

/* RAM */
#define PHYS_SDRAM_1			MMDC0_ARB_BASE_ADDR
#define PHYS_SDRAM_2			MMDC1_ARB_BASE_ADDR
#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
#define CONFIG_NR_DRAM_BANKS		2
#define CONFIG_SYS_MEMTEST_START	0x10000000
#define CONFIG_SYS_MEMTEST_END		0x10010000
#define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE
#define CONFIG_SYS_INIT_SP_OFFSET \
	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR \
	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)

/* Serial console */
#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE		UART4_BASE
#define CONFIG_BAUDRATE			115200
#define CONFIG_SYS_BAUDRATE_TABLE	{9600, 19200, 38400, 57600, 115200}

/* Shell */
#define CONFIG_SYS_PROMPT	"CM-FX6 # "
#define CONFIG_SYS_CBSIZE	1024
#define CONFIG_SYS_MAXARGS	16
#define CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE
#define CONFIG_SYS_PBSIZE	(CONFIG_SYS_CBSIZE + \
					sizeof(CONFIG_SYS_PROMPT) + 16)

/* SPI flash */
#define CONFIG_SYS_NO_FLASH
#define CONFIG_CMD_SF
#define CONFIG_SF_DEFAULT_BUS		0
#define CONFIG_SF_DEFAULT_CS		0
#define CONFIG_SF_DEFAULT_SPEED		25000000
#define CONFIG_SF_DEFAULT_MODE		(SPI_MODE_0)

/* Environment */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_ENV_IS_IN_SPI_FLASH
#define CONFIG_ENV_SPI_MAX_HZ		CONFIG_SF_DEFAULT_SPEED
#define CONFIG_ENV_SPI_MODE		CONFIG_SF_DEFAULT_MODE
#define CONFIG_ENV_SPI_BUS		CONFIG_SF_DEFAULT_BUS
#define CONFIG_ENV_SPI_CS		CONFIG_SF_DEFAULT_CS
#define CONFIG_ENV_SECT_SIZE		(64 * 1024)
#define CONFIG_ENV_SIZE			(8 * 1024)
#define CONFIG_ENV_OFFSET		(768 * 1024)

#define CONFIG_EXTRA_ENV_SETTINGS \
	"stdin=serial,usbkbd\0" \
	"stdout=serial,vga\0" \
	"stderr=serial,vga\0" \
	"panel=HDMI\0" \
	"autoload=no\0" \
	"kernel=uImage-cm-fx6\0" \
	"script=boot.scr\0" \
	"dtb=cm-fx6.dtb\0" \
	"bootm_low=18000000\0" \
	"loadaddr=0x10800000\0" \
	"fdtaddr=0x11000000\0" \
	"console=ttymxc3,115200\0" \
	"ethprime=FEC0\0" \
	"video_hdmi=mxcfb0:dev=hdmi,1920x1080M-32@50,if=RGB32\0" \
	"video_dvi=mxcfb0:dev=dvi,1280x800M-32@50,if=RGB32\0" \
	"doboot=bootm ${loadaddr}\0" \
	"doloadfdt=false\0" \
	"setboottypez=setenv kernel zImage-cm-fx6;" \
		"setenv doboot bootz ${loadaddr} - ${fdtaddr};" \
		"setenv doloadfdt true;\0" \
	"setboottypem=setenv kernel uImage-cm-fx6;" \
		"setenv doboot bootm ${loadaddr};" \
		"setenv doloadfdt false;\0"\
	"mmcroot=/dev/mmcblk0p2 rw rootwait\0" \
	"sataroot=/dev/sda2 rw rootwait\0" \
	"nandroot=/dev/mtdblock4 rw\0" \
	"nandrootfstype=ubifs\0" \
	"mmcargs=setenv bootargs console=${console} root=${mmcroot} " \
		"${video}\0" \
	"sataargs=setenv bootargs console=${console} root=${sataroot} " \
		"${video}\0" \
	"nandargs=setenv bootargs console=${console} " \
		"root=${nandroot} " \
		"rootfstype=${nandrootfstype} " \
		"${video}\0" \
	"nandboot=if run nandloadkernel; then " \
			"run nandloadfdt;" \
			"run setboottypem;" \
			"run storagebootcmd;" \
			"run setboottypez;" \
			"run storagebootcmd;" \
		"fi;\0" \
	"run_eboot=echo Starting EBOOT ...; "\
		"mmc dev 2 && " \
		"mmc rescan && mmc read 10042000 a 400 && go 10042000\0" \
	"loadscript=load ${storagetype} ${storagedev} ${loadaddr} ${script};\0"\
	"loadkernel=load ${storagetype} ${storagedev} ${loadaddr} ${kernel};\0"\
	"loadfdt=load ${storagetype} ${storagedev} ${fdtaddr} ${dtb};\0" \
	"bootscript=echo Running bootscript from ${storagetype} ...;" \
		   "source ${loadaddr};\0" \
	"nandloadkernel=nand read ${loadaddr} 0 780000;\0" \
	"nandloadfdt=nand read ${fdtaddr} 780000 80000;\0" \
	"setupmmcboot=setenv storagetype mmc; setenv storagedev 2;\0" \
	"setupsataboot=setenv storagetype sata; setenv storagedev 0;\0" \
	"setupnandboot=setenv storagetype nand;\0" \
	"setupusbboot=setenv storagetype usb; setenv storagedev 0;\0" \
	"storagebootcmd=echo Booting from ${storagetype} ...;" \
			"run ${storagetype}args; run doboot;\0" \
	"trybootk=if run loadkernel; then " \
		"if ${doloadfdt}; then " \
			"run loadfdt;" \
		"fi;" \
		"run storagebootcmd;" \
		"fi;\0" \
	"trybootsmz=if run loadscript; then " \
			"run bootscript;" \
		"fi;" \
		"run setboottypem;" \
		"run trybootk;" \
		"run setboottypez;" \
		"run trybootk;\0"

#define CONFIG_BOOTCOMMAND \
	"run setupmmcboot;" \
	"mmc dev ${storagedev};" \
	"if mmc rescan; then " \
		"run trybootsmz;" \
	"fi;" \
	"run setupusbboot;" \
	"if usb start; then "\
		"if run loadscript; then " \
			"run bootscript;" \
		"fi;" \
	"fi;" \
	"run setupsataboot;" \
	"if sata init; then " \
		"run trybootsmz;" \
	"fi;" \
	"run setupnandboot;" \
	"run nandboot;"

#define CONFIG_PREBOOT		"usb start"

/* SPI */
#define CONFIG_SPI
#define CONFIG_MXC_SPI
#define CONFIG_SPI_FLASH
#define CONFIG_SPI_FLASH_ATMEL
#define CONFIG_SPI_FLASH_EON
#define CONFIG_SPI_FLASH_GIGADEVICE
#define CONFIG_SPI_FLASH_MACRONIX
#define CONFIG_SPI_FLASH_SPANSION
#define CONFIG_SPI_FLASH_STMICRO
#define CONFIG_SPI_FLASH_SST
#define CONFIG_SPI_FLASH_WINBOND

/* NAND */
#ifndef CONFIG_SPL_BUILD
#define CONFIG_CMD_NAND
#define CONFIG_SYS_NAND_BASE		0x40000000
#define CONFIG_SYS_NAND_MAX_CHIPS	1
#define CONFIG_SYS_MAX_NAND_DEVICE	1
#define CONFIG_NAND_MXS
#define CONFIG_SYS_NAND_ONFI_DETECTION
/* APBH DMA is required for NAND support */
#define CONFIG_APBH_DMA
#define CONFIG_APBH_DMA_BURST
#define CONFIG_APBH_DMA_BURST8
#endif

/* Ethernet */
#define CONFIG_FEC_MXC
#define CONFIG_FEC_MXC_PHYADDR		0
#define CONFIG_FEC_XCV_TYPE		RGMII
#define IMX_FEC_BASE			ENET_BASE_ADDR
#define CONFIG_PHYLIB
#define CONFIG_PHY_ATHEROS
#define CONFIG_MII
#define CONFIG_ETHPRIME			"FEC0"
#define CONFIG_ARP_TIMEOUT		200UL
#define CONFIG_NET_RETRY_COUNT		5

/* USB */
#define CONFIG_CMD_USB
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_MX6
#define CONFIG_USB_STORAGE
#define CONFIG_MXC_USB_PORTSC		(PORT_PTS_UTMI | PORT_PTS_PTW)
#define CONFIG_MXC_USB_FLAGS		0
#define CONFIG_USB_MAX_CONTROLLER_COUNT	2
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET	/* For OTG port */
#define CONFIG_USB_KEYBOARD
#define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP
#define CONFIG_SYS_STDIO_DEREGISTER

/* I2C */
#define CONFIG_CMD_I2C
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
#define CONFIG_SYS_I2C_SPEED		100000
#define CONFIG_SYS_MXC_I2C3_SPEED	400000

#define CONFIG_SYS_I2C_EEPROM_ADDR	0x50
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	1
#define CONFIG_SYS_I2C_EEPROM_BUS	2

/* SATA */
#define CONFIG_CMD_SATA
#define CONFIG_SYS_SATA_MAX_DEVICE	1
#define CONFIG_LIBATA
#define CONFIG_LBA48
#define CONFIG_DWC_AHSATA
#define CONFIG_DWC_AHSATA_PORT_ID	0
#define CONFIG_DWC_AHSATA_BASE_ADDR	SATA_ARB_BASE_ADDR

/* GPIO */
#define CONFIG_MXC_GPIO

/* Boot */
#define CONFIG_ZERO_BOOTDELAY_CHECK
#define CONFIG_LOADADDR			0x10800000
#define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
#define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */
#define CONFIG_SYS_BOOTMAPSZ	        (8 << 20)
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_REVISION_TAG
#define CONFIG_SERIAL_TAG

/* misc */
#define CONFIG_SYS_GENERIC_BOARD
#define CONFIG_STACKSIZE			(128 * 1024)
#define CONFIG_SYS_MALLOC_LEN			(10 * 1024 * 1024)
#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	800 /* 400 KB */
#define CONFIG_OF_BOARD_SETUP

/* SPL */
#include "imx6_spl.h"
#define CONFIG_SPL_BOARD_INIT
#define CONFIG_SPL_MMC_SUPPORT
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	0x80 /* offset 64 kb */
#define CONFIG_SYS_MONITOR_LEN	(CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS / 2 * 1024)
#define CONFIG_SPL_SPI_SUPPORT
#define CONFIG_SPL_SPI_FLASH_SUPPORT
#define CONFIG_SYS_SPI_U_BOOT_OFFS	(64 * 1024)
#define CONFIG_SPL_SPI_LOAD

/* Display */
#define CONFIG_VIDEO
#define CONFIG_VIDEO_IPUV3
#define CONFIG_IPUV3_CLK          260000000
#define CONFIG_IMX_HDMI
#define CONFIG_IMX_VIDEO_SKIP
#define CONFIG_CFB_CONSOLE
#define CONFIG_VGA_AS_SINGLE_DEVICE
#define CONFIG_SYS_CONSOLE_IS_IN_ENV
#define CONFIG_CONSOLE_MUX
#define CONFIG_VIDEO_SW_CURSOR

#define CONFIG_SPLASH_SCREEN
#define CONFIG_SPLASH_SOURCE
#define CONFIG_CMD_BMP
#define CONFIG_VIDEO_BMP_RLE8

#define CONFIG_VIDEO_LOGO
#define CONFIG_VIDEO_BMP_LOGO

#endif	/* __CONFIG_CM_FX6_H */
Commit	Line	Data
e32028a7 NK	1	/*
	2	* Config file for Compulab CM-FX6 board
	3	*
	4	* Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/
	5	*
	6	* Author: Nikita Kiryanov <nikita@compulab.co.il>
	7	*
	8	* SPDX-License-Identifier: GPL-2.0+
	9	*/
	10
	11	#ifndef __CONFIG_CM_FX6_H
	12	#define __CONFIG_CM_FX6_H
	13
	14	#include <asm/arch/imx-regs.h>
	15	#include <config_distro_defaults.h>
	16	#include "mx6_common.h"
	17
	18	/* Machine config */
	19	#define CONFIG_MX6
	20	#define CONFIG_SYS_LITTLE_ENDIAN
	21	#define CONFIG_MACH_TYPE 4273
e32028a7	22
3f0e935f	23	#ifndef CONFIG_SPL_BUILD
3f0e935f	24	#define CONFIG_CMD_GPIO
3f0e935f SG	25	#endif
3f0e935f SG	26
e32028a7 NK	27	/* Display information on boot */
	28	#define CONFIG_DISPLAY_CPUINFO
	29	#define CONFIG_DISPLAY_BOARDINFO
	30	#define CONFIG_TIMESTAMP
	31
	32	/* CMD */
	33	#include <config_cmd_default.h>
	34	#define CONFIG_CMD_GREPENV
	35	#undef CONFIG_CMD_FLASH
	36	#undef CONFIG_CMD_LOADB
	37	#undef CONFIG_CMD_LOADS
	38	#undef CONFIG_CMD_XIMG
	39	#undef CONFIG_CMD_FPGA
	40	#undef CONFIG_CMD_IMLS
e32028a7 NK	41
	42	/* MMC */
	43	#define CONFIG_MMC
	44	#define CONFIG_CMD_MMC
	45	#define CONFIG_GENERIC_MMC
	46	#define CONFIG_FSL_ESDHC
	47	#define CONFIG_FSL_USDHC
	48	#define CONFIG_SYS_FSL_USDHC_NUM 3
	49	#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR
	50
	51	/* RAM */
	52	#define PHYS_SDRAM_1 MMDC0_ARB_BASE_ADDR
	53	#define PHYS_SDRAM_2 MMDC1_ARB_BASE_ADDR
	54	#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
	55	#define CONFIG_NR_DRAM_BANKS 2
	56	#define CONFIG_SYS_MEMTEST_START 0x10000000
	57	#define CONFIG_SYS_MEMTEST_END 0x10010000
	58	#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
	59	#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
	60	#define CONFIG_SYS_INIT_SP_OFFSET \
	61	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
	62	#define CONFIG_SYS_INIT_SP_ADDR \
	63	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
	64
	65	/* Serial console */
	66	#define CONFIG_MXC_UART
	67	#define CONFIG_MXC_UART_BASE UART4_BASE
	68	#define CONFIG_BAUDRATE 115200
	69	#define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200}
	70
	71	/* Shell */
	72	#define CONFIG_SYS_PROMPT "CM-FX6 # "
	73	#define CONFIG_SYS_CBSIZE 1024
	74	#define CONFIG_SYS_MAXARGS 16
	75	#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
	76	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
	77	sizeof(CONFIG_SYS_PROMPT) + 16)
	78
	79	/* SPI flash */
	80	#define CONFIG_SYS_NO_FLASH
	81	#define CONFIG_CMD_SF
	82	#define CONFIG_SF_DEFAULT_BUS 0
	83	#define CONFIG_SF_DEFAULT_CS 0
	84	#define CONFIG_SF_DEFAULT_SPEED 25000000
	85	#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
	86
	87	/* Environment */
	88	#define CONFIG_ENV_OVERWRITE
	89	#define CONFIG_ENV_IS_IN_SPI_FLASH
	90	#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
	91	#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
	92	#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
	93	#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
	94	#define CONFIG_ENV_SECT_SIZE (64 * 1024)
	95	#define CONFIG_ENV_SIZE (8 * 1024)
	96	#define CONFIG_ENV_OFFSET (768 * 1024)
	97
	98	#define CONFIG_EXTRA_ENV_SETTINGS \
1c2e5292	99	"stdin=serial,usbkbd\0" \
deb94d61 NK	100	"stdout=serial,vga\0" \
	101	"stderr=serial,vga\0" \
	102	"panel=HDMI\0" \
e32028a7	103	"autoload=no\0" \
508a6ede NK	104	"kernel=uImage-cm-fx6\0" \
	105	"script=boot.scr\0" \
	106	"dtb=cm-fx6.dtb\0" \
	107	"bootm_low=18000000\0" \
e32028a7 NK	108	"loadaddr=0x10800000\0" \
	109	"fdtaddr=0x11000000\0" \
	110	"console=ttymxc3,115200\0" \
	111	"ethprime=FEC0\0" \
e32028a7 NK	112	"video_hdmi=mxcfb0:dev=hdmi,1920x1080M-32@50,if=RGB32\0" \
e32028a7 NK	113	"video_dvi=mxcfb0:dev=dvi,1280x800M-32@50,if=RGB32\0" \
e32028a7	114	"doboot=bootm ${loadaddr}\0" \
508a6ede	115	"doloadfdt=false\0" \
e32028a7 NK	116	"setboottypez=setenv kernel zImage-cm-fx6;" \
e32028a7 NK	117	"setenv doboot bootz ${loadaddr} - ${fdtaddr};" \
508a6ede	118	"setenv doloadfdt true;\0" \
e32028a7 NK	119	"setboottypem=setenv kernel uImage-cm-fx6;" \
e32028a7 NK	120	"setenv doboot bootm ${loadaddr};" \
508a6ede	121	"setenv doloadfdt false;\0"\
e32028a7	122	"mmcroot=/dev/mmcblk0p2 rw rootwait\0" \
206f38f7	123	"sataroot=/dev/sda2 rw rootwait\0" \
a6b0652b NK	124	"nandroot=/dev/mtdblock4 rw\0" \
a6b0652b NK	125	"nandrootfstype=ubifs\0" \
508a6ede NK	126	"mmcargs=setenv bootargs console=${console} root=${mmcroot} " \
	127	"${video}\0" \
	128	"sataargs=setenv bootargs console=${console} root=${sataroot} " \
	129	"${video}\0" \
a6b0652b NK	130	"nandargs=setenv bootargs console=${console} " \
	131	"root=${nandroot} " \
	132	"rootfstype=${nandrootfstype} " \
	133	"${video}\0" \
508a6ede	134	"nandboot=if run nandloadkernel; then " \
a6b0652b	135	"run nandloadfdt;" \
508a6ede NK	136	"run setboottypem;" \
	137	"run storagebootcmd;" \
	138	"run setboottypez;" \
	139	"run storagebootcmd;" \
	140	"fi;\0" \
	141	"run_eboot=echo Starting EBOOT ...; "\
	142	"mmc dev 2 && " \
	143	"mmc rescan && mmc read 10042000 a 400 && go 10042000\0" \
	144	"loadscript=load ${storagetype} ${storagedev} ${loadaddr} ${script};\0"\
	145	"loadkernel=load ${storagetype} ${storagedev} ${loadaddr} ${kernel};\0"\
	146	"loadfdt=load ${storagetype} ${storagedev} ${fdtaddr} ${dtb};\0" \
	147	"bootscript=echo Running bootscript from ${storagetype} ...;" \
	148	"source ${loadaddr};\0" \
	149	"nandloadkernel=nand read ${loadaddr} 0 780000;\0" \
	150	"nandloadfdt=nand read ${fdtaddr} 780000 80000;\0" \
	151	"setupmmcboot=setenv storagetype mmc; setenv storagedev 2;\0" \
	152	"setupsataboot=setenv storagetype sata; setenv storagedev 0;\0" \
	153	"setupnandboot=setenv storagetype nand;\0" \
	154	"setupusbboot=setenv storagetype usb; setenv storagedev 0;\0" \
	155	"storagebootcmd=echo Booting from ${storagetype} ...;" \
	156	"run ${storagetype}args; run doboot;\0" \
	157	"trybootk=if run loadkernel; then " \
	158	"if ${doloadfdt}; then " \
	159	"run loadfdt;" \
a6b0652b	160	"fi;" \
508a6ede NK	161	"run storagebootcmd;" \
	162	"fi;\0" \
	163	"trybootsmz=if run loadscript; then " \
	164	"run bootscript;" \
206f38f7	165	"fi;" \
508a6ede NK	166	"run setboottypem;" \
	167	"run trybootk;" \
	168	"run setboottypez;" \
	169	"run trybootk;\0"
e32028a7 NK	170
e32028a7 NK	171	#define CONFIG_BOOTCOMMAND \
508a6ede NK	172	"run setupmmcboot;" \
	173	"mmc dev ${storagedev};" \
	174	"if mmc rescan; then " \
	175	"run trybootsmz;" \
	176	"fi;" \
	177	"run setupusbboot;" \
	178	"if usb start; then "\
	179	"if run loadscript; then " \
	180	"run bootscript;" \
	181	"fi;" \
	182	"fi;" \
	183	"run setupsataboot;" \
	184	"if sata init; then " \
	185	"run trybootsmz;" \
	186	"fi;" \
	187	"run setupnandboot;" \
	188	"run nandboot;"
e32028a7	189
1c2e5292 NK	190	#define CONFIG_PREBOOT "usb start"
1c2e5292 NK	191
e32028a7 NK	192	/* SPI */
	193	#define CONFIG_SPI
	194	#define CONFIG_MXC_SPI
	195	#define CONFIG_SPI_FLASH
	196	#define CONFIG_SPI_FLASH_ATMEL
	197	#define CONFIG_SPI_FLASH_EON
	198	#define CONFIG_SPI_FLASH_GIGADEVICE
	199	#define CONFIG_SPI_FLASH_MACRONIX
	200	#define CONFIG_SPI_FLASH_SPANSION
	201	#define CONFIG_SPI_FLASH_STMICRO
	202	#define CONFIG_SPI_FLASH_SST
	203	#define CONFIG_SPI_FLASH_WINBOND
	204
a6b0652b NK	205	/* NAND */
	206	#ifndef CONFIG_SPL_BUILD
	207	#define CONFIG_CMD_NAND
	208	#define CONFIG_SYS_NAND_BASE 0x40000000
	209	#define CONFIG_SYS_NAND_MAX_CHIPS 1
	210	#define CONFIG_SYS_MAX_NAND_DEVICE 1
	211	#define CONFIG_NAND_MXS
	212	#define CONFIG_SYS_NAND_ONFI_DETECTION
	213	/* APBH DMA is required for NAND support */
	214	#define CONFIG_APBH_DMA
	215	#define CONFIG_APBH_DMA_BURST
	216	#define CONFIG_APBH_DMA_BURST8
	217	#endif
	218
02b1343e NK	219	/* Ethernet */
	220	#define CONFIG_FEC_MXC
	221	#define CONFIG_FEC_MXC_PHYADDR 0
	222	#define CONFIG_FEC_XCV_TYPE RGMII
	223	#define IMX_FEC_BASE ENET_BASE_ADDR
	224	#define CONFIG_PHYLIB
	225	#define CONFIG_PHY_ATHEROS
	226	#define CONFIG_MII
	227	#define CONFIG_ETHPRIME "FEC0"
	228	#define CONFIG_ARP_TIMEOUT 200UL
02b1343e NK	229	#define CONFIG_NET_RETRY_COUNT 5
02b1343e NK	230
0f3effb9 NK	231	/* USB */
	232	#define CONFIG_CMD_USB
	233	#define CONFIG_USB_EHCI
	234	#define CONFIG_USB_EHCI_MX6
	235	#define CONFIG_USB_STORAGE
	236	#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI \| PORT_PTS_PTW)
	237	#define CONFIG_MXC_USB_FLAGS 0
	238	#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
	239	#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
1c2e5292 NK	240	#define CONFIG_USB_KEYBOARD
	241	#define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP
	242	#define CONFIG_SYS_STDIO_DEREGISTER
0f3effb9	243
f42b2f60 NK	244	/* I2C */
	245	#define CONFIG_CMD_I2C
	246	#define CONFIG_SYS_I2C
	247	#define CONFIG_SYS_I2C_MXC
f8cb101e	248	#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
f42b2f60 NK	249	#define CONFIG_SYS_I2C_SPEED 100000
	250	#define CONFIG_SYS_MXC_I2C3_SPEED 400000
	251
	252	#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
	253	#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
	254	#define CONFIG_SYS_I2C_EEPROM_BUS 2
	255
206f38f7 NK	256	/* SATA */
	257	#define CONFIG_CMD_SATA
	258	#define CONFIG_SYS_SATA_MAX_DEVICE 1
	259	#define CONFIG_LIBATA
	260	#define CONFIG_LBA48
	261	#define CONFIG_DWC_AHSATA
	262	#define CONFIG_DWC_AHSATA_PORT_ID 0
	263	#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
	264
e32028a7 NK	265	/* GPIO */
	266	#define CONFIG_MXC_GPIO
	267
	268	/* Boot */
	269	#define CONFIG_ZERO_BOOTDELAY_CHECK
	270	#define CONFIG_LOADADDR 0x10800000
	271	#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
	272	#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
	273	#define CONFIG_SYS_BOOTMAPSZ (8 << 20)
	274	#define CONFIG_SETUP_MEMORY_TAGS
	275	#define CONFIG_INITRD_TAG
f66113c0 NK	276	#define CONFIG_REVISION_TAG
f66113c0 NK	277	#define CONFIG_SERIAL_TAG
e32028a7 NK	278
	279	/* misc */
	280	#define CONFIG_SYS_GENERIC_BOARD
	281	#define CONFIG_STACKSIZE (128 * 1024)
9fbdcf01	282	#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
e32028a7	283	#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 800 /* 400 KB */
02b1343e	284	#define CONFIG_OF_BOARD_SETUP
e32028a7 NK	285
	286	/* SPL */
	287	#include "imx6_spl.h"
	288	#define CONFIG_SPL_BOARD_INIT
	289	#define CONFIG_SPL_MMC_SUPPORT
	290	#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x80 /* offset 64 kb */
	291	#define CONFIG_SYS_MONITOR_LEN (CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS / 2 * 1024)
	292	#define CONFIG_SPL_SPI_SUPPORT
	293	#define CONFIG_SPL_SPI_FLASH_SUPPORT
	294	#define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024)
	295	#define CONFIG_SPL_SPI_LOAD
	296
deb94d61 NK	297	/* Display */
	298	#define CONFIG_VIDEO
	299	#define CONFIG_VIDEO_IPUV3
	300	#define CONFIG_IPUV3_CLK 260000000
	301	#define CONFIG_IMX_HDMI
	302	#define CONFIG_IMX_VIDEO_SKIP
	303	#define CONFIG_CFB_CONSOLE
	304	#define CONFIG_VGA_AS_SINGLE_DEVICE
	305	#define CONFIG_SYS_CONSOLE_IS_IN_ENV
	306	#define CONFIG_CONSOLE_MUX
	307	#define CONFIG_VIDEO_SW_CURSOR
	308
3a236a35	309	#define CONFIG_SPLASH_SCREEN
f82eb2fa	310	#define CONFIG_SPLASH_SOURCE
3a236a35 NK	311	#define CONFIG_CMD_BMP
	312	#define CONFIG_VIDEO_BMP_RLE8
	313
8015dde8 NK	314	#define CONFIG_VIDEO_LOGO
	315	#define CONFIG_VIDEO_BMP_LOGO
	316
e32028a7	317	#endif /* __CONFIG_CM_FX6_H */