[people/ms/u-boot.git] / include / configs / da850evm.h

/*
 * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
 *
 * Based on davinci_dvevm.h. Original Copyrights follow:
 *
 * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 */

#ifndef __CONFIG_H
#define __CONFIG_H

/*
 * Board
 */
#define CONFIG_DRIVER_TI_EMAC
#define CONFIG_USE_SPIFLASH

/*
 * SoC Configuration
 */
#define CONFIG_MACH_DAVINCI_DA850_EVM
#define CONFIG_ARM926EJS		/* arm926ejs CPU core */
#define CONFIG_SOC_DA8XX		/* TI DA8xx SoC */
#define CONFIG_SYS_CLK_FREQ		clk_get(DAVINCI_ARM_CLKID)
#define CONFIG_SYS_OSCIN_FREQ		24000000
#define CONFIG_SYS_TIMERBASE		DAVINCI_TIMER0_BASE
#define CONFIG_SYS_HZ_CLOCK		clk_get(DAVINCI_AUXCLK_CLKID)
#define CONFIG_SYS_HZ			1000
#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_SYS_TEXT_BASE		0xc1080000

/*
 * Memory Info
 */
#define CONFIG_SYS_MALLOC_LEN	(0x10000 + 1*1024*1024) /* malloc() len */
#define PHYS_SDRAM_1		DAVINCI_DDR_EMIF_DATA_BASE /* DDR Start */
#define PHYS_SDRAM_1_SIZE	(64 << 20) /* SDRAM size 64MB */
#define CONFIG_MAX_RAM_BANK_SIZE (512 << 20) /* max size from SPRS586*/

/* memtest start addr */
#define CONFIG_SYS_MEMTEST_START	(PHYS_SDRAM_1 + 0x2000000)

/* memtest will be run on 16MB */
#define CONFIG_SYS_MEMTEST_END 	(PHYS_SDRAM_1 + 0x2000000 + 16*1024*1024)

#define CONFIG_NR_DRAM_BANKS	1 /* we have 1 bank of DRAM */
#define CONFIG_STACKSIZE	(256*1024) /* regular stack */

/*
 * Serial Driver info
 */
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE	-4	/* NS16550 register size */
#define CONFIG_SYS_NS16550_COM1	DAVINCI_UART2_BASE /* Base address of UART2 */
#define CONFIG_SYS_NS16550_CLK	clk_get(DAVINCI_UART2_CLKID)
#define CONFIG_CONS_INDEX	1		/* use UART0 for console */
#define CONFIG_BAUDRATE		115200		/* Default baud rate */
#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }

#define CONFIG_SPI
#define CONFIG_SPI_FLASH
#define CONFIG_SPI_FLASH_STMICRO
#define CONFIG_DAVINCI_SPI
#define CONFIG_SYS_SPI_BASE		DAVINCI_SPI1_BASE
#define CONFIG_SYS_SPI_CLK		clk_get(DAVINCI_SPI1_CLKID)
#define CONFIG_SF_DEFAULT_SPEED		30000000
#define CONFIG_ENV_SPI_MAX_HZ	CONFIG_SF_DEFAULT_SPEED

/*
 * I2C Configuration
 */
#define CONFIG_HARD_I2C
#define CONFIG_DRIVER_DAVINCI_I2C
#define CONFIG_SYS_I2C_SPEED		25000
#define CONFIG_SYS_I2C_SLAVE		10 /* Bogus, master-only in U-Boot */

/*
 * Flash & Environment
 */
#ifdef CONFIG_USE_NAND
#undef CONFIG_ENV_IS_IN_FLASH
#define CONFIG_NAND_DAVINCI
#define CONFIG_SYS_NO_FLASH
#define CONFIG_ENV_IS_IN_NAND		/* U-Boot env in NAND Flash  */
#define CONFIG_ENV_OFFSET		0x0 /* Block 0--not used by bootcode */
#define CONFIG_ENV_SIZE			(128 << 10)
#define	CONFIG_SYS_NAND_USE_FLASH_BBT
#define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
#define	CONFIG_SYS_NAND_PAGE_2K
#define CONFIG_SYS_NAND_CS		3
#define CONFIG_SYS_NAND_BASE		DAVINCI_ASYNC_EMIF_DATA_CE3_BASE
#define CONFIG_SYS_CLE_MASK		0x10
#define CONFIG_SYS_ALE_MASK		0x8
#undef CONFIG_SYS_NAND_HW_ECC
#define CONFIG_SYS_MAX_NAND_DEVICE	1 /* Max number of NAND devices */
#define NAND_MAX_CHIPS			1
#endif

/*
 * Network & Ethernet Configuration
 */
#ifdef CONFIG_DRIVER_TI_EMAC
#define CONFIG_EMAC_MDIO_PHY_NUM	0
#define CONFIG_MII
#define CONFIG_BOOTP_DEFAULT
#define CONFIG_BOOTP_DNS
#define CONFIG_BOOTP_DNS2
#define CONFIG_BOOTP_SEND_HOSTNAME
#define CONFIG_NET_RETRY_COUNT	10
#define CONFIG_NET_MULTI
#endif

#ifdef CONFIG_USE_SPIFLASH
#undef CONFIG_ENV_IS_IN_FLASH
#undef CONFIG_ENV_IS_IN_NAND
#define CONFIG_ENV_IS_IN_SPI_FLASH
#define CONFIG_ENV_SIZE			(64 << 10)
#define CONFIG_ENV_OFFSET		(256 << 10)
#define CONFIG_ENV_SECT_SIZE		(64 << 10)
#define CONFIG_SYS_NO_FLASH
#endif

/*
 * U-Boot general configuration
 */
#define CONFIG_BOOTFILE		"uImage" /* Boot file name */
#define CONFIG_SYS_PROMPT	"DA850-evm > " /* Command Prompt */
#define CONFIG_SYS_CBSIZE	1024 /* Console I/O Buffer Size	*/
#define CONFIG_SYS_PBSIZE	(CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
#define CONFIG_SYS_MAXARGS	16 /* max number of command args */
#define CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */
#define CONFIG_SYS_LOAD_ADDR	(PHYS_SDRAM_1 + 0x700000)
#define CONFIG_VERSION_VARIABLE
#define CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_HUSH_PARSER
#define CONFIG_SYS_PROMPT_HUSH_PS2	"> "
#define CONFIG_CMDLINE_EDITING
#define CONFIG_SYS_LONGHELP
#define CONFIG_CRC32_VERIFY
#define CONFIG_MX_CYCLIC

/*
 * Linux Information
 */
#define LINUX_BOOT_PARAM_ADDR	(PHYS_SDRAM_1 + 0x100)
#define CONFIG_CMDLINE_TAG
#define CONFIG_REVISION_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_BOOTARGS		\
	"mem=32M console=ttyS2,115200n8 root=/dev/mtdblock2 rw noinitrd ip=dhcp"
#define CONFIG_BOOTDELAY	3

/*
 * U-Boot commands
 */
#include <config_cmd_default.h>
#define CONFIG_CMD_ENV
#define CONFIG_CMD_ASKENV
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_DIAG
#define CONFIG_CMD_MII
#define CONFIG_CMD_PING
#define CONFIG_CMD_SAVES
#define CONFIG_CMD_MEMORY

#ifndef CONFIG_DRIVER_TI_EMAC
#undef CONFIG_CMD_NET
#undef CONFIG_CMD_DHCP
#undef CONFIG_CMD_MII
#undef CONFIG_CMD_PING
#endif

#ifdef CONFIG_USE_NAND
#undef CONFIG_CMD_FLASH
#undef CONFIG_CMD_IMLS
#define CONFIG_CMD_NAND

#define CONFIG_CMD_MTDPARTS
#define CONFIG_MTD_DEVICE
#define CONFIG_MTD_PARTITIONS
#define CONFIG_LZO
#define CONFIG_RBTREE
#define CONFIG_CMD_UBI
#define CONFIG_CMD_UBIFS
#endif

#ifdef CONFIG_USE_SPIFLASH
#undef CONFIG_CMD_IMLS
#undef CONFIG_CMD_FLASH
#define CONFIG_CMD_SPI
#define CONFIG_CMD_SF
#define CONFIG_CMD_SAVEENV
#endif

#if !defined(CONFIG_USE_NAND) && \
	!defined(CONFIG_USE_NOR) && \
	!defined(CONFIG_USE_SPIFLASH)
#define CONFIG_ENV_IS_NOWHERE
#define CONFIG_SYS_NO_FLASH
#define CONFIG_ENV_SIZE		(16 << 10)
#undef CONFIG_CMD_IMLS
#undef CONFIG_CMD_ENV
#endif

/* additions for new relocation code, must added to all boards */
#define CONFIG_SYS_SDRAM_BASE		0xc0000000
#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x1000 - /* Fix this */ \
					GENERATED_GBL_DATA_SIZE)
#endif /* __CONFIG_H */
Commit	Line	Data
89b765c7 SR	1	/*
	2	* Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
	3	*
	4	* Based on davinci_dvevm.h. Original Copyrights follow:
	5	*
	6	* Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
	7	*
	8	* This program is free software; you can redistribute it and/or modify
	9	* it under the terms of the GNU General Public License as published by
	10	* the Free Software Foundation; either version 2 of the License, or
	11	* (at your option) any later version.
	12	*
	13	* This program is distributed in the hope that it will be useful,
	14	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	* GNU General Public License for more details.
	17	*
	18	* You should have received a copy of the GNU General Public License
	19	* along with this program; if not, write to the Free Software
	20	* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
	21	*/
	22
	23	#ifndef __CONFIG_H
	24	#define __CONFIG_H
	25
	26	/*
	27	* Board
	28	*/
3d248d37	29	#define CONFIG_DRIVER_TI_EMAC
d73a8a1b	30	#define CONFIG_USE_SPIFLASH
89b765c7 SR	31
	32	/*
	33	* SoC Configuration
	34	*/
	35	#define CONFIG_MACH_DAVINCI_DA850_EVM
	36	#define CONFIG_ARM926EJS /* arm926ejs CPU core */
	37	#define CONFIG_SOC_DA8XX /* TI DA8xx SoC */
	38	#define CONFIG_SYS_CLK_FREQ clk_get(DAVINCI_ARM_CLKID)
	39	#define CONFIG_SYS_OSCIN_FREQ 24000000
	40	#define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE
	41	#define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID)
	42	#define CONFIG_SYS_HZ 1000
	43	#define CONFIG_SKIP_LOWLEVEL_INIT
f760d14a	44	#define CONFIG_SYS_TEXT_BASE 0xc1080000
89b765c7 SR	45
	46	/*
	47	* Memory Info
	48	*/
	49	#define CONFIG_SYS_MALLOC_LEN (0x10000 + 110241024) /* malloc() len */
89b765c7 SR	50	#define PHYS_SDRAM_1 DAVINCI_DDR_EMIF_DATA_BASE /* DDR Start */
89b765c7 SR	51	#define PHYS_SDRAM_1_SIZE (64 << 20) /* SDRAM size 64MB */
97003756	52	#define CONFIG_MAX_RAM_BANK_SIZE (512 << 20) /* max size from SPRS586*/
89b765c7 SR	53
	54	/* memtest start addr */
	55	#define CONFIG_SYS_MEMTEST_START (PHYS_SDRAM_1 + 0x2000000)
	56
	57	/* memtest will be run on 16MB */
	58	#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + 0x2000000 + 1610241024)
	59
	60	#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
	61	#define CONFIG_STACKSIZE (2561024) / regular stack */
	62
	63	/*
	64	* Serial Driver info
	65	*/
	66	#define CONFIG_SYS_NS16550
	67	#define CONFIG_SYS_NS16550_SERIAL
	68	#define CONFIG_SYS_NS16550_REG_SIZE -4 /* NS16550 register size */
	69	#define CONFIG_SYS_NS16550_COM1 DAVINCI_UART2_BASE /* Base address of UART2 */
	70	#define CONFIG_SYS_NS16550_CLK clk_get(DAVINCI_UART2_CLKID)
	71	#define CONFIG_CONS_INDEX 1 /* use UART0 for console */
	72	#define CONFIG_BAUDRATE 115200 /* Default baud rate */
	73	#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
	74
d73a8a1b SB	75	#define CONFIG_SPI
	76	#define CONFIG_SPI_FLASH
	77	#define CONFIG_SPI_FLASH_STMICRO
	78	#define CONFIG_DAVINCI_SPI
	79	#define CONFIG_SYS_SPI_BASE DAVINCI_SPI1_BASE
	80	#define CONFIG_SYS_SPI_CLK clk_get(DAVINCI_SPI1_CLKID)
	81	#define CONFIG_SF_DEFAULT_SPEED 30000000
	82	#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
	83
89b765c7 SR	84	/*
	85	* I2C Configuration
	86	*/
	87	#define CONFIG_HARD_I2C
	88	#define CONFIG_DRIVER_DAVINCI_I2C
	89	#define CONFIG_SYS_I2C_SPEED 25000
	90	#define CONFIG_SYS_I2C_SLAVE 10 /* Bogus, master-only in U-Boot */
	91
6b2c6468 BG	92	/*
	93	* Flash & Environment
	94	*/
	95	#ifdef CONFIG_USE_NAND
	96	#undef CONFIG_ENV_IS_IN_FLASH
	97	#define CONFIG_NAND_DAVINCI
	98	#define CONFIG_SYS_NO_FLASH
	99	#define CONFIG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */
	100	#define CONFIG_ENV_OFFSET 0x0 /* Block 0--not used by bootcode */
	101	#define CONFIG_ENV_SIZE (128 << 10)
	102	#define CONFIG_SYS_NAND_USE_FLASH_BBT
	103	#define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
	104	#define CONFIG_SYS_NAND_PAGE_2K
	105	#define CONFIG_SYS_NAND_CS 3
	106	#define CONFIG_SYS_NAND_BASE DAVINCI_ASYNC_EMIF_DATA_CE3_BASE
	107	#define CONFIG_SYS_CLE_MASK 0x10
	108	#define CONFIG_SYS_ALE_MASK 0x8
	109	#undef CONFIG_SYS_NAND_HW_ECC
	110	#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
	111	#define NAND_MAX_CHIPS 1
6b2c6468 BG	112	#endif
6b2c6468 BG	113
3d248d37 BG	114	/*
	115	* Network & Ethernet Configuration
	116	*/
	117	#ifdef CONFIG_DRIVER_TI_EMAC
	118	#define CONFIG_EMAC_MDIO_PHY_NUM 0
	119	#define CONFIG_MII
	120	#define CONFIG_BOOTP_DEFAULT
	121	#define CONFIG_BOOTP_DNS
	122	#define CONFIG_BOOTP_DNS2
	123	#define CONFIG_BOOTP_SEND_HOSTNAME
	124	#define CONFIG_NET_RETRY_COUNT 10
	125	#define CONFIG_NET_MULTI
	126	#endif
	127
d73a8a1b SB	128	#ifdef CONFIG_USE_SPIFLASH
	129	#undef CONFIG_ENV_IS_IN_FLASH
	130	#undef CONFIG_ENV_IS_IN_NAND
	131	#define CONFIG_ENV_IS_IN_SPI_FLASH
	132	#define CONFIG_ENV_SIZE (64 << 10)
	133	#define CONFIG_ENV_OFFSET (256 << 10)
	134	#define CONFIG_ENV_SECT_SIZE (64 << 10)
	135	#define CONFIG_SYS_NO_FLASH
	136	#endif
	137
89b765c7 SR	138	/*
	139	* U-Boot general configuration
	140	*/
	141	#define CONFIG_BOOTFILE "uImage" /* Boot file name */
	142	#define CONFIG_SYS_PROMPT "DA850-evm > " /* Command Prompt */
	143	#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
	144	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
	145	#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
	146	#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */
	147	#define CONFIG_SYS_LOAD_ADDR (PHYS_SDRAM_1 + 0x700000)
	148	#define CONFIG_VERSION_VARIABLE
	149	#define CONFIG_AUTO_COMPLETE
	150	#define CONFIG_SYS_HUSH_PARSER
	151	#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
	152	#define CONFIG_CMDLINE_EDITING
	153	#define CONFIG_SYS_LONGHELP
	154	#define CONFIG_CRC32_VERIFY
	155	#define CONFIG_MX_CYCLIC
	156
	157	/*
	158	* Linux Information
	159	*/
59e0d611	160	#define LINUX_BOOT_PARAM_ADDR (PHYS_SDRAM_1 + 0x100)
89b765c7	161	#define CONFIG_CMDLINE_TAG
4f6fc15b	162	#define CONFIG_REVISION_TAG
89b765c7 SR	163	#define CONFIG_SETUP_MEMORY_TAGS
	164	#define CONFIG_BOOTARGS \
	165	"mem=32M console=ttyS2,115200n8 root=/dev/mtdblock2 rw noinitrd ip=dhcp"
	166	#define CONFIG_BOOTDELAY 3
	167
	168	/*
	169	* U-Boot commands
	170	*/
	171	#include <config_cmd_default.h>
	172	#define CONFIG_CMD_ENV
	173	#define CONFIG_CMD_ASKENV
	174	#define CONFIG_CMD_DHCP
	175	#define CONFIG_CMD_DIAG
	176	#define CONFIG_CMD_MII
	177	#define CONFIG_CMD_PING
	178	#define CONFIG_CMD_SAVES
	179	#define CONFIG_CMD_MEMORY
	180
	181	#ifndef CONFIG_DRIVER_TI_EMAC
	182	#undef CONFIG_CMD_NET
	183	#undef CONFIG_CMD_DHCP
	184	#undef CONFIG_CMD_MII
	185	#undef CONFIG_CMD_PING
	186	#endif
	187
6b2c6468 BG	188	#ifdef CONFIG_USE_NAND
	189	#undef CONFIG_CMD_FLASH
	190	#undef CONFIG_CMD_IMLS
	191	#define CONFIG_CMD_NAND
771d028a BG	192
	193	#define CONFIG_CMD_MTDPARTS
	194	#define CONFIG_MTD_DEVICE
	195	#define CONFIG_MTD_PARTITIONS
	196	#define CONFIG_LZO
	197	#define CONFIG_RBTREE
	198	#define CONFIG_CMD_UBI
	199	#define CONFIG_CMD_UBIFS
6b2c6468 BG	200	#endif
6b2c6468 BG	201
d73a8a1b SB	202	#ifdef CONFIG_USE_SPIFLASH
	203	#undef CONFIG_CMD_IMLS
	204	#undef CONFIG_CMD_FLASH
	205	#define CONFIG_CMD_SPI
	206	#define CONFIG_CMD_SF
	207	#define CONFIG_CMD_SAVEENV
	208	#endif
	209
89b765c7 SR	210	#if !defined(CONFIG_USE_NAND) && \
	211	!defined(CONFIG_USE_NOR) && \
	212	!defined(CONFIG_USE_SPIFLASH)
	213	#define CONFIG_ENV_IS_NOWHERE
	214	#define CONFIG_SYS_NO_FLASH
	215	#define CONFIG_ENV_SIZE (16 << 10)
	216	#undef CONFIG_CMD_IMLS
	217	#undef CONFIG_CMD_ENV
	218	#endif
	219
ab86f72c	220	/* additions for new relocation code, must added to all boards */
ab86f72c HS	221	#define CONFIG_SYS_SDRAM_BASE 0xc0000000
ab86f72c HS	222	#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - /* Fix this */ \
25ddd1fb	223	GENERATED_GBL_DATA_SIZE)
89b765c7	224	#endif /* __CONFIG_H */