[people/ms/u-boot.git] / include / configs / davinci_dm355evm.h

/*
 * Copyright (C) 2009 David Brownell
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __CONFIG_H
#define __CONFIG_H

/* Spectrum Digital TMS320DM355 EVM board */
#define DAVINCI_DM355EVM

#define CONFIG_SKIP_LOWLEVEL_INIT	/* U-Boot is a 3rd stage loader */
#define CONFIG_SYS_NO_FLASH		/* that is, no *NOR* flash */
#define CONFIG_SYS_CONSOLE_INFO_QUIET

/* SoC Configuration */
#define CONFIG_ARM926EJS				/* arm926ejs CPU */
#define CONFIG_SYS_TIMERBASE		0x01c21400	/* use timer 0 */
#define CONFIG_SYS_HZ_CLOCK		24000000	/* timer0 freq */
#define CONFIG_SOC_DM355

/* Memory Info */
#define CONFIG_NR_DRAM_BANKS		1
#define PHYS_SDRAM_1			0x80000000
#define PHYS_SDRAM_1_SIZE		(128 << 20)	/* 128 MiB */

/* Serial Driver info: UART0 for console  */
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE	-4
#define CONFIG_SYS_NS16550_COM1		0x01c20000
#define CONFIG_SYS_NS16550_CLK		CONFIG_SYS_HZ_CLOCK
#define CONFIG_CONS_INDEX		1
#define CONFIG_BAUDRATE			115200

/* Ethernet:  external DM9000 */
#define CONFIG_DRIVER_DM9000		1
#define CONFIG_DM9000_BASE		0x04014000
#define DM9000_IO			CONFIG_DM9000_BASE
#define DM9000_DATA			(CONFIG_DM9000_BASE + 2)

/* I2C */
#define CONFIG_HARD_I2C
#define CONFIG_DRIVER_DAVINCI_I2C
#define CONFIG_SYS_I2C_SPEED		400000
#define CONFIG_SYS_I2C_SLAVE		0x10	/* SMBus host address */

/* NAND: socketed, two chipselects, normally 2 GBytes */
#define CONFIG_NAND_DAVINCI
#define CONFIG_SYS_NAND_CS		2
#define CONFIG_SYS_NAND_USE_FLASH_BBT
#define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
#define CONFIG_SYS_NAND_PAGE_2K

#define CONFIG_SYS_NAND_LARGEPAGE
#define CONFIG_SYS_NAND_BASE_LIST	{ 0x02000000, }
/* socket has two chipselects, nCE0 gated by address BIT(14) */
#define CONFIG_SYS_MAX_NAND_DEVICE	1
#define CONFIG_SYS_NAND_MAX_CHIPS	2

/* SD/MMC */
#define CONFIG_MMC
#define CONFIG_GENERIC_MMC
#define CONFIG_DAVINCI_MMC
#define CONFIG_DAVINCI_MMC_SD1
#define CONFIG_MMC_MBLOCK

/* USB: OTG connector */
/* NYET -- #define CONFIG_USB_DAVINCI */

/* U-Boot command configuration */
#include <config_cmd_default.h>

#undef CONFIG_CMD_BDI
#undef CONFIG_CMD_FLASH
#undef CONFIG_CMD_FPGA
#undef CONFIG_CMD_SETGETDCR

#define CONFIG_CMD_ASKENV
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_I2C
#define CONFIG_CMD_PING
#define CONFIG_CMD_SAVES

#ifdef CONFIG_CMD_BDI
#define CONFIG_CLOCKS
#endif

#ifdef CONFIG_MMC
#define CONFIG_DOS_PARTITION
#define CONFIG_CMD_EXT2
#define CONFIG_CMD_FAT
#define CONFIG_CMD_MMC
#endif

#ifdef CONFIG_NAND_DAVINCI
#define CONFIG_CMD_MTDPARTS
#define CONFIG_MTD_PARTITIONS
#define CONFIG_MTD_DEVICE
#define CONFIG_CMD_NAND
#define CONFIG_CMD_UBI
#define CONFIG_RBTREE
#endif

#ifdef CONFIG_USB_DAVINCI
#define CONFIG_MUSB_HCD
#define CONFIG_CMD_USB
#define CONFIG_USB_STORAGE
#else
#undef CONFIG_MUSB_HCD
#undef CONFIG_CMD_USB
#undef CONFIG_USB_STORAGE
#endif

#define CONFIG_CRC32_VERIFY
#define CONFIG_MX_CYCLIC

/* U-Boot general configuration */
#define CONFIG_BOOTFILE		"uImage"	/* Boot file name */
#define CONFIG_SYS_PROMPT	"DM355 EVM # "	/* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE	1024		/* Console I/O Buffer Size  */
#define CONFIG_SYS_PBSIZE			/* Print buffer size */ \
		(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
#define CONFIG_SYS_MAXARGS	16		/* max number of command args */
#define CONFIG_SYS_HUSH_PARSER
#define CONFIG_SYS_LONGHELP

#ifdef CONFIG_NAND_DAVINCI
#define CONFIG_ENV_SIZE		(256 << 10)	/* 256 KiB */
#define CONFIG_ENV_IS_IN_NAND
#define CONFIG_ENV_OFFSET	0x3C0000
#undef CONFIG_ENV_IS_IN_FLASH
#endif

#if defined(CONFIG_MMC) && !defined(CONFIG_ENV_IS_IN_NAND)
#define CONFIG_CMD_ENV
#define CONFIG_ENV_SIZE		(16 << 10)	/* 16 KiB */
#define CONFIG_ENV_OFFSET	(51 << 9)	/* Sector 51 */
#define CONFIG_ENV_IS_IN_MMC
#undef CONFIG_ENV_IS_IN_FLASH
#endif

#define CONFIG_BOOTDELAY	5
#define CONFIG_BOOTCOMMAND \
		"dhcp;bootm"
#define CONFIG_BOOTARGS \
		"console=ttyS0,115200n8 " \
		"root=/dev/mmcblk0p1 rootwait rootfstype=ext3 ro"

#define CONFIG_CMDLINE_EDITING
#define CONFIG_VERSION_VARIABLE
#define CONFIG_TIMESTAMP

#define CONFIG_NET_RETRY_COUNT 10

/* U-Boot memory configuration */
#define CONFIG_SYS_MALLOC_LEN		(1 << 20)	/* 1 MiB */
#define CONFIG_SYS_MEMTEST_START	0x87000000	/* physical address */
#define CONFIG_SYS_MEMTEST_END		0x88000000	/* test 16MB RAM */

/* Linux interfacing */
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_SYS_BARGSIZE	1024			/* bootarg Size */
#define CONFIG_SYS_LOAD_ADDR	0x80700000		/* kernel address */


/* NAND configuration ... socketed with two chipselects.  It normally comes
 * with a 2GByte SLC part with 2KB pages (and 128KB erase blocks); other
 * 2GByte parts may have 4KB pages, 256KB erase blocks, and use MLC.  (MLC
 * pretty much demands the 4-bit ECC support.)  You can of course swap in
 * other parts, including small page ones.
 *
 * This presents a single read-only partition for all bootloader stuff.
 * UBL (1+ block), U-Boot (256KB+), U-Boot environment (one block), and
 * some extra space to help cope with bad blocks in that data.  Linux
 * shouldn't care about its detailed layout, and will probably want to use
 * UBI/UBFS for the rest (except maybe on smallpage chips).  It's easy to
 * override this default partitioning using MTDPARTS and cmdlinepart.
 */
#define MTDIDS_DEFAULT		"nand0=davinci_nand.0"

#ifdef CONFIG_SYS_NAND_LARGEPAGE
/*  Use same layout for 128K/256K blocks; allow some bad blocks */
#define PART_BOOT		"2m(bootloader)ro,"
#else
/* Assume 16K erase blocks; allow a few bad ones. */
#define PART_BOOT		"512k(bootloader)ro,"
#endif

#define PART_KERNEL		"4m(kernel),"	/* kernel + initramfs */
#define PART_REST		"-(filesystem)"

#define MTDPARTS_DEFAULT	\
	"mtdparts=davinci_nand.0:" PART_BOOT PART_KERNEL PART_REST

#define CONFIG_MAX_RAM_BANK_SIZE	(256 << 20)	/* 256 MB */

#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
#define CONFIG_SYS_INIT_SP_ADDR		\
	(CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)

#endif /* __CONFIG_H */
Commit	Line	Data
28b00324 DB	1	/*
	2	* Copyright (C) 2009 David Brownell
	3	*
3765b3e7	4	* SPDX-License-Identifier: GPL-2.0+
28b00324 DB	5	*/
	6
	7	#ifndef __CONFIG_H
	8	#define __CONFIG_H
28b00324 DB	9
	10	/* Spectrum Digital TMS320DM355 EVM board */
	11	#define DAVINCI_DM355EVM
	12
	13	#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is a 3rd stage loader */
28b00324 DB	14	#define CONFIG_SYS_NO_FLASH /* that is, no NOR flash */
28b00324 DB	15	#define CONFIG_SYS_CONSOLE_INFO_QUIET
28b00324 DB	16
	17	/* SoC Configuration */
	18	#define CONFIG_ARM926EJS /* arm926ejs CPU */
	19	#define CONFIG_SYS_TIMERBASE 0x01c21400 /* use timer 0 */
	20	#define CONFIG_SYS_HZ_CLOCK 24000000 /* timer0 freq */
28b00324 DB	21	#define CONFIG_SOC_DM355
	22
	23	/* Memory Info */
	24	#define CONFIG_NR_DRAM_BANKS 1
	25	#define PHYS_SDRAM_1 0x80000000
a16df2c1	26	#define PHYS_SDRAM_1_SIZE (128 << 20) /* 128 MiB */
28b00324 DB	27
	28	/* Serial Driver info: UART0 for console */
	29	#define CONFIG_SYS_NS16550
	30	#define CONFIG_SYS_NS16550_SERIAL
	31	#define CONFIG_SYS_NS16550_REG_SIZE -4
	32	#define CONFIG_SYS_NS16550_COM1 0x01c20000
	33	#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_HZ_CLOCK
28b00324 DB	34	#define CONFIG_CONS_INDEX 1
	35	#define CONFIG_BAUDRATE 115200
	36
	37	/* Ethernet: external DM9000 */
	38	#define CONFIG_DRIVER_DM9000 1
	39	#define CONFIG_DM9000_BASE 0x04014000
	40	#define DM9000_IO CONFIG_DM9000_BASE
	41	#define DM9000_DATA (CONFIG_DM9000_BASE + 2)
	42
	43	/* I2C */
	44	#define CONFIG_HARD_I2C
	45	#define CONFIG_DRIVER_DAVINCI_I2C
	46	#define CONFIG_SYS_I2C_SPEED 400000
	47	#define CONFIG_SYS_I2C_SLAVE 0x10 /* SMBus host address */
	48
	49	/* NAND: socketed, two chipselects, normally 2 GBytes */
409ec37b	50	#define CONFIG_NAND_DAVINCI
97f4eb8c	51	#define CONFIG_SYS_NAND_CS 2
28b00324	52	#define CONFIG_SYS_NAND_USE_FLASH_BBT
409ec37b SP	53	#define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
409ec37b SP	54	#define CONFIG_SYS_NAND_PAGE_2K
28b00324 DB	55
	56	#define CONFIG_SYS_NAND_LARGEPAGE
	57	#define CONFIG_SYS_NAND_BASE_LIST { 0x02000000, }
	58	/* socket has two chipselects, nCE0 gated by address BIT(14) */
	59	#define CONFIG_SYS_MAX_NAND_DEVICE 1
	60	#define CONFIG_SYS_NAND_MAX_CHIPS 2
	61
073eacf0 SP	62	/* SD/MMC */
	63	#define CONFIG_MMC
	64	#define CONFIG_GENERIC_MMC
	65	#define CONFIG_DAVINCI_MMC
	66	#define CONFIG_DAVINCI_MMC_SD1
	67	#define CONFIG_MMC_MBLOCK
	68
28b00324 DB	69	/* USB: OTG connector */
	70	/* NYET -- #define CONFIG_USB_DAVINCI */
	71
	72	/* U-Boot command configuration */
	73	#include <config_cmd_default.h>
	74
	75	#undef CONFIG_CMD_BDI
	76	#undef CONFIG_CMD_FLASH
	77	#undef CONFIG_CMD_FPGA
	78	#undef CONFIG_CMD_SETGETDCR
	79
	80	#define CONFIG_CMD_ASKENV
	81	#define CONFIG_CMD_DHCP
	82	#define CONFIG_CMD_I2C
	83	#define CONFIG_CMD_PING
	84	#define CONFIG_CMD_SAVES
	85
8f5d4687 HM	86	#ifdef CONFIG_CMD_BDI
	87	#define CONFIG_CLOCKS
	88	#endif
	89
073eacf0 SP	90	#ifdef CONFIG_MMC
	91	#define CONFIG_DOS_PARTITION
	92	#define CONFIG_CMD_EXT2
	93	#define CONFIG_CMD_FAT
	94	#define CONFIG_CMD_MMC
	95	#endif
	96
28b00324 DB	97	#ifdef CONFIG_NAND_DAVINCI
	98	#define CONFIG_CMD_MTDPARTS
	99	#define CONFIG_MTD_PARTITIONS
409ec37b	100	#define CONFIG_MTD_DEVICE
28b00324 DB	101	#define CONFIG_CMD_NAND
	102	#define CONFIG_CMD_UBI
	103	#define CONFIG_RBTREE
	104	#endif
	105
28b00324 DB	106	#ifdef CONFIG_USB_DAVINCI
	107	#define CONFIG_MUSB_HCD
	108	#define CONFIG_CMD_USB
	109	#define CONFIG_USB_STORAGE
	110	#else
	111	#undef CONFIG_MUSB_HCD
	112	#undef CONFIG_CMD_USB
	113	#undef CONFIG_USB_STORAGE
	114	#endif
	115
	116	#define CONFIG_CRC32_VERIFY
	117	#define CONFIG_MX_CYCLIC
	118
	119	/* U-Boot general configuration */
28b00324 DB	120	#define CONFIG_BOOTFILE "uImage" /* Boot file name */
	121	#define CONFIG_SYS_PROMPT "DM355 EVM # " /* Monitor Command Prompt */
	122	#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
	123	#define CONFIG_SYS_PBSIZE /* Print buffer size */ \
	124	(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
	125	#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
	126	#define CONFIG_SYS_HUSH_PARSER
28b00324 DB	127	#define CONFIG_SYS_LONGHELP
28b00324 DB	128
409ec37b SP	129	#ifdef CONFIG_NAND_DAVINCI
	130	#define CONFIG_ENV_SIZE (256 << 10) /* 256 KiB */
	131	#define CONFIG_ENV_IS_IN_NAND
	132	#define CONFIG_ENV_OFFSET 0x3C0000
	133	#undef CONFIG_ENV_IS_IN_FLASH
	134	#endif
28b00324	135
073eacf0 SP	136	#if defined(CONFIG_MMC) && !defined(CONFIG_ENV_IS_IN_NAND)
	137	#define CONFIG_CMD_ENV
	138	#define CONFIG_ENV_SIZE (16 << 10) /* 16 KiB */
	139	#define CONFIG_ENV_OFFSET (51 << 9) /* Sector 51 */
	140	#define CONFIG_ENV_IS_IN_MMC
	141	#undef CONFIG_ENV_IS_IN_FLASH
	142	#endif
	143
409ec37b	144	#define CONFIG_BOOTDELAY 5
28b00324 DB	145	#define CONFIG_BOOTCOMMAND \
	146	"dhcp;bootm"
	147	#define CONFIG_BOOTARGS \
	148	"console=ttyS0,115200n8 " \
	149	"root=/dev/mmcblk0p1 rootwait rootfstype=ext3 ro"
	150
	151	#define CONFIG_CMDLINE_EDITING
	152	#define CONFIG_VERSION_VARIABLE
	153	#define CONFIG_TIMESTAMP
	154
	155	#define CONFIG_NET_RETRY_COUNT 10
	156
	157	/* U-Boot memory configuration */
409ec37b	158	#define CONFIG_SYS_MALLOC_LEN (1 << 20) /* 1 MiB */
28b00324 DB	159	#define CONFIG_SYS_MEMTEST_START 0x87000000 /* physical address */
	160	#define CONFIG_SYS_MEMTEST_END 0x88000000 /* test 16MB RAM */
	161
	162	/* Linux interfacing */
	163	#define CONFIG_CMDLINE_TAG
	164	#define CONFIG_SETUP_MEMORY_TAGS
	165	#define CONFIG_SYS_BARGSIZE 1024 /* bootarg Size */
	166	#define CONFIG_SYS_LOAD_ADDR 0x80700000 /* kernel address */
	167
	168
	169	/* NAND configuration ... socketed with two chipselects. It normally comes
	170	* with a 2GByte SLC part with 2KB pages (and 128KB erase blocks); other
	171	* 2GByte parts may have 4KB pages, 256KB erase blocks, and use MLC. (MLC
	172	* pretty much demands the 4-bit ECC support.) You can of course swap in
	173	* other parts, including small page ones.
	174	*
	175	* This presents a single read-only partition for all bootloader stuff.
	176	* UBL (1+ block), U-Boot (256KB+), U-Boot environment (one block), and
	177	* some extra space to help cope with bad blocks in that data. Linux
	178	* shouldn't care about its detailed layout, and will probably want to use
	179	* UBI/UBFS for the rest (except maybe on smallpage chips). It's easy to
	180	* override this default partitioning using MTDPARTS and cmdlinepart.
	181	*/
	182	#define MTDIDS_DEFAULT "nand0=davinci_nand.0"
	183
	184	#ifdef CONFIG_SYS_NAND_LARGEPAGE
	185	/* Use same layout for 128K/256K blocks; allow some bad blocks */
	186	#define PART_BOOT "2m(bootloader)ro,"
	187	#else
	188	/* Assume 16K erase blocks; allow a few bad ones. */
	189	#define PART_BOOT "512k(bootloader)ro,"
	190	#endif
	191
	192	#define PART_KERNEL "4m(kernel)," /* kernel + initramfs */
	193	#define PART_REST "-(filesystem)"
	194
	195	#define MTDPARTS_DEFAULT \
	196	"mtdparts=davinci_nand.0:" PART_BOOT PART_KERNEL PART_REST
	197
44df860b SP	198	#define CONFIG_MAX_RAM_BANK_SIZE (256 << 20) /* 256 MB */
	199
	200	#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
	201	#define CONFIG_SYS_INIT_SP_ADDR \
	202	(CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
	203
28b00324	204	#endif /* __CONFIG_H */