]> git.ipfire.org Git - people/ms/u-boot.git/blame - include/configs/db-88f6820-gp.h
ata: Migrate CONFIG_SCSI_AHCI to Kconfig
[people/ms/u-boot.git] / include / configs / db-88f6820-gp.h
CommitLineData
2bae75a4
SR
1/*
2 * Copyright (C) 2014 Stefan Roese <sr@denx.de>
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7#ifndef _CONFIG_DB_88F6820_GP_H
8#define _CONFIG_DB_88F6820_GP_H
9
10/*
11 * High Level Configuration Options (easy to change)
12 */
2bae75a4 13
2bae75a4
SR
14#define CONFIG_DISPLAY_BOARDINFO_LATE
15
2923c2d2
SR
16/*
17 * TEXT_BASE needs to be below 16MiB, since this area is scrubbed
18 * for DDR ECC byte filling in the SPL before loading the main
19 * U-Boot into it.
20 */
21#define CONFIG_SYS_TEXT_BASE 0x00800000
2bae75a4
SR
22#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
23
24/*
25 * Commands configuration
26 */
2bae75a4
SR
27
28/* I2C */
29#define CONFIG_SYS_I2C
30#define CONFIG_SYS_I2C_MVTWSI
31#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
32#define CONFIG_SYS_I2C_SLAVE 0x0
33#define CONFIG_SYS_I2C_SPEED 100000
34
35/* SPI NOR flash default params, used by sf commands */
36#define CONFIG_SF_DEFAULT_SPEED 1000000
37#define CONFIG_SF_DEFAULT_MODE SPI_MODE_3
2bae75a4 38
e80f1e85
SR
39/*
40 * SDIO/MMC Card Configuration
41 */
e80f1e85
SR
42#define CONFIG_SYS_MMC_BASE MVEBU_SDIO_BASE
43
7cbaff95
SR
44/*
45 * SATA/SCSI/AHCI configuration
46 */
47#define CONFIG_LIBATA
7cbaff95
SR
48#define CONFIG_SCSI_AHCI_PLAT
49#define CONFIG_SYS_SCSI_MAX_SCSI_ID 2
50#define CONFIG_SYS_SCSI_MAX_LUN 1
51#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
52 CONFIG_SYS_SCSI_MAX_LUN)
53
e80f1e85 54/* Partition support */
e80f1e85
SR
55
56/* Additional FS support/configuration */
57#define CONFIG_SUPPORT_VFAT
58
59565736 59/* USB/EHCI configuration */
59565736
SR
60#define CONFIG_EHCI_IS_TDI
61
2bae75a4 62/* Environment in SPI NOR flash */
2bae75a4
SR
63#define CONFIG_ENV_OFFSET (1 << 20) /* 1MiB in */
64#define CONFIG_ENV_SIZE (64 << 10) /* 64KiB */
65#define CONFIG_ENV_SECT_SIZE (256 << 10) /* 256KiB sectors */
66
67#define CONFIG_PHY_MARVELL /* there is a marvell phy */
2bae75a4
SR
68#define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */
69
ce2cb1d3 70/* PCIe support */
6451223a 71#ifndef CONFIG_SPL_BUILD
ce2cb1d3 72#define CONFIG_PCI_MVEBU
ce2cb1d3 73#define CONFIG_PCI_SCAN_SHOW
6451223a 74#endif
ce2cb1d3 75
2bae75a4
SR
76#define CONFIG_SYS_ALT_MEMTEST
77
3fd38af7
KS
78/* Keep device tree and initrd in lower memory so the kernel can access them */
79#define CONFIG_EXTRA_ENV_SETTINGS \
80 "fdt_high=0x10000000\0" \
81 "initrd_high=0x10000000\0"
82
9e30b31d 83/* SPL */
7853c508
SR
84/*
85 * Select the boot device here
86 *
87 * Currently supported are:
88 * SPL_BOOT_SPI_NOR_FLASH - Booting via SPI NOR flash
89 * SPL_BOOT_SDIO_MMC_CARD - Booting via SDIO/MMC card (partition 1)
90 */
91#define SPL_BOOT_SPI_NOR_FLASH 1
92#define SPL_BOOT_SDIO_MMC_CARD 2
93#define CONFIG_SPL_BOOT_DEVICE SPL_BOOT_SPI_NOR_FLASH
94
9e30b31d
SR
95/* Defines for SPL */
96#define CONFIG_SPL_FRAMEWORK
97#define CONFIG_SPL_SIZE (140 << 10)
98#define CONFIG_SPL_TEXT_BASE 0x40000030
99#define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - 0x0030)
100
101#define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE)
102#define CONFIG_SPL_BSS_MAX_SIZE (16 << 10)
103
6451223a
SR
104#ifdef CONFIG_SPL_BUILD
105#define CONFIG_SYS_MALLOC_SIMPLE
106#endif
9e30b31d
SR
107
108#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10))
109#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
110
7853c508 111#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SPI_NOR_FLASH
9e30b31d 112/* SPL related SPI defines */
9e30b31d 113#define CONFIG_SPL_SPI_LOAD
09a54c00 114#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x24000
7853c508
SR
115#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
116#endif
117
118#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SDIO_MMC_CARD
119/* SPL related MMC defines */
7853c508
SR
120#define CONFIG_SYS_MMC_U_BOOT_OFFS (160 << 10)
121#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_MMC_U_BOOT_OFFS
7853c508
SR
122#ifdef CONFIG_SPL_BUILD
123#define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER 0x00180000 /* in SDRAM */
124#endif
125#endif
9e30b31d 126
2bae75a4
SR
127/*
128 * mv-common.h should be defined after CMD configs since it used them
129 * to enable certain macros
130 */
131#include "mv-common.h"
132
133#endif /* _CONFIG_DB_88F6820_GP_H */