[people/ms/u-boot.git] / include / configs / dra7xx_evm.h

/*
 * (C) Copyright 2013
 * Texas Instruments Incorporated.
 * Lokesh Vutla	  <lokeshvutla@ti.com>
 *
 * Configuration settings for the TI DRA7XX board.
 * See ti_omap5_common.h for omap5 common settings.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __CONFIG_DRA7XX_EVM_H
#define __CONFIG_DRA7XX_EVM_H

#define CONFIG_DRA7XX
#define CONFIG_BOARD_EARLY_INIT_F

#ifdef CONFIG_SPL_BUILD
#define CONFIG_IODELAY_RECALIBRATION
#endif

#define CONFIG_VERY_BIG_RAM
#define CONFIG_NR_DRAM_BANKS		2
#define CONFIG_MAX_MEM_MAPPED		0x80000000

#ifndef CONFIG_QSPI_BOOT
/* MMC ENV related defines */
#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_SYS_MMC_ENV_DEV		1	/* SLOT2: eMMC(1) */
#define CONFIG_ENV_SIZE			(128 << 10)
#define CONFIG_ENV_OFFSET		0xE0000
#define CONFIG_ENV_OFFSET_REDUND	(CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
#endif

#if (CONFIG_CONS_INDEX == 1)
#define CONSOLEDEV			"ttyO0"
#elif (CONFIG_CONS_INDEX == 3)
#define CONSOLEDEV			"ttyO2"
#endif
#define CONFIG_SYS_NS16550_COM1		UART1_BASE	/* Base EVM has UART0 */
#define CONFIG_SYS_NS16550_COM2		UART2_BASE	/* UART2 */
#define CONFIG_SYS_NS16550_COM3		UART3_BASE	/* UART3 */
#define CONFIG_BAUDRATE			115200

#define CONFIG_SYS_OMAP_ABE_SYSCK

#ifndef CONFIG_SPL_BUILD
/* Define the default GPT table for eMMC */
#define PARTS_DEFAULT \
	/* Linux partitions */ \
	"uuid_disk=${uuid_gpt_disk};" \
	"name=rootfs,start=2MiB,size=-,uuid=${uuid_gpt_rootfs}\0" \
	/* Android partitions */ \
	"partitions_android=" \
	"uuid_disk=${uuid_gpt_disk};" \
	"name=xloader,start=128K,size=128K,uuid=${uuid_gpt_xloader};" \
	"name=bootloader,size=384K,uuid=${uuid_gpt_bootloader};" \
	"name=environment,size=128K,uuid=${uuid_gpt_environment};" \
	"name=misc,size=128K,uuid=${uuid_gpt_misc};" \
	"name=efs,start=1280K,size=16M,uuid=${uuid_gpt_efs};" \
	"name=crypto,size=16K,uuid=${uuid_gpt_crypto};" \
	"name=recovery,size=10M,uuid=${uuid_gpt_recovery};" \
	"name=boot,size=10M,uuid=${uuid_gpt_boot};" \
	"name=system,size=768M,uuid=${uuid_gpt_system};" \
	"name=cache,size=256M,uuid=${uuid_gpt_cache};" \
	"name=ipu1,size=1M,uuid=${uuid_gpt_ipu1};" \
	"name=ipu2,size=1M,uuid=${uuid_gpt_ipu2};" \
	"name=userdata,size=-,uuid=${uuid_gpt_userdata}"

#define DFU_ALT_INFO_MMC \
	"dfu_alt_info_mmc=" \
	"boot part 0 1;" \
	"rootfs part 0 2;" \
	"MLO fat 0 1;" \
	"MLO.raw raw 0x100 0x100;" \
	"u-boot.img.raw raw 0x300 0x400;" \
	"spl-os-args.raw raw 0x80 0x80;" \
	"spl-os-image.raw raw 0x900 0x2000;" \
	"spl-os-args fat 0 1;" \
	"spl-os-image fat 0 1;" \
	"u-boot.img fat 0 1;" \
	"uEnv.txt fat 0 1\0"

#define DFU_ALT_INFO_EMMC \
	"dfu_alt_info_emmc=" \
	"rawemmc raw 0 3751936;" \
	"boot part 1 1;" \
	"rootfs part 1 2;" \
	"MLO fat 1 1;" \
	"MLO.raw raw 0x100 0x100;" \
	"u-boot.img.raw raw 0x300 0x400;" \
	"spl-os-args.raw raw 0x80 0x80;" \
	"spl-os-image.raw raw 0x900 0x2000;" \
	"spl-os-args fat 1 1;" \
	"spl-os-image fat 1 1;" \
	"u-boot.img fat 1 1;" \
	"uEnv.txt fat 1 1\0"

#define DFU_ALT_INFO_RAM \
	"dfu_alt_info_ram=" \
	"kernel ram 0x80200000 0x4000000;" \
	"fdt ram 0x80f80000 0x80000;" \
	"ramdisk ram 0x81000000 0x4000000\0"

#define DFU_ALT_INFO_QSPI \
	"dfu_alt_info_qspi=" \
	"MLO raw 0x0 0x010000;" \
	"MLO.backup1 raw 0x010000 0x010000;" \
	"MLO.backup2 raw 0x020000 0x010000;" \
	"MLO.backup3 raw 0x030000 0x010000;" \
	"u-boot.img raw 0x040000 0x0100000;" \
	"u-boot-spl-os raw 0x140000 0x080000;" \
	"u-boot-env raw 0x1C0000 0x010000;" \
	"u-boot-env.backup raw 0x1D0000 0x010000;" \
	"kernel raw 0x1E0000 0x800000\0"

#define DFUARGS \
	"dfu_bufsiz=0x10000\0" \
	DFU_ALT_INFO_MMC \
	DFU_ALT_INFO_EMMC \
	DFU_ALT_INFO_RAM \
	DFU_ALT_INFO_QSPI

/* Fastboot */
#define CONFIG_USB_FUNCTION_FASTBOOT
#define CONFIG_CMD_FASTBOOT
#define CONFIG_ANDROID_BOOT_IMAGE
#define CONFIG_FASTBOOT_BUF_ADDR    CONFIG_SYS_LOAD_ADDR
#define CONFIG_FASTBOOT_BUF_SIZE    0x2F000000
#define CONFIG_FASTBOOT_FLASH
#define CONFIG_FASTBOOT_FLASH_MMC_DEV   1
#endif

#include <configs/ti_omap5_common.h>

/* Enhance our eMMC support / experience. */
#define CONFIG_CMD_GPT
#define CONFIG_EFI_PARTITION
#define CONFIG_RANDOM_UUID
#define CONFIG_HSMMC2_8BIT

/* CPSW Ethernet */
#define CONFIG_BOOTP_DNS		/* Configurable parts of CMD_DHCP */
#define CONFIG_BOOTP_DNS2
#define CONFIG_BOOTP_SEND_HOSTNAME
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_SUBNETMASK
#define CONFIG_NET_RETRY_COUNT		10
#define CONFIG_DRIVER_TI_CPSW		/* Driver for IP block */
#define CONFIG_MII			/* Required in net/eth.c */
#define CONFIG_PHY_GIGE			/* per-board part of CPSW */
#define CONFIG_PHYLIB
#define CONFIG_PHY_TI

/* SPI */
#undef	CONFIG_OMAP3_SPI
#define CONFIG_TI_SPI_MMAP
#define CONFIG_SF_DEFAULT_SPEED                76800000
#define CONFIG_SF_DEFAULT_MODE                 SPI_MODE_0
#define CONFIG_QSPI_QUAD_SUPPORT

#ifdef CONFIG_SPL_BUILD
#undef CONFIG_DM_SPI
#undef CONFIG_DM_SPI_FLASH
#endif

/*
 * Default to using SPI for environment, etc.
 * 0x000000 - 0x010000 : QSPI.SPL (64KiB)
 * 0x010000 - 0x020000 : QSPI.SPL.backup1 (64KiB)
 * 0x020000 - 0x030000 : QSPI.SPL.backup2 (64KiB)
 * 0x030000 - 0x040000 : QSPI.SPL.backup3 (64KiB)
 * 0x040000 - 0x140000 : QSPI.u-boot (1MiB)
 * 0x140000 - 0x1C0000 : QSPI.u-boot-spl-os (512KiB)
 * 0x1C0000 - 0x1D0000 : QSPI.u-boot-env (64KiB)
 * 0x1D0000 - 0x1E0000 : QSPI.u-boot-env.backup1 (64KiB)
 * 0x1E0000 - 0x9E0000 : QSPI.kernel (8MiB)
 * 0x9E0000 - 0x2000000 : USERLAND
 */
#define CONFIG_SYS_SPI_KERNEL_OFFS	0x1E0000
#define CONFIG_SYS_SPI_ARGS_OFFS	0x140000
#define CONFIG_SYS_SPI_ARGS_SIZE	0x80000
#if defined(CONFIG_QSPI_BOOT)
#define CONFIG_ENV_IS_IN_SPI_FLASH
#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
#define CONFIG_ENV_SPI_MAX_HZ           CONFIG_SF_DEFAULT_SPEED
#define CONFIG_ENV_SIZE			(64 << 10)
#define CONFIG_ENV_SECT_SIZE		(64 << 10) /* 64 KB sectors */
#define CONFIG_ENV_OFFSET		0x1C0000
#define CONFIG_ENV_OFFSET_REDUND	0x1D0000
#endif

/* SPI SPL */
#define CONFIG_TI_EDMA3
#define CONFIG_SPL_SPI_LOAD
#define CONFIG_SYS_SPI_U_BOOT_OFFS     0x40000

#define CONFIG_SUPPORT_EMMC_BOOT

/* USB xHCI HOST */
#define CONFIG_USB_XHCI_OMAP
#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2

#define CONFIG_OMAP_USB_PHY
#define CONFIG_OMAP_USB2PHY2_HOST

/* USB Device Firmware Update support */
#define CONFIG_USB_FUNCTION_DFU
#define CONFIG_DFU_RAM

#define CONFIG_DFU_MMC
#define CONFIG_DFU_RAM
#define CONFIG_DFU_SF

/* SATA */
#define CONFIG_BOARD_LATE_INIT
#define CONFIG_SCSI
#define CONFIG_LIBATA
#define CONFIG_SCSI_AHCI
#define CONFIG_SCSI_AHCI_PLAT
#define CONFIG_SYS_SCSI_MAX_SCSI_ID	1
#define CONFIG_SYS_SCSI_MAX_LUN		1
#define CONFIG_SYS_SCSI_MAX_DEVICE	(CONFIG_SYS_SCSI_MAX_SCSI_ID * \
						CONFIG_SYS_SCSI_MAX_LUN)

/* NAND support */
#ifdef CONFIG_NAND
/* NAND: device related configs */
#define CONFIG_SYS_NAND_PAGE_SIZE	2048
#define CONFIG_SYS_NAND_OOBSIZE		64
#define CONFIG_SYS_NAND_BLOCK_SIZE	(128*1024)
#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
#define CONFIG_SYS_NAND_PAGE_COUNT	(CONFIG_SYS_NAND_BLOCK_SIZE / \
					 CONFIG_SYS_NAND_PAGE_SIZE)
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
/* NAND: driver related configs */
#define CONFIG_NAND_OMAP_GPMC
#define CONFIG_NAND_OMAP_ELM
#define CONFIG_SYS_NAND_ONFI_DETECTION
#define CONFIG_NAND_OMAP_ECCSCHEME	OMAP_ECC_BCH8_CODE_HW
#define CONFIG_SYS_NAND_BAD_BLOCK_POS	NAND_LARGE_BADBLOCK_POS
#define CONFIG_SYS_NAND_ECCPOS		{ 2, 3, 4, 5, 6, 7, 8, 9, \
					 10, 11, 12, 13, 14, 15, 16, 17, \
					 18, 19, 20, 21, 22, 23, 24, 25, \
					 26, 27, 28, 29, 30, 31, 32, 33, \
					 34, 35, 36, 37, 38, 39, 40, 41, \
					 42, 43, 44, 45, 46, 47, 48, 49, \
					 50, 51, 52, 53, 54, 55, 56, 57, }
#define CONFIG_SYS_NAND_ECCSIZE		512
#define CONFIG_SYS_NAND_ECCBYTES	14
#define MTDIDS_DEFAULT			"nand0=nand.0"
#define MTDPARTS_DEFAULT		"mtdparts=nand.0:" \
					"128k(NAND.SPL)," \
					"128k(NAND.SPL.backup1)," \
					"128k(NAND.SPL.backup2)," \
					"128k(NAND.SPL.backup3)," \
					"256k(NAND.u-boot-spl-os)," \
					"1m(NAND.u-boot)," \
					"128k(NAND.u-boot-env)," \
					"128k(NAND.u-boot-env.backup1)," \
					"8m(NAND.kernel)," \
					"-(NAND.file-system)"
#define CONFIG_SYS_NAND_U_BOOT_OFFS	0x000c0000
/* NAND: SPL related configs */
#ifdef CONFIG_SPL_NAND_SUPPORT
#define CONFIG_SPL_NAND_AM33XX_BCH
#endif
/* NAND: SPL falcon mode configs */
#ifdef CONFIG_SPL_OS_BOOT
#define CONFIG_CMD_SPL_NAND_OFS		0x00080000 /* os-boot params*/
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS	0x00200000 /* kernel offset */
#define CONFIG_CMD_SPL_WRITE_SIZE	0x2000
#endif
#endif /* !CONFIG_NAND */

/* Parallel NOR Support */
#if defined(CONFIG_NOR)
/* NOR: device related configs */
#define CONFIG_SYS_MAX_FLASH_SECT	512
#define CONFIG_SYS_FLASH_CFI_WIDTH	FLASH_CFI_16BIT
#define CONFIG_SYS_FLASH_SIZE		(64 * 1024 * 1024) /* 64 MB */
/* #define CONFIG_INIT_IGNORE_ERROR */
#undef CONFIG_SYS_NO_FLASH
#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
#define CONFIG_SYS_FLASH_PROTECTION
#define CONFIG_SYS_FLASH_CFI
#define CONFIG_FLASH_CFI_DRIVER
#define CONFIG_FLASH_CFI_MTD
#define CONFIG_SYS_MAX_FLASH_BANKS	1
#define CONFIG_SYS_FLASH_BASE		(0x08000000)
#define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_FLASH_BASE
/* Reduce SPL size by removing unlikey targets */
#ifdef CONFIG_NOR_BOOT
#define CONFIG_ENV_IS_IN_FLASH
#define CONFIG_ENV_SECT_SIZE		(128 * 1024)	/* 128 KiB */
#define MTDIDS_DEFAULT			"nor0=physmap-flash.0"
#define MTDPARTS_DEFAULT		"mtdparts=physmap-flash.0:" \
					"128k(NOR.SPL)," \
					"128k(NOR.SPL.backup1)," \
					"128k(NOR.SPL.backup2)," \
					"128k(NOR.SPL.backup3)," \
					"256k(NOR.u-boot-spl-os)," \
					"1m(NOR.u-boot)," \
					"128k(NOR.u-boot-env)," \
					"128k(NOR.u-boot-env.backup1)," \
					"8m(NOR.kernel)," \
					"-(NOR.rootfs)"
#define CONFIG_ENV_OFFSET		0x001c0000
#define CONFIG_ENV_OFFSET_REDUND	0x001e0000
#endif
#endif  /* NOR support */

/* EEPROM */
#define CONFIG_EEPROM_CHIP_ADDRESS 0x50
#define CONFIG_EEPROM_BUS_ADDRESS 0

#endif /* __CONFIG_DRA7XX_EVM_H */
Commit	Line	Data
3ef5ebeb LV	1	/*
	2	* (C) Copyright 2013
	3	* Texas Instruments Incorporated.
	4	* Lokesh Vutla <lokeshvutla@ti.com>
	5	*
	6	* Configuration settings for the TI DRA7XX board.
3d657a05	7	* See ti_omap5_common.h for omap5 common settings.
3ef5ebeb	8	*
3765b3e7	9	* SPDX-License-Identifier: GPL-2.0+
3ef5ebeb LV	10	*/
	11
	12	#ifndef __CONFIG_DRA7XX_EVM_H
	13	#define __CONFIG_DRA7XX_EVM_H
	14
a8017574	15	#define CONFIG_DRA7XX
7b922523	16	#define CONFIG_BOARD_EARLY_INIT_F
3ef5ebeb	17
706dd348 LV	18	#ifdef CONFIG_SPL_BUILD
	19	#define CONFIG_IODELAY_RECALIBRATION
	20	#endif
	21
212425b2	22	#define CONFIG_VERY_BIG_RAM
212425b2 LV	23	#define CONFIG_NR_DRAM_BANKS 2
	24	#define CONFIG_MAX_MEM_MAPPED 0x80000000
	25
79b079f3	26	#ifndef CONFIG_QSPI_BOOT
d3d33daf LV	27	/* MMC ENV related defines */
	28	#define CONFIG_ENV_IS_IN_MMC
	29	#define CONFIG_SYS_MMC_ENV_DEV 1 /* SLOT2: eMMC(1) */
2737f011	30	#define CONFIG_ENV_SIZE (128 << 10)
d3d33daf LV	31	#define CONFIG_ENV_OFFSET 0xE0000
	32	#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
	33	#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
79b079f3	34	#endif
3ef5ebeb	35
a13cbf5f	36	#if (CONFIG_CONS_INDEX == 1)
a8017574	37	#define CONSOLEDEV "ttyO0"
a13cbf5f MS	38	#elif (CONFIG_CONS_INDEX == 3)
	39	#define CONSOLEDEV "ttyO2"
	40	#endif
	41	#define CONFIG_SYS_NS16550_COM1 UART1_BASE /* Base EVM has UART0 */
	42	#define CONFIG_SYS_NS16550_COM2 UART2_BASE /* UART2 */
	43	#define CONFIG_SYS_NS16550_COM3 UART3_BASE /* UART3 */
378bd1fb	44	#define CONFIG_BAUDRATE 115200
97405d84 LV	45
97405d84 LV	46	#define CONFIG_SYS_OMAP_ABE_SYSCK
45dbbf29	47
08520bf5	48	#ifndef CONFIG_SPL_BUILD
2efa79ae TR	49	/* Define the default GPT table for eMMC */
2efa79ae TR	50	#define PARTS_DEFAULT \
c6afa113	51	/* Linux partitions */ \
2efa79ae	52	"uuid_disk=${uuid_gpt_disk};" \
c6afa113 SP	53	"name=rootfs,start=2MiB,size=-,uuid=${uuid_gpt_rootfs}\0" \
	54	/* Android partitions */ \
	55	"partitions_android=" \
	56	"uuid_disk=${uuid_gpt_disk};" \
	57	"name=xloader,start=128K,size=128K,uuid=${uuid_gpt_xloader};" \
	58	"name=bootloader,size=384K,uuid=${uuid_gpt_bootloader};" \
	59	"name=environment,size=128K,uuid=${uuid_gpt_environment};" \
	60	"name=misc,size=128K,uuid=${uuid_gpt_misc};" \
	61	"name=efs,start=1280K,size=16M,uuid=${uuid_gpt_efs};" \
	62	"name=crypto,size=16K,uuid=${uuid_gpt_crypto};" \
	63	"name=recovery,size=10M,uuid=${uuid_gpt_recovery};" \
	64	"name=boot,size=10M,uuid=${uuid_gpt_boot};" \
	65	"name=system,size=768M,uuid=${uuid_gpt_system};" \
	66	"name=cache,size=256M,uuid=${uuid_gpt_cache};" \
	67	"name=ipu1,size=1M,uuid=${uuid_gpt_ipu1};" \
	68	"name=ipu2,size=1M,uuid=${uuid_gpt_ipu2};" \
	69	"name=userdata,size=-,uuid=${uuid_gpt_userdata}"
2efa79ae	70
7a5a3e37 KVA	71	#define DFU_ALT_INFO_MMC \
	72	"dfu_alt_info_mmc=" \
	73	"boot part 0 1;" \
	74	"rootfs part 0 2;" \
	75	"MLO fat 0 1;" \
	76	"MLO.raw raw 0x100 0x100;" \
	77	"u-boot.img.raw raw 0x300 0x400;" \
	78	"spl-os-args.raw raw 0x80 0x80;" \
	79	"spl-os-image.raw raw 0x900 0x2000;" \
	80	"spl-os-args fat 0 1;" \
	81	"spl-os-image fat 0 1;" \
	82	"u-boot.img fat 0 1;" \
	83	"uEnv.txt fat 0 1\0"
	84
	85	#define DFU_ALT_INFO_EMMC \
	86	"dfu_alt_info_emmc=" \
	87	"rawemmc raw 0 3751936;" \
	88	"boot part 1 1;" \
	89	"rootfs part 1 2;" \
	90	"MLO fat 1 1;" \
	91	"MLO.raw raw 0x100 0x100;" \
	92	"u-boot.img.raw raw 0x300 0x400;" \
	93	"spl-os-args.raw raw 0x80 0x80;" \
	94	"spl-os-image.raw raw 0x900 0x2000;" \
	95	"spl-os-args fat 1 1;" \
	96	"spl-os-image fat 1 1;" \
	97	"u-boot.img fat 1 1;" \
	98	"uEnv.txt fat 1 1\0"
	99
	100	#define DFU_ALT_INFO_RAM \
	101	"dfu_alt_info_ram=" \
	102	"kernel ram 0x80200000 0x4000000;" \
	103	"fdt ram 0x80f80000 0x80000;" \
	104	"ramdisk ram 0x81000000 0x4000000\0"
	105
5486d067 V	106	#define DFU_ALT_INFO_QSPI \
	107	"dfu_alt_info_qspi=" \
	108	"MLO raw 0x0 0x010000;" \
	109	"MLO.backup1 raw 0x010000 0x010000;" \
	110	"MLO.backup2 raw 0x020000 0x010000;" \
	111	"MLO.backup3 raw 0x030000 0x010000;" \
	112	"u-boot.img raw 0x040000 0x0100000;" \
	113	"u-boot-spl-os raw 0x140000 0x080000;" \
	114	"u-boot-env raw 0x1C0000 0x010000;" \
	115	"u-boot-env.backup raw 0x1D0000 0x010000;" \
	116	"kernel raw 0x1E0000 0x800000\0"
	117
7a5a3e37 KVA	118	#define DFUARGS \
	119	"dfu_bufsiz=0x10000\0" \
	120	DFU_ALT_INFO_MMC \
	121	DFU_ALT_INFO_EMMC \
5486d067 V	122	DFU_ALT_INFO_RAM \
5486d067 V	123	DFU_ALT_INFO_QSPI
7a5a3e37	124
be17d396	125	/* Fastboot */
17da3c0c	126	#define CONFIG_USB_FUNCTION_FASTBOOT
be17d396 DK	127	#define CONFIG_CMD_FASTBOOT
be17d396 DK	128	#define CONFIG_ANDROID_BOOT_IMAGE
a588d99a PK	129	#define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR
a588d99a PK	130	#define CONFIG_FASTBOOT_BUF_SIZE 0x2F000000
be17d396 DK	131	#define CONFIG_FASTBOOT_FLASH
be17d396 DK	132	#define CONFIG_FASTBOOT_FLASH_MMC_DEV 1
08520bf5	133	#endif
be17d396	134
3d657a05	135	#include <configs/ti_omap5_common.h>
45dbbf29	136
2efa79ae TR	137	/* Enhance our eMMC support / experience. */
	138	#define CONFIG_CMD_GPT
	139	#define CONFIG_EFI_PARTITION
c6afa113	140	#define CONFIG_RANDOM_UUID
8065a4e8	141	#define CONFIG_HSMMC2_8BIT
2efa79ae	142
c9be62ca	143	/* CPSW Ethernet */
457bb505	144	#define CONFIG_BOOTP_DNS /* Configurable parts of CMD_DHCP */
c9be62ca M	145	#define CONFIG_BOOTP_DNS2
	146	#define CONFIG_BOOTP_SEND_HOSTNAME
	147	#define CONFIG_BOOTP_GATEWAY
	148	#define CONFIG_BOOTP_SUBNETMASK
457bb505	149	#define CONFIG_NET_RETRY_COUNT 10
457bb505 TR	150	#define CONFIG_DRIVER_TI_CPSW /* Driver for IP block */
	151	#define CONFIG_MII /* Required in net/eth.c */
	152	#define CONFIG_PHY_GIGE /* per-board part of CPSW */
c9be62ca	153	#define CONFIG_PHYLIB
39fbac91	154	#define CONFIG_PHY_TI
c9be62ca	155
247cdf04 MP	156	/* SPI */
247cdf04 MP	157	#undef CONFIG_OMAP3_SPI
247cdf04	158	#define CONFIG_TI_SPI_MMAP
b9612bb2	159	#define CONFIG_SF_DEFAULT_SPEED 76800000
900e2104	160	#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
46122960	161	#define CONFIG_QSPI_QUAD_SUPPORT
247cdf04	162
e7af6725 M	163	#ifdef CONFIG_SPL_BUILD
	164	#undef CONFIG_DM_SPI
	165	#undef CONFIG_DM_SPI_FLASH
	166	#endif
	167
79b079f3 TR	168	/*
	169	* Default to using SPI for environment, etc.
	170	* 0x000000 - 0x010000 : QSPI.SPL (64KiB)
	171	* 0x010000 - 0x020000 : QSPI.SPL.backup1 (64KiB)
	172	* 0x020000 - 0x030000 : QSPI.SPL.backup2 (64KiB)
	173	* 0x030000 - 0x040000 : QSPI.SPL.backup3 (64KiB)
	174	* 0x040000 - 0x140000 : QSPI.u-boot (1MiB)
	175	* 0x140000 - 0x1C0000 : QSPI.u-boot-spl-os (512KiB)
	176	* 0x1C0000 - 0x1D0000 : QSPI.u-boot-env (64KiB)
	177	* 0x1D0000 - 0x1E0000 : QSPI.u-boot-env.backup1 (64KiB)
	178	* 0x1E0000 - 0x9E0000 : QSPI.kernel (8MiB)
	179	* 0x9E0000 - 0x2000000 : USERLAND
	180	*/
	181	#define CONFIG_SYS_SPI_KERNEL_OFFS 0x1E0000
	182	#define CONFIG_SYS_SPI_ARGS_OFFS 0x140000
	183	#define CONFIG_SYS_SPI_ARGS_SIZE 0x80000
	184	#if defined(CONFIG_QSPI_BOOT)
79b079f3 TR	185	#define CONFIG_ENV_IS_IN_SPI_FLASH
	186	#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
	187	#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
	188	#define CONFIG_ENV_SIZE (64 << 10)
	189	#define CONFIG_ENV_SECT_SIZE (64 << 10) /* 64 KB sectors */
	190	#define CONFIG_ENV_OFFSET 0x1C0000
	191	#define CONFIG_ENV_OFFSET_REDUND 0x1D0000
	192	#endif
	193
247cdf04	194	/* SPI SPL */
fc5e2200	195	#define CONFIG_TI_EDMA3
247cdf04	196	#define CONFIG_SPL_SPI_LOAD
79b079f3	197	#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x40000
247cdf04	198
b818d9ab TR	199	#define CONFIG_SUPPORT_EMMC_BOOT
b818d9ab TR	200
834e91af	201	/* USB xHCI HOST */
834e91af	202	#define CONFIG_USB_XHCI_OMAP
834e91af DM	203	#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
	204
	205	#define CONFIG_OMAP_USB_PHY
	206	#define CONFIG_OMAP_USB2PHY2_HOST
	207
7a5a3e37	208	/* USB Device Firmware Update support */
01acd6ab	209	#define CONFIG_USB_FUNCTION_DFU
7a5a3e37	210	#define CONFIG_DFU_RAM
7a5a3e37 KVA	211
	212	#define CONFIG_DFU_MMC
	213	#define CONFIG_DFU_RAM
5486d067	214	#define CONFIG_DFU_SF
7a5a3e37	215
21914ee6 RQ	216	/* SATA */
21914ee6 RQ	217	#define CONFIG_BOARD_LATE_INIT
c649e3c9	218	#define CONFIG_SCSI
21914ee6 RQ	219	#define CONFIG_LIBATA
	220	#define CONFIG_SCSI_AHCI
	221	#define CONFIG_SCSI_AHCI_PLAT
	222	#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
	223	#define CONFIG_SYS_SCSI_MAX_LUN 1
	224	#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
	225	CONFIG_SYS_SCSI_MAX_LUN)
	226
54a97d28	227	/* NAND support */
	228	#ifdef CONFIG_NAND
	229	/* NAND: device related configs */
	230	#define CONFIG_SYS_NAND_PAGE_SIZE 2048
	231	#define CONFIG_SYS_NAND_OOBSIZE 64
	232	#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
	233	#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
	234	#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
	235	CONFIG_SYS_NAND_PAGE_SIZE)
	236	#define CONFIG_SYS_NAND_5_ADDR_CYCLE
	237	/* NAND: driver related configs */
	238	#define CONFIG_NAND_OMAP_GPMC
	239	#define CONFIG_NAND_OMAP_ELM
	240	#define CONFIG_SYS_NAND_ONFI_DETECTION
	241	#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW
	242	#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
	243	#define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \
	244	10, 11, 12, 13, 14, 15, 16, 17, \
	245	18, 19, 20, 21, 22, 23, 24, 25, \
	246	26, 27, 28, 29, 30, 31, 32, 33, \
	247	34, 35, 36, 37, 38, 39, 40, 41, \
	248	42, 43, 44, 45, 46, 47, 48, 49, \
	249	50, 51, 52, 53, 54, 55, 56, 57, }
	250	#define CONFIG_SYS_NAND_ECCSIZE 512
	251	#define CONFIG_SYS_NAND_ECCBYTES 14
	252	#define MTDIDS_DEFAULT "nand0=nand.0"
	253	#define MTDPARTS_DEFAULT "mtdparts=nand.0:" \
	254	"128k(NAND.SPL)," \
	255	"128k(NAND.SPL.backup1)," \
	256	"128k(NAND.SPL.backup2)," \
	257	"128k(NAND.SPL.backup3)," \
	258	"256k(NAND.u-boot-spl-os)," \
	259	"1m(NAND.u-boot)," \
	260	"128k(NAND.u-boot-env)," \
	261	"128k(NAND.u-boot-env.backup1)," \
	262	"8m(NAND.kernel)," \
9ddef489	263	"-(NAND.file-system)"
54a97d28	264	#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x000c0000
	265	/* NAND: SPL related configs */
	266	#ifdef CONFIG_SPL_NAND_SUPPORT
	267	#define CONFIG_SPL_NAND_AM33XX_BCH
	268	#endif
	269	/* NAND: SPL falcon mode configs */
	270	#ifdef CONFIG_SPL_OS_BOOT
	271	#define CONFIG_CMD_SPL_NAND_OFS 0x00080000 /* os-boot params*/
	272	#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00200000 /* kernel offset */
	273	#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
	274	#endif
	275	#endif /* !CONFIG_NAND */
	276
9352697a	277	/* Parallel NOR Support */
	278	#if defined(CONFIG_NOR)
	279	/* NOR: device related configs */
	280	#define CONFIG_SYS_MAX_FLASH_SECT 512
	281	#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
	282	#define CONFIG_SYS_FLASH_SIZE (64 * 1024 * 1024) /* 64 MB */
	283	/* #define CONFIG_INIT_IGNORE_ERROR */
	284	#undef CONFIG_SYS_NO_FLASH
9352697a	285	#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
	286	#define CONFIG_SYS_FLASH_PROTECTION
	287	#define CONFIG_SYS_FLASH_CFI
	288	#define CONFIG_FLASH_CFI_DRIVER
	289	#define CONFIG_FLASH_CFI_MTD
	290	#define CONFIG_SYS_MAX_FLASH_BANKS 1
	291	#define CONFIG_SYS_FLASH_BASE (0x08000000)
	292	#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
	293	/* Reduce SPL size by removing unlikey targets */
	294	#ifdef CONFIG_NOR_BOOT
	295	#define CONFIG_ENV_IS_IN_FLASH
	296	#define CONFIG_ENV_SECT_SIZE (128 * 1024) /* 128 KiB */
	297	#define MTDIDS_DEFAULT "nor0=physmap-flash.0"
	298	#define MTDPARTS_DEFAULT "mtdparts=physmap-flash.0:" \
	299	"128k(NOR.SPL)," \
	300	"128k(NOR.SPL.backup1)," \
	301	"128k(NOR.SPL.backup2)," \
	302	"128k(NOR.SPL.backup3)," \
	303	"256k(NOR.u-boot-spl-os)," \
	304	"1m(NOR.u-boot)," \
	305	"128k(NOR.u-boot-env)," \
	306	"128k(NOR.u-boot-env.backup1)," \
	307	"8m(NOR.kernel)," \
	308	"-(NOR.rootfs)"
	309	#define CONFIG_ENV_OFFSET 0x001c0000
	310	#define CONFIG_ENV_OFFSET_REDUND 0x001e0000
	311	#endif
	312	#endif /* NOR support */
	313
25afe55d LV	314	/* EEPROM */
	315	#define CONFIG_EEPROM_CHIP_ADDRESS 0x50
	316	#define CONFIG_EEPROM_BUS_ADDRESS 0
	317
3ef5ebeb	318	#endif /* __CONFIG_DRA7XX_EVM_H */