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aefb8f4c PS |
1 | /* |
2 | * Copyright (C) 2014 Stefan Roese <sr@denx.de> | |
3 | * | |
4 | * SPDX-License-Identifier: GPL-2.0+ | |
5 | */ | |
6 | ||
7 | #ifndef _CONFIG_SYNOLOGY_DS414_H | |
8 | #define _CONFIG_SYNOLOGY_DS414_H | |
9 | ||
10 | /* | |
11 | * High Level Configuration Options (easy to change) | |
12 | */ | |
13 | #define CONFIG_DISPLAY_BOARDINFO_LATE | |
14 | ||
15 | /* | |
16 | * TEXT_BASE needs to be below 16MiB, since this area is scrubbed | |
17 | * for DDR ECC byte filling in the SPL before loading the main | |
18 | * U-Boot into it. | |
19 | */ | |
aefb8f4c PS |
20 | #define CONFIG_SYS_TCLK 250000000 /* 250MHz */ |
21 | ||
22 | /* | |
23 | * Commands configuration | |
24 | */ | |
aefb8f4c PS |
25 | |
26 | /* I2C */ | |
27 | #define CONFIG_SYS_I2C | |
28 | #define CONFIG_SYS_I2C_MVTWSI | |
29 | #define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE | |
30 | #define CONFIG_SYS_I2C_SLAVE 0x0 | |
31 | #define CONFIG_SYS_I2C_SPEED 100000 | |
32 | ||
33 | /* SPI NOR flash default params, used by sf commands */ | |
34 | #define CONFIG_SF_DEFAULT_SPEED 1000000 | |
35 | #define CONFIG_SF_DEFAULT_MODE SPI_MODE_3 | |
36 | ||
37 | /* Environment in SPI NOR flash */ | |
aefb8f4c PS |
38 | #define CONFIG_ENV_OFFSET 0x7E0000 /* RedBoot config partition in DTS */ |
39 | #define CONFIG_ENV_SIZE (64 << 10) /* 64KiB */ | |
40 | #define CONFIG_ENV_SECT_SIZE (64 << 10) /* 64KiB sectors */ | |
41 | ||
42 | #define CONFIG_PHY_MARVELL /* there is a marvell phy */ | |
43 | #define CONFIG_PHY_ADDR { 0x1, 0x0 } | |
44 | #define CONFIG_SYS_NETA_INTERFACE_TYPE PHY_INTERFACE_MODE_RGMII | |
45 | ||
46 | #define CONFIG_SYS_ALT_MEMTEST | |
47 | ||
48 | /* PCIe support */ | |
49 | #ifndef CONFIG_SPL_BUILD | |
aefb8f4c PS |
50 | #define CONFIG_PCI_MVEBU |
51 | #define CONFIG_PCI_SCAN_SHOW | |
52 | #endif | |
53 | ||
54 | /* USB/EHCI/XHCI configuration */ | |
55 | ||
aefb8f4c PS |
56 | #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 |
57 | ||
58 | /* FIXME: broken XHCI support | |
59 | * Below defines should enable support for the two rear USB3 ports. Sadly, this | |
60 | * does not work because: | |
61 | * - xhci-pci seems to not support DM_USB, so with that enabled it is not | |
62 | * found. | |
63 | * - USB init fails, controller does not respond in time */ | |
aefb8f4c | 64 | |
0a8cc1a3 | 65 | #if !defined(CONFIG_USB_XHCI_HCD) |
aefb8f4c PS |
66 | #define CONFIG_EHCI_IS_TDI |
67 | #endif | |
68 | ||
69 | /* why is this only defined in mv-common.h if CONFIG_DM is undefined? */ | |
aefb8f4c PS |
70 | #define CONFIG_SYS_MVFS |
71 | ||
72 | /* | |
73 | * mv-common.h should be defined after CMD configs since it used them | |
74 | * to enable certain macros | |
75 | */ | |
76 | #include "mv-common.h" | |
77 | ||
78 | /* | |
79 | * Memory layout while starting into the bin_hdr via the | |
80 | * BootROM: | |
81 | * | |
82 | * 0x4000.4000 - 0x4003.4000 headers space (192KiB) | |
83 | * 0x4000.4030 bin_hdr start address | |
84 | * 0x4003.4000 - 0x4004.7c00 BootROM memory allocations (15KiB) | |
85 | * 0x4007.fffc BootROM stack top | |
86 | * | |
87 | * The address space between 0x4007.fffc and 0x400f.fff is not locked in | |
88 | * L2 cache thus cannot be used. | |
89 | */ | |
90 | ||
91 | /* SPL */ | |
92 | /* Defines for SPL */ | |
aefb8f4c PS |
93 | #define CONFIG_SPL_TEXT_BASE 0x40004030 |
94 | #define CONFIG_SPL_MAX_SIZE ((128 << 10) - 0x4030) | |
95 | ||
96 | #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + (128 << 10)) | |
97 | #define CONFIG_SPL_BSS_MAX_SIZE (16 << 10) | |
98 | ||
99 | #ifdef CONFIG_SPL_BUILD | |
100 | #define CONFIG_SYS_MALLOC_SIMPLE | |
101 | #endif | |
102 | ||
103 | #define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10)) | |
104 | #define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4) | |
105 | ||
aefb8f4c | 106 | /* SPL related SPI defines */ |
aefb8f4c | 107 | #define CONFIG_SPL_SPI_LOAD |
aefb8f4c PS |
108 | #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x24000 |
109 | ||
110 | /* DS414 bus width is 32bits */ | |
111 | #define CONFIG_DDR_32BIT | |
112 | ||
aefb8f4c PS |
113 | /* Default Environment */ |
114 | #define CONFIG_BOOTCOMMAND "sf read ${loadaddr} 0xd0000 0x700000; bootm" | |
aefb8f4c PS |
115 | #define CONFIG_LOADADDR 0x80000 |
116 | #undef CONFIG_PREBOOT /* override preboot for USB and SPI flash init */ | |
117 | #define CONFIG_PREBOOT "usb start; sf probe" | |
118 | ||
119 | #endif /* _CONFIG_SYNOLOGY_DS414_H */ |