[people/ms/u-boot.git] / include / configs / flea3.h

/*
 * (C) Copyright 2011, Stefano Babic <sbabic@denx.de>
 *
 * (C) Copyright 2008-2010 Freescale Semiconductor, Inc.
 *
 * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
 *
 * Configuration for the flea3 board.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __CONFIG_H
#define __CONFIG_H

#include <asm/arch/imx-regs.h>

 /* High Level Configuration Options */
#define CONFIG_MX35

#define CONFIG_SYS_DCACHE_OFF

#define CONFIG_MACH_TYPE		MACH_TYPE_FLEA3

/* Set TEXT at the beginning of the NOR flash */
#define CONFIG_SYS_TEXT_BASE	0xA0000000

/* This is required to setup the ESDC controller */

#define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */
#define CONFIG_REVISION_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG

/*
 * Size of malloc() pool
 */
#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 1024 * 1024)

/*
 * Hardware drivers
 */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
#define CONFIG_SYS_SPD_BUS_NUM		2 /* I2C3 */
#define CONFIG_SYS_MXC_I2C3_SLAVE	0xfe
#define CONFIG_MXC_SPI
#define CONFIG_MXC_GPIO

/*
 * UART (console)
 */
#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE	UART3_BASE

/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_CONS_INDEX	1

/*
 * Command definition
 */
#define CONFIG_BOOTP_SUBNETMASK
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_DNS

#define CONFIG_CMD_NAND

#define CONFIG_NET_RETRY_COUNT	100


#define CONFIG_LOADADDR		0x80800000	/* loadaddr env var */

/*
 * Ethernet on SOC (FEC)
 */
#define CONFIG_FEC_MXC
#define IMX_FEC_BASE	FEC_BASE_ADDR
#define CONFIG_PHYLIB
#define CONFIG_PHY_MICREL
#define CONFIG_FEC_MXC_PHYADDR	0x1

#define CONFIG_MII

#define CONFIG_ARP_TIMEOUT	200UL

/*
 * Miscellaneous configurable options
 */
#define CONFIG_SYS_LONGHELP	/* undef to save memory */
#define CONFIG_CMDLINE_EDITING

#define CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_CBSIZE	512	/* Console I/O Buffer Size */
/* Print Buffer Size */
#define CONFIG_SYS_MAXARGS	32	/* max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */

#define CONFIG_SYS_MEMTEST_START	0	/* memtest works on */
#define CONFIG_SYS_MEMTEST_END		0x10000

#define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR

/*
 * Physical Memory Map
 */
#define CONFIG_NR_DRAM_BANKS	1
#define PHYS_SDRAM_1		CSD0_BASE_ADDR
#define PHYS_SDRAM_1_SIZE	(128 * 1024 * 1024)

#define CONFIG_SYS_SDRAM_BASE		CSD0_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_ADDR	(IRAM_BASE_ADDR + 0x10000)
#define CONFIG_SYS_INIT_RAM_SIZE		(IRAM_SIZE / 2)
#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - \
					GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + \
					CONFIG_SYS_GBL_DATA_OFFSET)

/*
 * MTD Command for mtdparts
 */
#define CONFIG_MTD_DEVICE
#define CONFIG_FLASH_CFI_MTD
#define CONFIG_MTD_PARTITIONS
#define MTDIDS_DEFAULT		"nand0=mxc_nand,nor0=physmap-flash.0"
#define MTDPARTS_DEFAULT	"mtdparts=mxc_nand:50m(root1)," \
				"32m(rootfb)," \
				"64m(pcache)," \
				"64m(app1)," \
				"10m(app2),-(spool);" \
				"physmap-flash.0:512k(u-boot),64k(env1)," \
				"64k(env2),3776k(kernel1),3776k(kernel2)"

/*
 * FLASH and environment organization
 */
#define CONFIG_SYS_FLASH_BASE		CS0_BASE_ADDR
#define CONFIG_SYS_MAX_FLASH_BANKS 1	/* max number of memory banks */
#define CONFIG_SYS_MAX_FLASH_SECT 512	/* max number of sectors on one chip */
/* Monitor at beginning of flash */
#define CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_FLASH_BASE
#define CONFIG_SYS_MONITOR_LEN		(512 * 1024)

#define CONFIG_ENV_SECT_SIZE	(64 * 1024)
#define CONFIG_ENV_SIZE		CONFIG_ENV_SECT_SIZE

/* Address and size of Redundant Environment Sector	*/
#define CONFIG_ENV_OFFSET_REDUND	(CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
#define CONFIG_ENV_SIZE_REDUND	CONFIG_ENV_SIZE

#define CONFIG_ENV_ADDR		(CONFIG_SYS_MONITOR_BASE + \
				CONFIG_SYS_MONITOR_LEN)

#define CONFIG_ENV_IS_IN_FLASH

/*
 * CFI FLASH driver setup
 */
#define CONFIG_SYS_FLASH_CFI		/* Flash memory is CFI compliant */
#define CONFIG_FLASH_CFI_DRIVER

/* A non-standard buffered write algorithm */
#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE	/* faster */
#define CONFIG_SYS_FLASH_PROTECTION	/* Use hardware sector protection */

/*
 * NAND FLASH driver setup
 */
#define CONFIG_NAND_MXC
#define CONFIG_MXC_NAND_REGS_BASE	(NFC_BASE_ADDR)
#define CONFIG_SYS_MAX_NAND_DEVICE	1
#define CONFIG_SYS_NAND_BASE		(NFC_BASE_ADDR)
#define CONFIG_MXC_NAND_HWECC
#define CONFIG_SYS_NAND_LARGEPAGE

/*
 * Default environment and default scripts
 * to update uboot and load kernel
 */

#define CONFIG_HOSTNAME flea3
#define	CONFIG_EXTRA_ENV_SETTINGS					\
	"netdev=eth0\0"							\
	"nfsargs=setenv bootargs root=/dev/nfs rw "			\
		"nfsroot=${serverip}:${rootpath}\0"			\
	"ramargs=setenv bootargs root=/dev/ram rw\0"			\
	"addip_sta=setenv bootargs ${bootargs} "			\
		"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"	\
		":${hostname}:${netdev}:off panic=1\0"			\
	"addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0"		\
	"addip=if test -n ${ipdyn};then run addip_dyn;"			\
		"else run addip_sta;fi\0"				\
	"addmtd=setenv bootargs ${bootargs} ${mtdparts}\0"		\
	"addtty=setenv bootargs ${bootargs}"				\
		" console=ttymxc2,${baudrate}\0"			\
	"addmisc=setenv bootargs ${bootargs} ${misc}\0"			\
	"loadaddr=80800000\0"						\
	"kernel_addr_r=80800000\0"					\
	"hostname=" __stringify(CONFIG_HOSTNAME) "\0"			\
	"bootfile=" __stringify(CONFIG_HOSTNAME) "/uImage\0"		\
	"ramdisk_file=" __stringify(CONFIG_HOSTNAME) "/uRamdisk\0"	\
	"flash_self=run ramargs addip addtty addmtd addmisc;"		\
		"bootm ${kernel_addr} ${ramdisk_addr}\0"		\
	"flash_nfs=run nfsargs addip addtty addmtd addmisc;"		\
		"bootm ${kernel_addr}\0"				\
	"net_nfs=tftp ${kernel_addr_r} ${bootfile}; "			\
		"run nfsargs addip addtty addmtd addmisc;"		\
		"bootm ${kernel_addr_r}\0"				\
	"net_self_load=tftp ${kernel_addr_r} ${bootfile};"		\
		"tftp ${ramdisk_addr_r} ${ramdisk_file};\0"		\
	"net_self=if run net_self_load;then "				\
		"run ramargs addip addtty addmtd addmisc;"		\
		"bootm ${kernel_addr_r} ${ramdisk_addr_r};"		\
		"else echo Images not loades;fi\0"			\
	"u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.bin\0"		\
	"load=tftp ${loadaddr} ${u-boot}\0"				\
	"uboot_addr=" __stringify(CONFIG_SYS_MONITOR_BASE) "\0"		\
	"update=protect off ${uboot_addr} +80000;"			\
		"erase ${uboot_addr} +80000;"				\
		"cp.b ${loadaddr} ${uboot_addr} ${filesize}\0"		\
	"upd=if run load;then echo Updating u-boot;if run update;"	\
		"then echo U-Boot updated;"				\
			"else echo Error updating u-boot !;"		\
			"echo Board without bootloader !!;"		\
		"fi;"							\
		"else echo U-Boot not downloaded..exiting;fi\0"		\
	"bootcmd=run net_nfs\0"

#endif				/* __CONFIG_H */
Commit	Line	Data
deb53483 SB	1	/*
	2	* (C) Copyright 2011, Stefano Babic <sbabic@denx.de>
	3	*
	4	* (C) Copyright 2008-2010 Freescale Semiconductor, Inc.
	5	*
	6	* Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
	7	*
	8	* Configuration for the flea3 board.
	9	*
3765b3e7	10	* SPDX-License-Identifier: GPL-2.0+
deb53483 SB	11	*/
	12
	13	#ifndef __CONFIG_H
	14	#define __CONFIG_H
	15
	16	#include <asm/arch/imx-regs.h>
	17
	18	/* High Level Configuration Options */
deb53483	19	#define CONFIG_MX35
deb53483 SB	20
	21	#define CONFIG_SYS_DCACHE_OFF
	22
deb53483 SB	23	#define CONFIG_MACH_TYPE MACH_TYPE_FLEA3
	24
	25	/* Set TEXT at the beginning of the NOR flash */
	26	#define CONFIG_SYS_TEXT_BASE 0xA0000000
	27
deb53483	28	/* This is required to setup the ESDC controller */
deb53483 SB	29
	30	#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
	31	#define CONFIG_REVISION_TAG
	32	#define CONFIG_SETUP_MEMORY_TAGS
	33	#define CONFIG_INITRD_TAG
	34
	35	/*
	36	* Size of malloc() pool
	37	*/
	38	#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024)
	39
	40	/*
	41	* Hardware drivers
	42	*/
b089d039	43	#define CONFIG_SYS_I2C
b089d039	44	#define CONFIG_SYS_I2C_MXC
03544c66 AA	45	#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
03544c66 AA	46	#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
f8cb101e	47	#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
b089d039	48	#define CONFIG_SYS_SPD_BUS_NUM 2 /* I2C3 */
b089d039	49	#define CONFIG_SYS_MXC_I2C3_SLAVE 0xfe
deb53483 SB	50	#define CONFIG_MXC_SPI
	51	#define CONFIG_MXC_GPIO
	52
	53	/*
	54	* UART (console)
	55	*/
	56	#define CONFIG_MXC_UART
40f6fffe	57	#define CONFIG_MXC_UART_BASE UART3_BASE
deb53483 SB	58
	59	/* allow to overwrite serial and ethaddr */
	60	#define CONFIG_ENV_OVERWRITE
	61	#define CONFIG_CONS_INDEX 1
deb53483 SB	62
	63	/*
	64	* Command definition
	65	*/
deb53483 SB	66	#define CONFIG_BOOTP_SUBNETMASK
	67	#define CONFIG_BOOTP_GATEWAY
	68	#define CONFIG_BOOTP_DNS
	69
	70	#define CONFIG_CMD_NAND
	71
deb53483 SB	72	#define CONFIG_NET_RETRY_COUNT 100
deb53483 SB	73
deb53483	74
fda241d5	75	#define CONFIG_LOADADDR 0x80800000 /* loadaddr env var */
deb53483	76
deb53483 SB	77	/*
	78	* Ethernet on SOC (FEC)
	79	*/
deb53483 SB	80	#define CONFIG_FEC_MXC
	81	#define IMX_FEC_BASE FEC_BASE_ADDR
	82	#define CONFIG_PHYLIB
	83	#define CONFIG_PHY_MICREL
	84	#define CONFIG_FEC_MXC_PHYADDR 0x1
	85
	86	#define CONFIG_MII
deb53483 SB	87
	88	#define CONFIG_ARP_TIMEOUT 200UL
	89
	90	/*
	91	* Miscellaneous configurable options
	92	*/
	93	#define CONFIG_SYS_LONGHELP /* undef to save memory */
deb53483	94	#define CONFIG_CMDLINE_EDITING
deb53483 SB	95
deb53483 SB	96	#define CONFIG_AUTO_COMPLETE
45a3ad81	97	#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
deb53483	98	/* Print Buffer Size */
45a3ad81	99	#define CONFIG_SYS_MAXARGS 32 /* max number of command args */
deb53483 SB	100	#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
	101
	102	#define CONFIG_SYS_MEMTEST_START 0 /* memtest works on */
	103	#define CONFIG_SYS_MEMTEST_END 0x10000
	104
deb53483 SB	105	#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
deb53483 SB	106
deb53483 SB	107	/*
	108	* Physical Memory Map
	109	*/
	110	#define CONFIG_NR_DRAM_BANKS 1
fda241d5	111	#define PHYS_SDRAM_1 CSD0_BASE_ADDR
deb53483 SB	112	#define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024)
deb53483 SB	113
fda241d5	114	#define CONFIG_SYS_SDRAM_BASE CSD0_BASE_ADDR
deb53483 SB	115	#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR + 0x10000)
	116	#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE / 2)
	117	#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
	118	GENERATED_GBL_DATA_SIZE)
	119	#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
	120	CONFIG_SYS_GBL_DATA_OFFSET)
	121
	122	/*
	123	* MTD Command for mtdparts
	124	*/
deb53483 SB	125	#define CONFIG_MTD_DEVICE
	126	#define CONFIG_FLASH_CFI_MTD
	127	#define CONFIG_MTD_PARTITIONS
	128	#define MTDIDS_DEFAULT "nand0=mxc_nand,nor0=physmap-flash.0"
fda241d5 SB	129	#define MTDPARTS_DEFAULT "mtdparts=mxc_nand:50m(root1)," \
	130	"32m(rootfb)," \
	131	"64m(pcache)," \
	132	"64m(app1)," \
	133	"10m(app2),-(spool);" \
deb53483 SB	134	"physmap-flash.0:512k(u-boot),64k(env1)," \
deb53483 SB	135	"64k(env2),3776k(kernel1),3776k(kernel2)"
fda241d5	136
deb53483 SB	137	/*
	138	* FLASH and environment organization
	139	*/
	140	#define CONFIG_SYS_FLASH_BASE CS0_BASE_ADDR
	141	#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
	142	#define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */
	143	/* Monitor at beginning of flash */
	144	#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
	145	#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
	146
	147	#define CONFIG_ENV_SECT_SIZE (64 * 1024)
	148	#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
	149
	150	/* Address and size of Redundant Environment Sector */
	151	#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
	152	#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
	153
	154	#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + \
	155	CONFIG_SYS_MONITOR_LEN)
	156
	157	#define CONFIG_ENV_IS_IN_FLASH
	158
	159	/*
	160	* CFI FLASH driver setup
	161	*/
	162	#define CONFIG_SYS_FLASH_CFI /* Flash memory is CFI compliant */
	163	#define CONFIG_FLASH_CFI_DRIVER
	164
	165	/* A non-standard buffered write algorithm */
	166	#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* faster */
	167	#define CONFIG_SYS_FLASH_PROTECTION /* Use hardware sector protection */
	168
	169	/*
	170	* NAND FLASH driver setup
	171	*/
	172	#define CONFIG_NAND_MXC
deb53483 SB	173	#define CONFIG_MXC_NAND_REGS_BASE (NFC_BASE_ADDR)
	174	#define CONFIG_SYS_MAX_NAND_DEVICE 1
	175	#define CONFIG_SYS_NAND_BASE (NFC_BASE_ADDR)
	176	#define CONFIG_MXC_NAND_HWECC
	177	#define CONFIG_SYS_NAND_LARGEPAGE
	178
	179	/*
	180	* Default environment and default scripts
	181	* to update uboot and load kernel
	182	*/
deb53483 SB	183
	184	#define CONFIG_HOSTNAME flea3
	185	#define CONFIG_EXTRA_ENV_SETTINGS \
	186	"netdev=eth0\0" \
	187	"nfsargs=setenv bootargs root=/dev/nfs rw " \
	188	"nfsroot=${serverip}:${rootpath}\0" \
	189	"ramargs=setenv bootargs root=/dev/ram rw\0" \
	190	"addip_sta=setenv bootargs ${bootargs} " \
	191	"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
	192	":${hostname}:${netdev}:off panic=1\0" \
	193	"addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \
	194	"addip=if test -n ${ipdyn};then run addip_dyn;" \
93ea89f0	195	"else run addip_sta;fi\0" \
deb53483 SB	196	"addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
deb53483 SB	197	"addtty=setenv bootargs ${bootargs}" \
fda241d5	198	" console=ttymxc2,${baudrate}\0" \
deb53483	199	"addmisc=setenv bootargs ${bootargs} ${misc}\0" \
fda241d5 SB	200	"loadaddr=80800000\0" \
fda241d5 SB	201	"kernel_addr_r=80800000\0" \
93ea89f0 MV	202	"hostname=" __stringify(CONFIG_HOSTNAME) "\0" \
	203	"bootfile=" __stringify(CONFIG_HOSTNAME) "/uImage\0" \
	204	"ramdisk_file=" __stringify(CONFIG_HOSTNAME) "/uRamdisk\0" \
deb53483 SB	205	"flash_self=run ramargs addip addtty addmtd addmisc;" \
	206	"bootm ${kernel_addr} ${ramdisk_addr}\0" \
	207	"flash_nfs=run nfsargs addip addtty addmtd addmisc;" \
	208	"bootm ${kernel_addr}\0" \
	209	"net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \
	210	"run nfsargs addip addtty addmtd addmisc;" \
	211	"bootm ${kernel_addr_r}\0" \
	212	"net_self_load=tftp ${kernel_addr_r} ${bootfile};" \
	213	"tftp ${ramdisk_addr_r} ${ramdisk_file};\0" \
	214	"net_self=if run net_self_load;then " \
	215	"run ramargs addip addtty addmtd addmisc;" \
	216	"bootm ${kernel_addr_r} ${ramdisk_addr_r};" \
	217	"else echo Images not loades;fi\0" \
93ea89f0	218	"u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.bin\0" \
deb53483	219	"load=tftp ${loadaddr} ${u-boot}\0" \
93ea89f0	220	"uboot_addr=" __stringify(CONFIG_SYS_MONITOR_BASE) "\0" \
45a3ad81 HS	221	"update=protect off ${uboot_addr} +80000;" \
45a3ad81 HS	222	"erase ${uboot_addr} +80000;" \
deb53483 SB	223	"cp.b ${loadaddr} ${uboot_addr} ${filesize}\0" \
	224	"upd=if run load;then echo Updating u-boot;if run update;" \
	225	"then echo U-Boot updated;" \
	226	"else echo Error updating u-boot !;" \
	227	"echo Board without bootloader !!;" \
	228	"fi;" \
	229	"else echo U-Boot not downloaded..exiting;fi\0" \
	230	"bootcmd=run net_nfs\0"
	231
	232	#endif /* __CONFIG_H */