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f9162b15 AB |
1 | /* |
2 | * Copyright (C) 2015 Timesys Corporation | |
3 | * Copyright (C) 2015 General Electric Company | |
4 | * Copyright (C) 2014 Advantech | |
5 | * Copyright (C) 2012 Freescale Semiconductor, Inc. | |
6 | * | |
7 | * Configuration settings for the GE MX6Q Bx50v3 boards. | |
8 | * | |
9 | * SPDX-License-Identifier: GPL-2.0+ | |
10 | */ | |
11 | ||
12 | #ifndef __GE_BX50V3_CONFIG_H | |
13 | #define __GE_BX50V3_CONFIG_H | |
14 | ||
15 | #include <asm/arch/imx-regs.h> | |
552a848e | 16 | #include <asm/mach-imx/gpio.h> |
f9162b15 | 17 | |
3dddc793 | 18 | #define BX50V3_BOOTARGS_EXTRA |
f9162b15 AB |
19 | #if defined(CONFIG_TARGET_GE_B450V3) |
20 | #define CONFIG_BOARD_NAME "General Electric B450v3" | |
f9162b15 AB |
21 | #elif defined(CONFIG_TARGET_GE_B650V3) |
22 | #define CONFIG_BOARD_NAME "General Electric B650v3" | |
f9162b15 AB |
23 | #elif defined(CONFIG_TARGET_GE_B850V3) |
24 | #define CONFIG_BOARD_NAME "General Electric B850v3" | |
3dddc793 KL |
25 | #undef BX50V3_BOOTARGS_EXTRA |
26 | #define BX50V3_BOOTARGS_EXTRA "video=DP-1:1024x768@60 " \ | |
27 | "video=HDMI-A-1:1024x768@60 " | |
f9162b15 AB |
28 | #else |
29 | #define CONFIG_BOARD_NAME "General Electric BA16 Generic" | |
f9162b15 AB |
30 | #endif |
31 | ||
32 | #define CONFIG_MXC_UART_BASE UART3_BASE | |
12ca05a3 | 33 | #define CONSOLE_DEV "ttymxc2" |
f9162b15 | 34 | |
f9162b15 AB |
35 | #define CONFIG_SUPPORT_EMMC_BOOT |
36 | ||
f9162b15 AB |
37 | |
38 | #include "mx6_common.h" | |
39 | #include <linux/sizes.h> | |
40 | ||
f9162b15 AB |
41 | #define CONFIG_CMDLINE_TAG |
42 | #define CONFIG_SETUP_MEMORY_TAGS | |
43 | #define CONFIG_INITRD_TAG | |
44 | #define CONFIG_REVISION_TAG | |
45 | #define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M) | |
46 | ||
6d656495 MW |
47 | #define CONFIG_HW_WATCHDOG |
48 | #define CONFIG_IMX_WATCHDOG | |
49 | #define CONFIG_WATCHDOG_TIMEOUT_MSECS 6000 | |
50 | ||
cf678b31 MW |
51 | #define CONFIG_LAST_STAGE_INIT |
52 | ||
f9162b15 AB |
53 | #define CONFIG_MXC_UART |
54 | ||
f9162b15 AB |
55 | #define CONFIG_MXC_OCOTP |
56 | ||
57 | /* SATA Configs */ | |
aacc10c5 | 58 | #ifdef CONFIG_CMD_SATA |
f9162b15 AB |
59 | #define CONFIG_SYS_SATA_MAX_DEVICE 1 |
60 | #define CONFIG_DWC_AHSATA_PORT_ID 0 | |
61 | #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR | |
62 | #define CONFIG_LBA48 | |
aacc10c5 | 63 | #endif |
f9162b15 AB |
64 | |
65 | /* MMC Configs */ | |
66 | #define CONFIG_FSL_ESDHC | |
67 | #define CONFIG_FSL_USDHC | |
68 | #define CONFIG_SYS_FSL_ESDHC_ADDR 0 | |
f9162b15 | 69 | #define CONFIG_BOUNCE_BUFFER |
f9162b15 AB |
70 | |
71 | /* USB Configs */ | |
fc44902a | 72 | #ifdef CONFIG_USB |
f9162b15 AB |
73 | #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 |
74 | #define CONFIG_EHCI_HCD_INIT_AFTER_RESET | |
75 | #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) | |
76 | #define CONFIG_MXC_USB_FLAGS 0 | |
f9162b15 | 77 | |
f9162b15 | 78 | #define CONFIG_USBD_HS |
f9162b15 | 79 | #define CONFIG_USB_GADGET_MASS_STORAGE |
fc44902a | 80 | #endif |
f9162b15 AB |
81 | |
82 | /* Networking Configs */ | |
c26ffd9b | 83 | #ifdef CONFIG_NET |
f9162b15 AB |
84 | #define CONFIG_FEC_MXC |
85 | #define CONFIG_MII | |
86 | #define IMX_FEC_BASE ENET_BASE_ADDR | |
87 | #define CONFIG_FEC_XCV_TYPE RGMII | |
88 | #define CONFIG_ETHPRIME "FEC" | |
89 | #define CONFIG_FEC_MXC_PHYADDR 4 | |
f9162b15 | 90 | #define CONFIG_PHY_ATHEROS |
c26ffd9b | 91 | #endif |
f9162b15 AB |
92 | |
93 | /* Serial Flash */ | |
f9162b15 | 94 | #ifdef CONFIG_CMD_SF |
f9162b15 AB |
95 | #define CONFIG_SF_DEFAULT_BUS 0 |
96 | #define CONFIG_SF_DEFAULT_CS 0 | |
97 | #define CONFIG_SF_DEFAULT_SPEED 20000000 | |
98 | #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 | |
99 | #endif | |
100 | ||
101 | /* allow to overwrite serial and ethaddr */ | |
102 | #define CONFIG_ENV_OVERWRITE | |
103 | #define CONFIG_CONS_INDEX 1 | |
f9162b15 | 104 | |
f9162b15 | 105 | #define CONFIG_LOADADDR 0x12000000 |
f9162b15 AB |
106 | |
107 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
9e41b54a | 108 | "bootcause=POR\0" \ |
44395c85 | 109 | "bootlimit=10\0" \ |
f07b3148 | 110 | "image=/boot/fitImage\0" \ |
9e41b54a IR |
111 | "fdt_high=0xffffffff\0" \ |
112 | "dev=mmc\0" \ | |
113 | "devnum=1\0" \ | |
114 | "rootdev=mmcblk0p\0" \ | |
115 | "quiet=quiet loglevel=0\0" \ | |
12ca05a3 | 116 | "console=" CONSOLE_DEV "\0" \ |
9e41b54a IR |
117 | "setargs=setenv bootargs root=/dev/${rootdev}${partnum} " \ |
118 | "ro rootwait cma=128M " \ | |
119 | "bootcause=${bootcause} " \ | |
886678fc | 120 | "${quiet} console=${console} ${rtc_status} " \ |
3dddc793 | 121 | BX50V3_BOOTARGS_EXTRA "\0" \ |
9e41b54a IR |
122 | "doquiet=" \ |
123 | "if ext2load ${dev} ${devnum}:5 0x7000A000 /boot/console; " \ | |
124 | "then setenv quiet; fi\0" \ | |
125 | "hasfirstboot=" \ | |
126 | "ext2load ${dev} ${devnum}:${partnum} 0x7000A000 " \ | |
127 | "/boot/bootcause/firstboot\0" \ | |
128 | "swappartitions=" \ | |
129 | "setexpr partnum 3 - ${partnum}\0" \ | |
130 | "failbootcmd=" \ | |
131 | "msg=\"Monitor failed to start. Try again, or contact GE Service for support.\"; " \ | |
132 | "echo $msg; " \ | |
133 | "setenv stdout vga; " \ | |
134 | "echo \"\n\n\n\n \" $msg; " \ | |
135 | "setenv stdout serial; " \ | |
136 | "mw.b 0x7000A000 0xbc; " \ | |
137 | "mw.b 0x7000A001 0x00; " \ | |
138 | "ext4write ${dev} ${devnum}:5 0x7000A000 /boot/failures 2\0" \ | |
139 | "altbootcmd=" \ | |
140 | "run doquiet; " \ | |
141 | "setenv partnum 1; run hasfirstboot || setenv partnum 2; " \ | |
142 | "run hasfirstboot || setenv partnum 0; " \ | |
143 | "if test ${partnum} != 0; then " \ | |
144 | "setenv bootcause REVERT; " \ | |
145 | "run swappartitions loadimage doboot; " \ | |
146 | "fi; " \ | |
147 | "run failbootcmd\0" \ | |
f9162b15 AB |
148 | "loadimage=" \ |
149 | "ext2load ${dev} ${devnum}:${partnum} ${loadaddr} ${image}\0" \ | |
9e41b54a IR |
150 | "doboot=" \ |
151 | "echo Booting from ${dev}:${devnum}:${partnum} ...; " \ | |
f9162b15 | 152 | "run setargs; " \ |
9e41b54a IR |
153 | "bootm ${loadaddr}#conf@${confidx}\0" \ |
154 | "tryboot=" \ | |
155 | "setenv partnum 1; run hasfirstboot || setenv partnum 2; " \ | |
156 | "run loadimage || run swappartitions && run loadimage || " \ | |
157 | "setenv partnum 0 && echo MISSING IMAGE;" \ | |
158 | "run doboot; " \ | |
159 | "run failbootcmd\0" \ | |
f9162b15 | 160 | |
fc44902a | 161 | #define CONFIG_MMCBOOTCOMMAND \ |
f9162b15 | 162 | "if mmc dev ${devnum}; then " \ |
9e41b54a | 163 | "run doquiet; " \ |
f9162b15 AB |
164 | "run tryboot; " \ |
165 | "fi; " \ | |
fc44902a AS |
166 | |
167 | #define CONFIG_USBBOOTCOMMAND \ | |
f07b3148 | 168 | "echo Unsupported; " \ |
f9162b15 | 169 | |
fc44902a AS |
170 | #ifdef CONFIG_CMD_USB |
171 | #define CONFIG_BOOTCOMMAND CONFIG_USBBOOTCOMMAND | |
172 | #else | |
173 | #define CONFIG_BOOTCOMMAND CONFIG_MMCBOOTCOMMAND | |
174 | #endif | |
175 | ||
f9162b15 AB |
176 | #define CONFIG_ARP_TIMEOUT 200UL |
177 | ||
178 | /* Miscellaneous configurable options */ | |
179 | #define CONFIG_SYS_LONGHELP | |
f9162b15 AB |
180 | #define CONFIG_AUTO_COMPLETE |
181 | ||
f9162b15 AB |
182 | #define CONFIG_SYS_MEMTEST_START 0x10000000 |
183 | #define CONFIG_SYS_MEMTEST_END 0x10010000 | |
184 | #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 | |
185 | ||
186 | #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR | |
187 | ||
188 | #define CONFIG_CMDLINE_EDITING | |
f9162b15 AB |
189 | |
190 | /* Physical Memory Map */ | |
191 | #define CONFIG_NR_DRAM_BANKS 1 | |
192 | #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR | |
193 | ||
194 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM | |
195 | #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR | |
196 | #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE | |
197 | ||
198 | #define CONFIG_SYS_INIT_SP_OFFSET \ | |
199 | (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) | |
200 | #define CONFIG_SYS_INIT_SP_ADDR \ | |
201 | (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) | |
202 | ||
e856bdcf | 203 | /* environment organization */ |
f9162b15 AB |
204 | #define CONFIG_ENV_SIZE (8 * 1024) |
205 | #define CONFIG_ENV_OFFSET (768 * 1024) | |
206 | #define CONFIG_ENV_SECT_SIZE (64 * 1024) | |
207 | #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS | |
208 | #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS | |
209 | #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE | |
210 | #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED | |
211 | ||
f9162b15 | 212 | #ifndef CONFIG_SYS_DCACHE_OFF |
f9162b15 AB |
213 | #endif |
214 | ||
215 | #define CONFIG_SYS_FSL_USDHC_NUM 3 | |
216 | ||
217 | /* Framebuffer */ | |
9e41b54a | 218 | #define CONFIG_VIDEO |
07aa030a | 219 | #ifdef CONFIG_VIDEO |
f9162b15 | 220 | #define CONFIG_VIDEO_IPUV3 |
9e41b54a IR |
221 | #define CONFIG_CFB_CONSOLE |
222 | #define CONFIG_VGA_AS_SINGLE_DEVICE | |
223 | #define CONFIG_SYS_CONSOLE_FG_COL 0xFF | |
224 | #define CONFIG_SYS_CONSOLE_BG_COL 0x00 | |
225 | #define CONFIG_HIDE_LOGO_VERSION | |
f9162b15 AB |
226 | #define CONFIG_IMX_HDMI |
227 | #define CONFIG_IMX_VIDEO_SKIP | |
9e41b54a | 228 | #define CONFIG_CMD_BMP |
07aa030a | 229 | #endif |
f9162b15 | 230 | |
54971ac6 AB |
231 | #define CONFIG_PWM_IMX |
232 | #define CONFIG_IMX6_PWM_PER_CLK 66000000 | |
233 | ||
3414913c IR |
234 | #define CONFIG_PCI |
235 | #define CONFIG_PCI_PNP | |
f9162b15 AB |
236 | #define CONFIG_PCI_SCAN_SHOW |
237 | #define CONFIG_PCIE_IMX | |
238 | #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12) | |
239 | #define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(1, 5) | |
f9162b15 | 240 | |
886678fc NH |
241 | #define CONFIG_RTC_RX8010SJ |
242 | #define CONFIG_SYS_RTC_BUS_NUM 2 | |
243 | #define CONFIG_SYS_I2C_RTC_ADDR 0x32 | |
244 | ||
f9162b15 | 245 | /* I2C Configs */ |
f9162b15 AB |
246 | #define CONFIG_SYS_I2C |
247 | #define CONFIG_SYS_I2C_MXC | |
248 | #define CONFIG_SYS_I2C_SPEED 100000 | |
249 | #define CONFIG_SYS_I2C_MXC_I2C1 | |
250 | #define CONFIG_SYS_I2C_MXC_I2C2 | |
251 | #define CONFIG_SYS_I2C_MXC_I2C3 | |
252 | ||
87da89e8 | 253 | #define CONFIG_SYS_NUM_I2C_BUSES 11 |
be2808c3 IR |
254 | #define CONFIG_SYS_I2C_MAX_HOPS 1 |
255 | #define CONFIG_SYS_I2C_BUSES { {0, {I2C_NULL_HOP} }, \ | |
87da89e8 MW |
256 | {1, {I2C_NULL_HOP} }, \ |
257 | {2, {I2C_NULL_HOP} }, \ | |
be2808c3 IR |
258 | {0, {{I2C_MUX_PCA9547, 0x70, 0} } }, \ |
259 | {0, {{I2C_MUX_PCA9547, 0x70, 1} } }, \ | |
260 | {0, {{I2C_MUX_PCA9547, 0x70, 2} } }, \ | |
261 | {0, {{I2C_MUX_PCA9547, 0x70, 3} } }, \ | |
262 | {0, {{I2C_MUX_PCA9547, 0x70, 4} } }, \ | |
263 | {0, {{I2C_MUX_PCA9547, 0x70, 5} } }, \ | |
264 | {0, {{I2C_MUX_PCA9547, 0x70, 6} } }, \ | |
265 | {0, {{I2C_MUX_PCA9547, 0x70, 7} } }, \ | |
266 | } | |
267 | ||
268 | #define CONFIG_BCH | |
269 | ||
44395c85 IR |
270 | #define CONFIG_BOOTCOUNT_EXT |
271 | #define CONFIG_SYS_BOOTCOUNT_EXT_INTERFACE "mmc" | |
272 | #define CONFIG_SYS_BOOTCOUNT_EXT_DEVPART "1:5" | |
273 | #define CONFIG_SYS_BOOTCOUNT_EXT_NAME "/boot/failures" | |
274 | #define CONFIG_SYS_BOOTCOUNT_ADDR 0x7000A000 | |
275 | ||
f9162b15 | 276 | #endif /* __GE_BX50V3_CONFIG_H */ |