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f9162b15 AB |
1 | /* |
2 | * Copyright (C) 2015 Timesys Corporation | |
3 | * Copyright (C) 2015 General Electric Company | |
4 | * Copyright (C) 2014 Advantech | |
5 | * Copyright (C) 2012 Freescale Semiconductor, Inc. | |
6 | * | |
7 | * Configuration settings for the GE MX6Q Bx50v3 boards. | |
8 | * | |
9 | * SPDX-License-Identifier: GPL-2.0+ | |
10 | */ | |
11 | ||
12 | #ifndef __GE_BX50V3_CONFIG_H | |
13 | #define __GE_BX50V3_CONFIG_H | |
14 | ||
15 | #include <asm/arch/imx-regs.h> | |
552a848e | 16 | #include <asm/mach-imx/gpio.h> |
f9162b15 | 17 | |
3dddc793 | 18 | #define BX50V3_BOOTARGS_EXTRA |
f9162b15 AB |
19 | #if defined(CONFIG_TARGET_GE_B450V3) |
20 | #define CONFIG_BOARD_NAME "General Electric B450v3" | |
f9162b15 AB |
21 | #elif defined(CONFIG_TARGET_GE_B650V3) |
22 | #define CONFIG_BOARD_NAME "General Electric B650v3" | |
f9162b15 AB |
23 | #elif defined(CONFIG_TARGET_GE_B850V3) |
24 | #define CONFIG_BOARD_NAME "General Electric B850v3" | |
3dddc793 KL |
25 | #undef BX50V3_BOOTARGS_EXTRA |
26 | #define BX50V3_BOOTARGS_EXTRA "video=DP-1:1024x768@60 " \ | |
27 | "video=HDMI-A-1:1024x768@60 " | |
f9162b15 AB |
28 | #else |
29 | #define CONFIG_BOARD_NAME "General Electric BA16 Generic" | |
f9162b15 AB |
30 | #endif |
31 | ||
32 | #define CONFIG_MXC_UART_BASE UART3_BASE | |
12ca05a3 | 33 | #define CONSOLE_DEV "ttymxc2" |
f9162b15 | 34 | |
f9162b15 AB |
35 | #define CONFIG_SUPPORT_EMMC_BOOT |
36 | ||
f9162b15 AB |
37 | |
38 | #include "mx6_common.h" | |
39 | #include <linux/sizes.h> | |
40 | ||
f9162b15 AB |
41 | #define CONFIG_CMDLINE_TAG |
42 | #define CONFIG_SETUP_MEMORY_TAGS | |
43 | #define CONFIG_INITRD_TAG | |
44 | #define CONFIG_REVISION_TAG | |
45 | #define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M) | |
46 | ||
cf678b31 MW |
47 | #define CONFIG_LAST_STAGE_INIT |
48 | ||
f9162b15 AB |
49 | #define CONFIG_MXC_GPIO |
50 | #define CONFIG_MXC_UART | |
51 | ||
f9162b15 AB |
52 | #define CONFIG_MXC_OCOTP |
53 | ||
54 | /* SATA Configs */ | |
aacc10c5 | 55 | #ifdef CONFIG_CMD_SATA |
f9162b15 AB |
56 | #define CONFIG_SYS_SATA_MAX_DEVICE 1 |
57 | #define CONFIG_DWC_AHSATA_PORT_ID 0 | |
58 | #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR | |
59 | #define CONFIG_LBA48 | |
aacc10c5 | 60 | #endif |
f9162b15 AB |
61 | |
62 | /* MMC Configs */ | |
63 | #define CONFIG_FSL_ESDHC | |
64 | #define CONFIG_FSL_USDHC | |
65 | #define CONFIG_SYS_FSL_ESDHC_ADDR 0 | |
f9162b15 | 66 | #define CONFIG_BOUNCE_BUFFER |
f9162b15 AB |
67 | |
68 | /* USB Configs */ | |
fc44902a | 69 | #ifdef CONFIG_USB |
f9162b15 AB |
70 | #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 |
71 | #define CONFIG_EHCI_HCD_INIT_AFTER_RESET | |
72 | #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) | |
73 | #define CONFIG_MXC_USB_FLAGS 0 | |
f9162b15 | 74 | |
f9162b15 | 75 | #define CONFIG_USBD_HS |
f9162b15 | 76 | #define CONFIG_USB_GADGET_MASS_STORAGE |
fc44902a | 77 | #endif |
f9162b15 AB |
78 | |
79 | /* Networking Configs */ | |
c26ffd9b | 80 | #ifdef CONFIG_NET |
f9162b15 AB |
81 | #define CONFIG_FEC_MXC |
82 | #define CONFIG_MII | |
83 | #define IMX_FEC_BASE ENET_BASE_ADDR | |
84 | #define CONFIG_FEC_XCV_TYPE RGMII | |
85 | #define CONFIG_ETHPRIME "FEC" | |
86 | #define CONFIG_FEC_MXC_PHYADDR 4 | |
f9162b15 | 87 | #define CONFIG_PHY_ATHEROS |
c26ffd9b | 88 | #endif |
f9162b15 AB |
89 | |
90 | /* Serial Flash */ | |
f9162b15 AB |
91 | #ifdef CONFIG_CMD_SF |
92 | #define CONFIG_MXC_SPI | |
93 | #define CONFIG_SF_DEFAULT_BUS 0 | |
94 | #define CONFIG_SF_DEFAULT_CS 0 | |
95 | #define CONFIG_SF_DEFAULT_SPEED 20000000 | |
96 | #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 | |
97 | #endif | |
98 | ||
99 | /* allow to overwrite serial and ethaddr */ | |
100 | #define CONFIG_ENV_OVERWRITE | |
101 | #define CONFIG_CONS_INDEX 1 | |
f9162b15 | 102 | |
f9162b15 AB |
103 | #define CONFIG_LOADADDR 0x12000000 |
104 | #define CONFIG_SYS_TEXT_BASE 0x17800000 | |
105 | ||
106 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
107 | "script=boot.scr\0" \ | |
108 | "image=/boot/uImage\0" \ | |
109 | "uboot=u-boot.imx\0" \ | |
110 | "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \ | |
111 | "fdt_addr=0x18000000\0" \ | |
112 | "boot_fdt=yes\0" \ | |
113 | "ip_dyn=yes\0" \ | |
12ca05a3 | 114 | "console=" CONSOLE_DEV "\0" \ |
f9162b15 AB |
115 | "fdt_high=0xffffffff\0" \ |
116 | "initrd_high=0xffffffff\0" \ | |
117 | "sddev=0\0" \ | |
118 | "emmcdev=1\0" \ | |
119 | "partnum=1\0" \ | |
120 | "update_sd_firmware=" \ | |
121 | "if test ${ip_dyn} = yes; then " \ | |
122 | "setenv get_cmd dhcp; " \ | |
123 | "else " \ | |
124 | "setenv get_cmd tftp; " \ | |
125 | "fi; " \ | |
126 | "if mmc dev ${mmcdev}; then " \ | |
127 | "if ${get_cmd} ${update_sd_firmware_filename}; then " \ | |
128 | "setexpr fw_sz ${filesize} / 0x200; " \ | |
129 | "setexpr fw_sz ${fw_sz} + 1; " \ | |
130 | "mmc write ${loadaddr} 0x2 ${fw_sz}; " \ | |
131 | "fi; " \ | |
132 | "fi\0" \ | |
133 | "update_sf_uboot=" \ | |
134 | "if tftp $loadaddr $uboot; then " \ | |
135 | "sf probe; " \ | |
136 | "sf erase 0 0xC0000; " \ | |
137 | "sf write $loadaddr 0x400 $filesize; " \ | |
138 | "echo 'U-Boot upgraded. Please reset'; " \ | |
139 | "fi\0" \ | |
140 | "setargs=setenv bootargs console=${console},${baudrate} " \ | |
3dddc793 KL |
141 | "root=/dev/${rootdev} rw rootwait cma=128M " \ |
142 | BX50V3_BOOTARGS_EXTRA "\0" \ | |
f9162b15 AB |
143 | "loadbootscript=" \ |
144 | "ext2load ${dev} ${devnum}:${partnum} ${loadaddr} ${script};\0" \ | |
145 | "bootscript=echo Running bootscript from ${dev}:${devnum}:${partnum};" \ | |
146 | " source\0" \ | |
147 | "loadimage=" \ | |
148 | "ext2load ${dev} ${devnum}:${partnum} ${loadaddr} ${image}\0" \ | |
149 | "loadfdt=ext2load ${dev} ${devnum}:${partnum} ${fdt_addr} ${fdt_file}\0" \ | |
150 | "tryboot=" \ | |
151 | "if run loadbootscript; then " \ | |
152 | "run bootscript; " \ | |
153 | "else " \ | |
154 | "if run loadimage; then " \ | |
155 | "run doboot; " \ | |
156 | "fi; " \ | |
157 | "fi;\0" \ | |
158 | "doboot=echo Booting from ${dev}:${devnum}:${partnum} ...; " \ | |
159 | "run setargs; " \ | |
160 | "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ | |
161 | "if run loadfdt; then " \ | |
162 | "bootm ${loadaddr} - ${fdt_addr}; " \ | |
163 | "else " \ | |
164 | "if test ${boot_fdt} = try; then " \ | |
165 | "bootm; " \ | |
166 | "else " \ | |
167 | "echo WARN: Cannot load the DT; " \ | |
168 | "fi; " \ | |
169 | "fi; " \ | |
170 | "else " \ | |
171 | "bootm; " \ | |
172 | "fi;\0" \ | |
173 | "netargs=setenv bootargs console=${console},${baudrate} " \ | |
174 | "root=/dev/nfs " \ | |
175 | "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ | |
176 | "netboot=echo Booting from net ...; " \ | |
177 | "run netargs; " \ | |
178 | "if test ${ip_dyn} = yes; then " \ | |
179 | "setenv get_cmd dhcp; " \ | |
180 | "else " \ | |
181 | "setenv get_cmd tftp; " \ | |
182 | "fi; " \ | |
183 | "${get_cmd} ${image}; " \ | |
184 | "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ | |
185 | "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ | |
186 | "bootm ${loadaddr} - ${fdt_addr}; " \ | |
187 | "else " \ | |
188 | "if test ${boot_fdt} = try; then " \ | |
189 | "bootm; " \ | |
190 | "else " \ | |
191 | "echo WARN: Cannot load the DT; " \ | |
192 | "fi; " \ | |
193 | "fi; " \ | |
194 | "else " \ | |
195 | "bootm; " \ | |
196 | "fi;\0" \ | |
197 | ||
fc44902a | 198 | #define CONFIG_MMCBOOTCOMMAND \ |
f9162b15 | 199 | "setenv dev mmc; " \ |
f6825e4a | 200 | "setenv rootdev mmcblk0p${partnum}; " \ |
f9162b15 AB |
201 | \ |
202 | "setenv devnum ${sddev}; " \ | |
203 | "if mmc dev ${devnum}; then " \ | |
204 | "run tryboot; " \ | |
f6825e4a | 205 | "setenv rootdev mmcblk1p${partnum}; " \ |
f9162b15 AB |
206 | "fi; " \ |
207 | \ | |
208 | "setenv devnum ${emmcdev}; " \ | |
209 | "if mmc dev ${devnum}; then " \ | |
210 | "run tryboot; " \ | |
211 | "fi; " \ | |
fc44902a AS |
212 | |
213 | #define CONFIG_USBBOOTCOMMAND \ | |
214 | "usb start; " \ | |
215 | "setenv dev usb; " \ | |
216 | "setenv devnum 0; " \ | |
f6825e4a | 217 | "setenv rootdev sda${partnum}; " \ |
fc44902a | 218 | "run tryboot; " \ |
f9162b15 | 219 | \ |
fc44902a | 220 | CONFIG_MMCBOOTCOMMAND \ |
f9162b15 AB |
221 | "bmode usb; " \ |
222 | ||
fc44902a AS |
223 | #ifdef CONFIG_CMD_USB |
224 | #define CONFIG_BOOTCOMMAND CONFIG_USBBOOTCOMMAND | |
225 | #else | |
226 | #define CONFIG_BOOTCOMMAND CONFIG_MMCBOOTCOMMAND | |
227 | #endif | |
228 | ||
f9162b15 AB |
229 | #define CONFIG_ARP_TIMEOUT 200UL |
230 | ||
231 | /* Miscellaneous configurable options */ | |
232 | #define CONFIG_SYS_LONGHELP | |
f9162b15 AB |
233 | #define CONFIG_AUTO_COMPLETE |
234 | ||
f9162b15 AB |
235 | #define CONFIG_SYS_MEMTEST_START 0x10000000 |
236 | #define CONFIG_SYS_MEMTEST_END 0x10010000 | |
237 | #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 | |
238 | ||
239 | #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR | |
240 | ||
241 | #define CONFIG_CMDLINE_EDITING | |
f9162b15 AB |
242 | |
243 | /* Physical Memory Map */ | |
244 | #define CONFIG_NR_DRAM_BANKS 1 | |
245 | #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR | |
246 | ||
247 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM | |
248 | #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR | |
249 | #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE | |
250 | ||
251 | #define CONFIG_SYS_INIT_SP_OFFSET \ | |
252 | (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) | |
253 | #define CONFIG_SYS_INIT_SP_ADDR \ | |
254 | (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) | |
255 | ||
e856bdcf | 256 | /* environment organization */ |
f9162b15 AB |
257 | #define CONFIG_ENV_SIZE (8 * 1024) |
258 | #define CONFIG_ENV_OFFSET (768 * 1024) | |
259 | #define CONFIG_ENV_SECT_SIZE (64 * 1024) | |
260 | #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS | |
261 | #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS | |
262 | #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE | |
263 | #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED | |
264 | ||
f9162b15 | 265 | #ifndef CONFIG_SYS_DCACHE_OFF |
f9162b15 AB |
266 | #endif |
267 | ||
268 | #define CONFIG_SYS_FSL_USDHC_NUM 3 | |
269 | ||
270 | /* Framebuffer */ | |
07aa030a | 271 | #ifdef CONFIG_VIDEO |
f9162b15 | 272 | #define CONFIG_VIDEO_IPUV3 |
f9162b15 AB |
273 | #define CONFIG_VIDEO_BMP_RLE8 |
274 | #define CONFIG_SPLASH_SCREEN | |
275 | #define CONFIG_SPLASH_SCREEN_ALIGN | |
276 | #define CONFIG_BMP_16BPP | |
277 | #define CONFIG_VIDEO_LOGO | |
278 | #define CONFIG_VIDEO_BMP_LOGO | |
f9162b15 AB |
279 | #define CONFIG_IMX_HDMI |
280 | #define CONFIG_IMX_VIDEO_SKIP | |
07aa030a | 281 | #endif |
f9162b15 | 282 | |
54971ac6 AB |
283 | #define CONFIG_PWM_IMX |
284 | #define CONFIG_IMX6_PWM_PER_CLK 66000000 | |
285 | ||
3414913c IR |
286 | #define CONFIG_PCI |
287 | #define CONFIG_PCI_PNP | |
f9162b15 AB |
288 | #define CONFIG_PCI_SCAN_SHOW |
289 | #define CONFIG_PCIE_IMX | |
290 | #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12) | |
291 | #define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(1, 5) | |
f9162b15 AB |
292 | |
293 | /* I2C Configs */ | |
f9162b15 AB |
294 | #define CONFIG_SYS_I2C |
295 | #define CONFIG_SYS_I2C_MXC | |
296 | #define CONFIG_SYS_I2C_SPEED 100000 | |
297 | #define CONFIG_SYS_I2C_MXC_I2C1 | |
298 | #define CONFIG_SYS_I2C_MXC_I2C2 | |
299 | #define CONFIG_SYS_I2C_MXC_I2C3 | |
300 | ||
87da89e8 | 301 | #define CONFIG_SYS_NUM_I2C_BUSES 11 |
be2808c3 IR |
302 | #define CONFIG_SYS_I2C_MAX_HOPS 1 |
303 | #define CONFIG_SYS_I2C_BUSES { {0, {I2C_NULL_HOP} }, \ | |
87da89e8 MW |
304 | {1, {I2C_NULL_HOP} }, \ |
305 | {2, {I2C_NULL_HOP} }, \ | |
be2808c3 IR |
306 | {0, {{I2C_MUX_PCA9547, 0x70, 0} } }, \ |
307 | {0, {{I2C_MUX_PCA9547, 0x70, 1} } }, \ | |
308 | {0, {{I2C_MUX_PCA9547, 0x70, 2} } }, \ | |
309 | {0, {{I2C_MUX_PCA9547, 0x70, 3} } }, \ | |
310 | {0, {{I2C_MUX_PCA9547, 0x70, 4} } }, \ | |
311 | {0, {{I2C_MUX_PCA9547, 0x70, 5} } }, \ | |
312 | {0, {{I2C_MUX_PCA9547, 0x70, 6} } }, \ | |
313 | {0, {{I2C_MUX_PCA9547, 0x70, 7} } }, \ | |
314 | } | |
315 | ||
316 | #define CONFIG_BCH | |
317 | ||
f9162b15 | 318 | #endif /* __GE_BX50V3_CONFIG_H */ |