[people/ms/u-boot.git] / include / configs / grsim.h

/* Configuration header file for LEON3 GRSIM, trying to be similar
 * to Gaisler's GR-XC3S-1500 board.
 *
 * (C) Copyright 2003-2005
 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
 *
 * (C) Copyright 2007
 * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __CONFIG_H__
#define __CONFIG_H__

/*
 * High Level Configuration Options
 * (easy to change)
 *
 * Select between TSIM or GRSIM by setting CONFIG_GRSIM or CONFIG_TSIM to 1.
 *
 * TSIM command
 *  tsim-leon3 -sdram 0 -ram 32000 -rom 8192 -mmu
 *
 */

#define CONFIG_LEON3			/* This is an LEON3 CPU */
#define CONFIG_LEON		1	/* This is an LEON CPU */
#define CONFIG_GRSIM		0	/* ... not running on GRSIM */
#define CONFIG_TSIM		1	/* ... running on TSIM */

/* CPU / AMBA BUS configuration */
#define CONFIG_SYS_CLK_FREQ	40000000	/* 40MHz */

/* Number of SPARC register windows */
#define CONFIG_SYS_SPARC_NWINDOWS 8

/*
 * Serial console configuration
 */
#define CONFIG_BAUDRATE		38400	/* ... at 38400 bps */
#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200, 230400 }

/* Partitions */
#define CONFIG_DOS_PARTITION
#define CONFIG_MAC_PARTITION
#define CONFIG_ISO_PARTITION

/*
 * Supported commands
 */
#define CONFIG_CMD_AMBAPP	/* AMBA Plyg&Play information	*/
#define CONFIG_CMD_BDI		/* bdinfo			*/
#define CONFIG_CMD_CONSOLE	/* coninfo			*/
#define CONFIG_CMD_DIAG
#define CONFIG_CMD_ECHO		/* echo arguments		*/
#define CONFIG_CMD_FPGA		/* FPGA configuration Support	*/
#define CONFIG_CMD_IRQ
#define CONFIG_CMD_ITEST	/* Integer (and string) test	*/
#define CONFIG_CMD_LOADB	/* loadb			*/
#define CONFIG_CMD_LOADS	/* loads			*/
#define CONFIG_CMD_MISC		/* Misc functions like sleep etc */
#define CONFIG_CMD_NET		/* bootp, tftpboot, rarpboot	*/
#define CONFIG_CMD_REGINFO
#define CONFIG_CMD_RUN		/* run command in env variable	*/
#define CONFIG_CMD_SETGETDCR	/* DCR support on 4xx		*/
#define CONFIG_CMD_SOURCE	/* "source" command support	*/
#define CONFIG_CMD_XIMG		/* Load part of Multi Image	*/

/*
 * Autobooting
 */
#define CONFIG_BOOTDELAY	5	/* autoboot after 5 seconds */

#define CONFIG_PREBOOT	"echo;"	\
	"echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
	"echo"

#undef	CONFIG_BOOTARGS
/*#define CONFIG_SYS_HUSH_PARSER 0*/

#define	CONFIG_EXTRA_ENV_SETTINGS					\
	"netdev=eth0\0"							\
	"nfsargs=setenv bootargs root=/dev/nfs rw "			\
		"nfsroot=${serverip}:${rootpath}\0"			\
	"ramargs=setenv bootargs root=/dev/ram rw\0"			\
	"addip=setenv bootargs ${bootargs} "				\
		"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"	\
		":${hostname}:${netdev}:off panic=1\0"			\
	"flash_nfs=run nfsargs addip;"					\
		"bootm ${kernel_addr}\0"				\
	"flash_self=run ramargs addip;"					\
		"bootm ${kernel_addr} ${ramdisk_addr}\0"		\
	"net_nfs=tftp 40000000 ${bootfile};run nfsargs addip;bootm\0"	\
	"rootpath=/export/roofs\0"					\
	"scratch=40000000\0"					\
	"getkernel=tftpboot $(scratch) $(bootfile)\0" \
	"ethaddr=00:00:7A:CC:00:12\0" \
	"bootargs=console=ttyS0,38400" \
	""
#define CONFIG_NETMASK 255.255.255.0
#define CONFIG_GATEWAYIP 192.168.0.1
#define CONFIG_SERVERIP 192.168.0.81
#define CONFIG_IPADDR 192.168.0.80
#define CONFIG_ROOTPATH "/export/rootfs"
#define CONFIG_HOSTNAME  grxc3s1500
#define CONFIG_BOOTFILE "/uImage"

#define CONFIG_BOOTCOMMAND	"run flash_self"

/* Memory MAP
 *
 *  Flash:
 *  |--------------------------------|
 *  | 0x00000000 Text & Data & BSS   | *
 *  |            for Monitor         | *
 *  | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~| *
 *  | UNUSED / Growth                | * 256kb
 *  |--------------------------------|
 *  | 0x00050000 Base custom area    | *
 *  |            kernel / FS         | *
 *  |                                | * Rest of Flash
 *  |~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~|
 *  | END-0x00008000 Environment     | * 32kb
 *  |--------------------------------|
 *
 *
 *
 *  Main Memory:
 *  |--------------------------------|
 *  | UNUSED / scratch area          |
 *  |                                |
 *  |                                |
 *  |                                |
 *  |                                |
 *  |--------------------------------|
 *  | Monitor .Text / .DATA / .BSS   | * 256kb
 *  | Relocated!                     | *
 *  |--------------------------------|
 *  | Monitor Malloc                 | * 128kb (contains relocated environment)
 *  |--------------------------------|
 *  | Monitor/kernel STACK           | * 64kb
 *  |--------------------------------|
 *  | Page Table for MMU systems     | * 2k
 *  |--------------------------------|
 *  | PROM Code accessed from Linux  | * 6kb-128b
 *  |--------------------------------|
 *  | Global data (avail from kernel)| * 128b
 *  |--------------------------------|
 *
 */

/*
 * Flash configuration (8,16 or 32 MB)
 * TEXT base always at 0xFFF00000
 * ENV_ADDR always at  0xFFF40000
 * FLASH_BASE at 0xFC000000 for 64 MB
 *               0xFE000000 for 32 MB
 *               0xFF000000 for 16 MB
 *               0xFF800000 for  8 MB
 */
#define CONFIG_SYS_NO_FLASH		1
#define CONFIG_SYS_FLASH_BASE		0x00000000
#define CONFIG_SYS_FLASH_SIZE		0x00800000
#define CONFIG_ENV_SIZE		0x8000

#define CONFIG_ENV_ADDR		(CONFIG_SYS_FLASH_BASE+CONFIG_SYS_FLASH_SIZE-CONFIG_ENV_SIZE)

#define PHYS_FLASH_SECT_SIZE	0x00020000	/* 128 KB sectors */
#define CONFIG_SYS_MAX_FLASH_SECT	64	/* max num of sects on one chip */
#define CONFIG_SYS_MAX_FLASH_BANKS	1	/* max num of memory banks      */

#define CONFIG_SYS_FLASH_ERASE_TOUT	240000	/* Flash Erase Timeout (in ms)  */
#define CONFIG_SYS_FLASH_WRITE_TOUT	500	/* Flash Write Timeout (in ms)  */
#define CONFIG_SYS_FLASH_LOCK_TOUT	5	/* Timeout for Flash Set Lock Bit (in ms) */
#define CONFIG_SYS_FLASH_UNLOCK_TOUT	10000	/* Timeout for Flash Clear Lock Bits (in ms) */

#ifdef ENABLE_FLASH_SUPPORT
/* For use with grsim FLASH emulation extension */
#define CONFIG_SYS_FLASH_PROTECTION	/* "Real" (hardware) sectors protection */

#undef CONFIG_FLASH_8BIT	/* Flash is 32-bit */

/*** CFI CONFIG ***/
#define CONFIG_SYS_FLASH_CFI_WIDTH	FLASH_CFI_8BIT
#define CONFIG_FLASH_CFI_DRIVER
#define CONFIG_SYS_FLASH_CFI
#endif

/*
 * Environment settings
 */
#define CONFIG_ENV_IS_NOWHERE 1
/*#define CONFIG_ENV_IS_IN_FLASH*/
/*#define CONFIG_ENV_SIZE		0x8000*/
#define CONFIG_ENV_SECT_SIZE	0x40000
#define CONFIG_ENV_OVERWRITE	1

/*
 * Memory map
 */
#define CONFIG_SYS_SDRAM_BASE		0x40000000
#define CONFIG_SYS_SDRAM_SIZE		0x02000000
#define CONFIG_SYS_SDRAM_END		(CONFIG_SYS_SDRAM_BASE+CONFIG_SYS_SDRAM_SIZE)

/* no SRAM available */
#undef CONFIG_SYS_SRAM_BASE
#undef CONFIG_SYS_SRAM_SIZE

/* Always Run U-Boot from SDRAM */
#define CONFIG_SYS_RAM_BASE CONFIG_SYS_SDRAM_BASE
#define CONFIG_SYS_RAM_SIZE CONFIG_SYS_SDRAM_SIZE
#define CONFIG_SYS_RAM_END CONFIG_SYS_SDRAM_END

#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_RAM_END - GENERATED_GBL_DATA_SIZE)

#define CONFIG_SYS_PROM_SIZE		(8192-GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_PROM_OFFSET		(CONFIG_SYS_GBL_DATA_OFFSET-CONFIG_SYS_PROM_SIZE)

#define CONFIG_SYS_INIT_SP_OFFSET	(CONFIG_SYS_PROM_OFFSET-32)
#define CONFIG_SYS_STACK_SIZE		(0x10000-32)

#define CONFIG_SYS_MONITOR_BASE    CONFIG_SYS_TEXT_BASE
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
#   define CONFIG_SYS_RAMBOOT		1
#endif

#define CONFIG_SYS_MONITOR_LEN		(256 << 10)	/* Reserve 256 kB for Monitor   */
#define CONFIG_SYS_MALLOC_LEN		(128 << 10)	/* Reserve 128 kB for malloc()  */
#define CONFIG_SYS_BOOTMAPSZ		(8 << 20)	/* Initial Memory map for Linux */

#define CONFIG_SYS_MALLOC_END		(CONFIG_SYS_INIT_SP_OFFSET-CONFIG_SYS_STACK_SIZE)
#define CONFIG_SYS_MALLOC_BASE		(CONFIG_SYS_MALLOC_END-CONFIG_SYS_MALLOC_LEN)

/* relocated monitor area */
#define CONFIG_SYS_RELOC_MONITOR_MAX_END   CONFIG_SYS_MALLOC_BASE
#define CONFIG_SYS_RELOC_MONITOR_BASE     (CONFIG_SYS_RELOC_MONITOR_MAX_END-CONFIG_SYS_MONITOR_LEN)

/* make un relocated address from relocated address */
#define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE))

/*
 * Ethernet configuration
 */
#define CONFIG_GRETH	1

/* Default HARDWARE address */
#define GRETH_HWADDR_0 0x00
#define GRETH_HWADDR_1 0x00
#define GRETH_HWADDR_2 0x7A
#define GRETH_HWADDR_3 0xcc
#define GRETH_HWADDR_4 0x00
#define GRETH_HWADDR_5 0x12

#define CONFIG_ETHADDR   00:00:7a:cc:00:12

/*
 * Define CONFIG_GRETH_10MBIT to force GRETH at 10Mb/s
 */
/* #define CONFIG_GRETH_10MBIT 1 */
#define CONFIG_PHY_ADDR		0x00

/*
 * Miscellaneous configurable options
 */
#define CONFIG_SYS_LONGHELP		/* undef to save memory     */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE		1024	/* Console I/O Buffer Size  */
#else
#define CONFIG_SYS_CBSIZE		256	/* Console I/O Buffer Size  */
#endif
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)	/* Print Buffer Size */
#define CONFIG_SYS_MAXARGS		16	/* max number of command args   */
#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE	/* Boot Argument Buffer Size    */

#define CONFIG_SYS_MEMTEST_START	0x00100000	/* memtest works on */
#define CONFIG_SYS_MEMTEST_END		0x00f00000	/* 1 ... 15 MB in DRAM  */

#define CONFIG_SYS_LOAD_ADDR		0x100000	/* default load address */

/***** Gaisler GRLIB IP-Cores Config ********/

/* AMBA Plug & Play info display on startup */
/*#define CONFIG_SYS_AMBAPP_PRINT_ON_STARTUP*/

#define CONFIG_SYS_GRLIB_SDRAM     0
#define CONFIG_SYS_GRLIB_MEMCFG1   (0x000000ff | (1<<11))
#if CONFIG_GRSIM
/* GRSIM configuration */
#define CONFIG_SYS_GRLIB_MEMCFG2   0x82206000
#else
/* TSIM configuration */
#define CONFIG_SYS_GRLIB_MEMCFG2   0x00001820
#endif
#define CONFIG_SYS_GRLIB_MEMCFG3   0x00136000

#define CONFIG_SYS_GRLIB_FT_MEMCFG1   (0x000000ff | (1<<11))
#define CONFIG_SYS_GRLIB_FT_MEMCFG2   0x82206000
#define CONFIG_SYS_GRLIB_FT_MEMCFG3   0x00136000

/* no DDR controller */
#define CONFIG_SYS_GRLIB_DDR_CFG   0x00000000

/* no DDR2 Controller */
#define CONFIG_SYS_GRLIB_DDR2_CFG1 0x00000000
#define CONFIG_SYS_GRLIB_DDR2_CFG3 0x00000000

#define CONFIG_SYS_GRLIB_APBUART_SCALER \
 ((((CONFIG_SYS_CLK_FREQ*10)/(CONFIG_BAUDRATE*8))-5)/10)

/* default kernel command line */
#define CONFIG_DEFAULT_KERNEL_COMMAND_LINE "console=ttyS0,38400\0\0"

#define CONFIG_IDENT_STRING "Gaisler GRSIM"

#endif				/* __CONFIG_H */
Commit	Line	Data
823edd8a DH	1	/* Configuration header file for LEON3 GRSIM, trying to be similar
	2	* to Gaisler's GR-XC3S-1500 board.
	3	*
	4	* (C) Copyright 2003-2005
	5	* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
	6	*
	7	* (C) Copyright 2007
	8	* Daniel Hellstrom, Gaisler Research, daniel@gaisler.com.
	9	*
3765b3e7	10	* SPDX-License-Identifier: GPL-2.0+
823edd8a DH	11	*/
	12
	13	#ifndef __CONFIG_H__
	14	#define __CONFIG_H__
	15
	16	/*
	17	* High Level Configuration Options
	18	* (easy to change)
	19	*
	20	* Select between TSIM or GRSIM by setting CONFIG_GRSIM or CONFIG_TSIM to 1.
	21	*
	22	* TSIM command
	23	* tsim-leon3 -sdram 0 -ram 32000 -rom 8192 -mmu
	24	*
	25	*/
	26
	27	#define CONFIG_LEON3 /* This is an LEON3 CPU */
	28	#define CONFIG_LEON 1 /* This is an LEON CPU */
	29	#define CONFIG_GRSIM 0 /* ... not running on GRSIM */
	30	#define CONFIG_TSIM 1 /* ... running on TSIM */
	31
	32	/* CPU / AMBA BUS configuration */
53677ef1	33	#define CONFIG_SYS_CLK_FREQ 40000000 /* 40MHz */
823edd8a DH	34
823edd8a DH	35	/* Number of SPARC register windows */
6d0f6bcf	36	#define CONFIG_SYS_SPARC_NWINDOWS 8
823edd8a DH	37
	38	/*
	39	* Serial console configuration
	40	*/
	41	#define CONFIG_BAUDRATE 38400 /* ... at 38400 bps */
6d0f6bcf	42	#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
823edd8a DH	43
	44	/* Partitions */
	45	#define CONFIG_DOS_PARTITION
	46	#define CONFIG_MAC_PARTITION
	47	#define CONFIG_ISO_PARTITION
	48
	49	/*
	50	* Supported commands
	51	*/
74de7aef WD	52	#define CONFIG_CMD_AMBAPP /* AMBA Plyg&Play information */
	53	#define CONFIG_CMD_BDI /* bdinfo */
	54	#define CONFIG_CMD_CONSOLE /* coninfo */
823edd8a	55	#define CONFIG_CMD_DIAG
74de7aef WD	56	#define CONFIG_CMD_ECHO /* echo arguments */
74de7aef WD	57	#define CONFIG_CMD_FPGA /* FPGA configuration Support */
823edd8a	58	#define CONFIG_CMD_IRQ
74de7aef WD	59	#define CONFIG_CMD_ITEST /* Integer (and string) test */
	60	#define CONFIG_CMD_LOADB /* loadb */
	61	#define CONFIG_CMD_LOADS /* loads */
823edd8a	62	#define CONFIG_CMD_MISC /* Misc functions like sleep etc */
74de7aef	63	#define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
823edd8a	64	#define CONFIG_CMD_REGINFO
74de7aef WD	65	#define CONFIG_CMD_RUN /* run command in env variable */
	66	#define CONFIG_CMD_SETGETDCR /* DCR support on 4xx */
	67	#define CONFIG_CMD_SOURCE /* "source" command support */
	68	#define CONFIG_CMD_XIMG /* Load part of Multi Image */
823edd8a DH	69
	70	/*
	71	* Autobooting
	72	*/
	73	#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
	74
	75	#define CONFIG_PREBOOT "echo;" \
	76	"echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
	77	"echo"
	78
	79	#undef CONFIG_BOOTARGS
6d0f6bcf	80	/#define CONFIG_SYS_HUSH_PARSER 0/
823edd8a DH	81
	82	#define CONFIG_EXTRA_ENV_SETTINGS \
	83	"netdev=eth0\0" \
	84	"nfsargs=setenv bootargs root=/dev/nfs rw " \
	85	"nfsroot=${serverip}:${rootpath}\0" \
	86	"ramargs=setenv bootargs root=/dev/ram rw\0" \
	87	"addip=setenv bootargs ${bootargs} " \
	88	"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
	89	":${hostname}:${netdev}:off panic=1\0" \
	90	"flash_nfs=run nfsargs addip;" \
	91	"bootm ${kernel_addr}\0" \
	92	"flash_self=run ramargs addip;" \
	93	"bootm ${kernel_addr} ${ramdisk_addr}\0" \
	94	"net_nfs=tftp 40000000 ${bootfile};run nfsargs addip;bootm\0" \
	95	"rootpath=/export/roofs\0" \
	96	"scratch=40000000\0" \
3a2b9f28	97	"getkernel=tftpboot $(scratch) $(bootfile)\0" \
823edd8a DH	98	"ethaddr=00:00:7A:CC:00:12\0" \
	99	"bootargs=console=ttyS0,38400" \
	100	""
	101	#define CONFIG_NETMASK 255.255.255.0
	102	#define CONFIG_GATEWAYIP 192.168.0.1
	103	#define CONFIG_SERVERIP 192.168.0.81
	104	#define CONFIG_IPADDR 192.168.0.80
8b3637c6	105	#define CONFIG_ROOTPATH "/export/rootfs"
823edd8a	106	#define CONFIG_HOSTNAME grxc3s1500
b3f44c21	107	#define CONFIG_BOOTFILE "/uImage"
823edd8a DH	108
	109	#define CONFIG_BOOTCOMMAND "run flash_self"
	110
	111	/* Memory MAP
	112	*
	113	* Flash:
	114	* \|--------------------------------\|
	115	* \| 0x00000000 Text & Data & BSS \| *
	116	* \| for Monitor \| *
	117	* \| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\| *
	118	* \| UNUSED / Growth \| * 256kb
	119	* \|--------------------------------\|
	120	* \| 0x00050000 Base custom area \| *
	121	* \| kernel / FS \| *
	122	* \| \| * Rest of Flash
	123	* \|~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\|
	124	* \| END-0x00008000 Environment \| * 32kb
	125	* \|--------------------------------\|
	126	*
	127	*
	128	*
	129	* Main Memory:
	130	* \|--------------------------------\|
	131	* \| UNUSED / scratch area \|
	132	* \| \|
	133	* \| \|
	134	* \| \|
	135	* \| \|
	136	* \|--------------------------------\|
	137	* \| Monitor .Text / .DATA / .BSS \| * 256kb
	138	* \| Relocated! \| *
	139	* \|--------------------------------\|
	140	* \| Monitor Malloc \| * 128kb (contains relocated environment)
	141	* \|--------------------------------\|
	142	* \| Monitor/kernel STACK \| * 64kb
	143	* \|--------------------------------\|
	144	* \| Page Table for MMU systems \| * 2k
	145	* \|--------------------------------\|
	146	* \| PROM Code accessed from Linux \| * 6kb-128b
	147	* \|--------------------------------\|
	148	* \| Global data (avail from kernel)\| * 128b
	149	* \|--------------------------------\|
	150	*
	151	*/
	152
	153	/*
	154	* Flash configuration (8,16 or 32 MB)
	155	* TEXT base always at 0xFFF00000
	156	* ENV_ADDR always at 0xFFF40000
	157	* FLASH_BASE at 0xFC000000 for 64 MB
	158	* 0xFE000000 for 32 MB
	159	* 0xFF000000 for 16 MB
	160	* 0xFF800000 for 8 MB
	161	*/
6d0f6bcf JCPV	162	#define CONFIG_SYS_NO_FLASH 1
	163	#define CONFIG_SYS_FLASH_BASE 0x00000000
	164	#define CONFIG_SYS_FLASH_SIZE 0x00800000
0e8d1586	165	#define CONFIG_ENV_SIZE 0x8000
823edd8a	166
6d0f6bcf	167	#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE+CONFIG_SYS_FLASH_SIZE-CONFIG_ENV_SIZE)
823edd8a DH	168
823edd8a DH	169	#define PHYS_FLASH_SECT_SIZE 0x00020000 /* 128 KB sectors */
6d0f6bcf JCPV	170	#define CONFIG_SYS_MAX_FLASH_SECT 64 /* max num of sects on one chip */
6d0f6bcf JCPV	171	#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of memory banks */
823edd8a	172
6d0f6bcf JCPV	173	#define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */
	174	#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */
	175	#define CONFIG_SYS_FLASH_LOCK_TOUT 5 /* Timeout for Flash Set Lock Bit (in ms) */
	176	#define CONFIG_SYS_FLASH_UNLOCK_TOUT 10000 /* Timeout for Flash Clear Lock Bits (in ms) */
823edd8a DH	177
	178	#ifdef ENABLE_FLASH_SUPPORT
	179	/* For use with grsim FLASH emulation extension */
6d0f6bcf	180	#define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */
823edd8a DH	181
	182	#undef CONFIG_FLASH_8BIT /* Flash is 32-bit */
	183
	184	/* CFI CONFIG */
6d0f6bcf	185	#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
00b1883a	186	#define CONFIG_FLASH_CFI_DRIVER
6d0f6bcf	187	#define CONFIG_SYS_FLASH_CFI
823edd8a DH	188	#endif
	189
	190	/*
	191	* Environment settings
	192	*/
93f6d725	193	#define CONFIG_ENV_IS_NOWHERE 1
5a1aceb0	194	/#define CONFIG_ENV_IS_IN_FLASH/
0e8d1586 JCPV	195	/#define CONFIG_ENV_SIZE 0x8000/
0e8d1586 JCPV	196	#define CONFIG_ENV_SECT_SIZE 0x40000
823edd8a DH	197	#define CONFIG_ENV_OVERWRITE 1
	198
	199	/*
	200	* Memory map
	201	*/
6d0f6bcf JCPV	202	#define CONFIG_SYS_SDRAM_BASE 0x40000000
	203	#define CONFIG_SYS_SDRAM_SIZE 0x02000000
	204	#define CONFIG_SYS_SDRAM_END (CONFIG_SYS_SDRAM_BASE+CONFIG_SYS_SDRAM_SIZE)
823edd8a DH	205
823edd8a DH	206	/* no SRAM available */
6d0f6bcf JCPV	207	#undef CONFIG_SYS_SRAM_BASE
6d0f6bcf JCPV	208	#undef CONFIG_SYS_SRAM_SIZE
823edd8a DH	209
823edd8a DH	210	/* Always Run U-Boot from SDRAM */
6d0f6bcf JCPV	211	#define CONFIG_SYS_RAM_BASE CONFIG_SYS_SDRAM_BASE
	212	#define CONFIG_SYS_RAM_SIZE CONFIG_SYS_SDRAM_SIZE
	213	#define CONFIG_SYS_RAM_END CONFIG_SYS_SDRAM_END
823edd8a	214
25ddd1fb	215	#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_RAM_END - GENERATED_GBL_DATA_SIZE)
823edd8a	216
25ddd1fb	217	#define CONFIG_SYS_PROM_SIZE (8192-GENERATED_GBL_DATA_SIZE)
6d0f6bcf	218	#define CONFIG_SYS_PROM_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET-CONFIG_SYS_PROM_SIZE)
823edd8a	219
6d0f6bcf JCPV	220	#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_PROM_OFFSET-32)
6d0f6bcf JCPV	221	#define CONFIG_SYS_STACK_SIZE (0x10000-32)
823edd8a	222
14d0a02a	223	#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
6d0f6bcf JCPV	224	#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
6d0f6bcf JCPV	225	# define CONFIG_SYS_RAMBOOT 1
823edd8a DH	226	#endif
823edd8a DH	227
6d0f6bcf JCPV	228	#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
	229	#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
	230	#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
823edd8a	231
6d0f6bcf JCPV	232	#define CONFIG_SYS_MALLOC_END (CONFIG_SYS_INIT_SP_OFFSET-CONFIG_SYS_STACK_SIZE)
6d0f6bcf JCPV	233	#define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MALLOC_END-CONFIG_SYS_MALLOC_LEN)
823edd8a DH	234
823edd8a DH	235	/* relocated monitor area */
6d0f6bcf JCPV	236	#define CONFIG_SYS_RELOC_MONITOR_MAX_END CONFIG_SYS_MALLOC_BASE
6d0f6bcf JCPV	237	#define CONFIG_SYS_RELOC_MONITOR_BASE (CONFIG_SYS_RELOC_MONITOR_MAX_END-CONFIG_SYS_MONITOR_LEN)
823edd8a DH	238
823edd8a DH	239	/* make un relocated address from relocated address */
14d0a02a	240	#define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE))
823edd8a DH	241
	242	/*
	243	* Ethernet configuration
	244	*/
	245	#define CONFIG_GRETH 1
823edd8a DH	246
	247	/* Default HARDWARE address */
	248	#define GRETH_HWADDR_0 0x00
	249	#define GRETH_HWADDR_1 0x00
	250	#define GRETH_HWADDR_2 0x7A
	251	#define GRETH_HWADDR_3 0xcc
	252	#define GRETH_HWADDR_4 0x00
	253	#define GRETH_HWADDR_5 0x12
	254
	255	#define CONFIG_ETHADDR 00:00:7a:cc:00:12
	256
	257	/*
	258	* Define CONFIG_GRETH_10MBIT to force GRETH at 10Mb/s
	259	*/
	260	/* #define CONFIG_GRETH_10MBIT 1 */
	261	#define CONFIG_PHY_ADDR 0x00
	262
	263	/*
	264	* Miscellaneous configurable options
	265	*/
6d0f6bcf	266	#define CONFIG_SYS_LONGHELP /* undef to save memory */
823edd8a	267	#if defined(CONFIG_CMD_KGDB)
6d0f6bcf	268	#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
823edd8a	269	#else
6d0f6bcf	270	#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
823edd8a	271	#endif
6d0f6bcf JCPV	272	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
	273	#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
	274	#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
823edd8a	275
6d0f6bcf JCPV	276	#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
6d0f6bcf JCPV	277	#define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
823edd8a	278
6d0f6bcf	279	#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
823edd8a	280
823edd8a DH	281	/*** Gaisler GRLIB IP-Cores Config ******/
	282
	283	/* AMBA Plug & Play info display on startup */
6d0f6bcf	284	/#define CONFIG_SYS_AMBAPP_PRINT_ON_STARTUP/
823edd8a	285
6d0f6bcf JCPV	286	#define CONFIG_SYS_GRLIB_SDRAM 0
6d0f6bcf JCPV	287	#define CONFIG_SYS_GRLIB_MEMCFG1 (0x000000ff \| (1<<11))
823edd8a DH	288	#if CONFIG_GRSIM
823edd8a DH	289	/* GRSIM configuration */
6d0f6bcf	290	#define CONFIG_SYS_GRLIB_MEMCFG2 0x82206000
823edd8a DH	291	#else
823edd8a DH	292	/* TSIM configuration */
6d0f6bcf	293	#define CONFIG_SYS_GRLIB_MEMCFG2 0x00001820
823edd8a	294	#endif
6d0f6bcf	295	#define CONFIG_SYS_GRLIB_MEMCFG3 0x00136000
823edd8a	296
6d0f6bcf JCPV	297	#define CONFIG_SYS_GRLIB_FT_MEMCFG1 (0x000000ff \| (1<<11))
	298	#define CONFIG_SYS_GRLIB_FT_MEMCFG2 0x82206000
	299	#define CONFIG_SYS_GRLIB_FT_MEMCFG3 0x00136000
823edd8a DH	300
823edd8a DH	301	/* no DDR controller */
6d0f6bcf	302	#define CONFIG_SYS_GRLIB_DDR_CFG 0x00000000
823edd8a DH	303
823edd8a DH	304	/* no DDR2 Controller */
6d0f6bcf JCPV	305	#define CONFIG_SYS_GRLIB_DDR2_CFG1 0x00000000
6d0f6bcf JCPV	306	#define CONFIG_SYS_GRLIB_DDR2_CFG3 0x00000000
823edd8a	307
6d0f6bcf	308	#define CONFIG_SYS_GRLIB_APBUART_SCALER \
823edd8a DH	309	((((CONFIG_SYS_CLK_FREQ10)/(CONFIG_BAUDRATE8))-5)/10)
	310
	311	/* default kernel command line */
	312	#define CONFIG_DEFAULT_KERNEL_COMMAND_LINE "console=ttyS0,38400\0\0"
	313
	314	#define CONFIG_IDENT_STRING "Gaisler GRSIM"
	315
	316	#endif /* __CONFIG_H */