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48571ff0 SG |
1 | /* |
2 | * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ | |
3 | * | |
4 | * Based on davinci_dvevm.h. Original Copyrights follow: | |
5 | * | |
6 | * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> | |
7 | * | |
1a459660 | 8 | * SPDX-License-Identifier: GPL-2.0+ |
48571ff0 SG |
9 | */ |
10 | ||
11 | #ifndef __CONFIG_H | |
12 | #define __CONFIG_H | |
13 | ||
14 | /* | |
15 | * Board | |
16 | */ | |
17 | #define CONFIG_SYS_USE_NAND 1 | |
18 | ||
19 | /* | |
20 | * SoC Configuration | |
21 | */ | |
22 | #define CONFIG_MACH_DAVINCI_HAWK | |
23 | #define CONFIG_ARM926EJS /* arm926ejs CPU core */ | |
24 | #define CONFIG_SOC_DA8XX /* TI DA8xx SoC */ | |
e8c856d2 | 25 | #define CONFIG_SOC_DA850 /* TI DA850 SoC */ |
b67d8816 | 26 | #define CONFIG_SYS_EXCEPTION_VECTORS_HIGH |
48571ff0 SG |
27 | #define CONFIG_SYS_CLK_FREQ clk_get(DAVINCI_ARM_CLKID) |
28 | #define CONFIG_SYS_OSCIN_FREQ 24000000 | |
29 | #define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE | |
30 | #define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID) | |
48571ff0 SG |
31 | #define CONFIG_SKIP_LOWLEVEL_INIT |
32 | #define CONFIG_BOARD_EARLY_INIT_F | |
6d660e77 | 33 | #define CONFIG_AIS_CONFIG_FILE "board/$(BOARDDIR)/hawkboard-ais-nand.cfg" |
48571ff0 | 34 | |
6b873dca SG |
35 | #define CONFIG_SYS_DA850_SYSCFG_SUSPSRC ( \ |
36 | DAVINCI_SYSCFG_SUSPSRC_EMAC | \ | |
37 | DAVINCI_SYSCFG_SUSPSRC_I2C | \ | |
38 | DAVINCI_SYSCFG_SUSPSRC_SPI1 | \ | |
39 | DAVINCI_SYSCFG_SUSPSRC_TIMER0 | \ | |
40 | DAVINCI_SYSCFG_SUSPSRC_UART2) | |
41 | ||
42 | #if defined(CONFIG_UART_U_BOOT) | |
48571ff0 | 43 | #define CONFIG_SYS_TEXT_BASE 0xc1080000 |
6b873dca | 44 | #elif !defined(CONFIG_SPL_BUILD) |
48571ff0 SG |
45 | #define CONFIG_SYS_TEXT_BASE 0xc1180000 |
46 | #endif | |
47 | ||
6b873dca SG |
48 | /* Spl */ |
49 | #define CONFIG_SPL | |
3f7f2414 TR |
50 | #define CONFIG_SPL_FRAMEWORK |
51 | #define CONFIG_SPL_BOARD_INIT | |
6b873dca | 52 | #define CONFIG_SPL_NAND_SUPPORT |
6f2f01b9 SW |
53 | #define CONFIG_SPL_NAND_BASE |
54 | #define CONFIG_SPL_NAND_DRIVERS | |
55 | #define CONFIG_SPL_NAND_ECC | |
6b873dca | 56 | #define CONFIG_SPL_NAND_SIMPLE |
385488dc | 57 | #define CONFIG_SPL_LIBGENERIC_SUPPORT /* for udelay and __div64_32 for NAND */ |
6b873dca SG |
58 | #define CONFIG_SPL_SERIAL_SUPPORT |
59 | #define CONFIG_SPL_LDSCRIPT "board/$(BOARDDIR)/u-boot-spl-hawk.lds" | |
60 | #define CONFIG_SPL_TEXT_BASE 0xc1080000 | |
61 | #define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR | |
62 | ||
48571ff0 SG |
63 | /* |
64 | * Memory Info | |
65 | */ | |
66 | #define CONFIG_SYS_MALLOC_LEN (1*1024*1024) /* malloc() len */ | |
67 | #define PHYS_SDRAM_1 DAVINCI_DDR_EMIF_DATA_BASE | |
68 | #define PHYS_SDRAM_1_SIZE (128 << 20) /* SDRAM size 128MB */ | |
69 | #define CONFIG_SYS_SDRAM_BASE 0xc0000000 | |
70 | #define CONFIG_MAX_RAM_BANK_SIZE (512 << 20) | |
71 | #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 -\ | |
72 | GENERATED_GBL_DATA_SIZE) | |
d79f3a68 | 73 | #define CONFIG_SYS_MONITOR_LEN 0x60000 |
48571ff0 SG |
74 | |
75 | /* memtest start addr */ | |
76 | #define CONFIG_SYS_MEMTEST_START (PHYS_SDRAM_1) | |
77 | ||
78 | /* memtest will be run on 16MB */ | |
79 | #define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + 16*1024*1024) | |
80 | ||
81 | #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ | |
48571ff0 SG |
82 | |
83 | /* | |
84 | * Serial Driver info | |
85 | */ | |
86 | #define CONFIG_SYS_NS16550 | |
87 | #define CONFIG_SYS_NS16550_SERIAL | |
88 | #define CONFIG_SYS_NS16550_REG_SIZE -4 | |
89 | #define CONFIG_SYS_NS16550_COM1 DAVINCI_UART2_BASE | |
90 | #define CONFIG_SYS_NS16550_CLK clk_get(DAVINCI_UART2_CLKID) | |
91 | #define CONFIG_CONS_INDEX 1 | |
92 | #define CONFIG_BAUDRATE 115200 | |
48571ff0 SG |
93 | |
94 | /* | |
95 | * Network & Ethernet Configuration | |
96 | */ | |
48571ff0 | 97 | #define CONFIG_DRIVER_TI_EMAC |
48571ff0 | 98 | #define CONFIG_MII |
48571ff0 SG |
99 | #define CONFIG_BOOTP_DNS |
100 | #define CONFIG_BOOTP_DNS2 | |
101 | #define CONFIG_BOOTP_SEND_HOSTNAME | |
102 | #define CONFIG_NET_RETRY_COUNT 10 | |
48571ff0 SG |
103 | |
104 | /* | |
105 | * Nand Flash | |
106 | */ | |
107 | #ifdef CONFIG_SYS_USE_NAND | |
108 | #define CONFIG_SYS_NO_FLASH | |
109 | #define CONFIG_ENV_IS_IN_NAND | |
110 | #define CONFIG_ENV_SIZE (128 << 10) | |
111 | #define CONFIG_SYS_NAND_BASE DAVINCI_ASYNC_EMIF_DATA_CE3_BASE | |
112 | #define CONFIG_CLE_MASK 0x10 | |
113 | #define CONFIG_ALE_MASK 0x8 | |
114 | #define CONFIG_SYS_NAND_USE_FLASH_BBT | |
115 | #define CONFIG_NAND_DAVINCI | |
116 | #define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST | |
9f0a371d | 117 | #define CONFIG_SYS_NAND_HW_ECC_OOBFIRST /* SPL nand driver configuration */ |
48571ff0 SG |
118 | #define CFG_DAVINCI_STD_NAND_LAYOUT |
119 | #define CONFIG_SYS_NAND_CS 3 | |
120 | #define CONFIG_SYS_NAND_PAGE_2K | |
48571ff0 SG |
121 | /* Max number of NAND devices */ |
122 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 | |
123 | #define CONFIG_SYS_NAND_BASE_LIST { 0x62000000, } | |
48571ff0 SG |
124 | /* Block 0--not used by bootcode */ |
125 | #define CONFIG_ENV_OFFSET 0x0 | |
126 | ||
127 | #define CONFIG_SYS_NAND_PAGE_SIZE (2 << 10) | |
128 | #define CONFIG_SYS_NAND_BLOCK_SIZE (128 << 10) | |
129 | #define CONFIG_SYS_NAND_U_BOOT_OFFS 0xe0000 | |
48571ff0 SG |
130 | #define CONFIG_SYS_NAND_U_BOOT_DST 0xc1180000 |
131 | #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST | |
132 | #define CONFIG_SYS_NAND_U_BOOT_RELOC_SP (CONFIG_SYS_NAND_U_BOOT_DST - \ | |
133 | CONFIG_SYS_NAND_U_BOOT_SIZE - \ | |
134 | CONFIG_SYS_MALLOC_LEN - \ | |
135 | GENERATED_GBL_DATA_SIZE) | |
136 | #define CONFIG_SYS_NAND_ECCPOS { \ | |
137 | 24, 25, 26, 27, 28, \ | |
138 | 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, \ | |
139 | 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, \ | |
140 | 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, \ | |
141 | 59, 60, 61, 62, 63 } | |
142 | #define CONFIG_SYS_NAND_PAGE_COUNT 64 | |
143 | #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 | |
144 | #define CONFIG_SYS_NAND_ECCSIZE 512 | |
145 | #define CONFIG_SYS_NAND_ECCBYTES 10 | |
48571ff0 | 146 | #define CONFIG_SYS_NAND_OOBSIZE 64 |
d3022c5f | 147 | |
48571ff0 SG |
148 | #endif /* CONFIG_SYS_USE_NAND */ |
149 | ||
25f8bf6e SG |
150 | /* USB Configs */ |
151 | #define CONFIG_SYS_USB_OHCI_CPU_INIT | |
152 | #define CONFIG_USB_OHCI_NEW | |
153 | #define CONFIG_USB_OHCI_DA8XX | |
154 | #define CONFIG_USB_STORAGE | |
155 | #define CONFIG_DOS_PARTITION | |
156 | #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x01E25000 | |
157 | #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15 | |
158 | #define CONFIG_SYS_USB_OHCI_SLOT_NAME "hawkboard" | |
159 | ||
48571ff0 SG |
160 | /* |
161 | * U-Boot general configuration | |
162 | */ | |
163 | #define CONFIG_MISC_INIT_R | |
164 | #define CONFIG_BOOTFILE "uImage" /* Boot file name */ | |
165 | #define CONFIG_SYS_PROMPT "hawkboard > " /* Command Prompt */ | |
166 | #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ | |
167 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) | |
168 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ | |
169 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */ | |
170 | #define CONFIG_SYS_LOAD_ADDR (PHYS_SDRAM_1 + 0x700000) | |
171 | #define CONFIG_VERSION_VARIABLE | |
172 | #define CONFIG_AUTO_COMPLETE | |
173 | #define CONFIG_SYS_HUSH_PARSER | |
48571ff0 SG |
174 | #define CONFIG_CMDLINE_EDITING |
175 | #define CONFIG_SYS_LONGHELP | |
176 | #define CONFIG_CRC32_VERIFY | |
177 | #define CONFIG_MX_CYCLIC | |
178 | ||
179 | /* | |
180 | * Linux Information | |
181 | */ | |
182 | #define LINUX_BOOT_PARAM_ADDR (CONFIG_SYS_MEMTEST_START + 0x100) | |
183 | #define CONFIG_CMDLINE_TAG | |
184 | #define CONFIG_SETUP_MEMORY_TAGS | |
185 | #define CONFIG_BOOTARGS \ | |
186 | "mem=128M console=ttyS2,115200n8 root=/dev/ram0 rw initrd=0xc1180000,"\ | |
187 | "4M ip=static" | |
188 | #define CONFIG_BOOTDELAY 3 | |
189 | ||
190 | /* | |
191 | * U-Boot commands | |
192 | */ | |
193 | #include <config_cmd_default.h> | |
194 | #define CONFIG_CMD_ENV | |
195 | #define CONFIG_CMD_ASKENV | |
196 | #define CONFIG_CMD_DHCP | |
197 | #define CONFIG_CMD_DIAG | |
198 | #define CONFIG_CMD_MII | |
199 | #define CONFIG_CMD_PING | |
200 | #define CONFIG_CMD_SAVES | |
201 | #define CONFIG_CMD_MEMORY | |
25f8bf6e SG |
202 | #define CONFIG_CMD_USB |
203 | #define CONFIG_CMD_EXT2 | |
48571ff0 | 204 | |
8f5d4687 HM |
205 | #ifdef CONFIG_CMD_BDI |
206 | #define CONFIG_CLOCKS | |
207 | #endif | |
208 | ||
48571ff0 SG |
209 | #ifdef CONFIG_SYS_USE_NAND |
210 | #undef CONFIG_CMD_FLASH | |
211 | #undef CONFIG_CMD_IMLS | |
212 | #define CONFIG_CMD_NAND | |
213 | #endif | |
214 | ||
215 | #ifndef CONFIG_DRIVER_TI_EMAC | |
216 | #undef CONFIG_CMD_NET | |
217 | #undef CONFIG_CMD_DHCP | |
218 | #undef CONFIG_CMD_MII | |
219 | #undef CONFIG_CMD_PING | |
220 | #endif | |
221 | ||
222 | #endif /* __CONFIG_H */ |