[people/ms/u-boot.git] / include / configs / imx6-engicam.h

/*
 * Copyright (C) 2016 Amarula Solutions B.V.
 * Copyright (C) 2016 Engicam S.r.l.
 *
 * Configuration settings for the Engicam i.MX6 SOM Starter Kits.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __IMX6_ENGICAM_CONFIG_H
#define __IMX6_ENGICAM_CONFIG_H

#include <linux/sizes.h>
#include "mx6_common.h"

/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN		(16 * SZ_1M)

/* Total Size of Environment Sector */
#define CONFIG_ENV_SIZE			SZ_128K

/* Allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE

/* Environment */
#ifndef CONFIG_ENV_IS_NOWHERE
/* Environment in MMC */
# if defined(CONFIG_ENV_IS_IN_MMC)
#  define CONFIG_ENV_OFFSET		0x100000
/* Environment in NAND */
# elif defined(CONFIG_ENV_IS_IN_NAND)
#  define CONFIG_ENV_OFFSET		0x400000
#  define CONFIG_ENV_SECT_SIZE		CONFIG_ENV_SIZE
# endif
#endif

/* Default environment */
#define CONFIG_EXTRA_ENV_SETTINGS \
	"script=boot.scr\0" \
	"splashpos=m,m\0" \
	"image=uImage\0" \
	"fit_image=fit.itb\0" \
	"fdt_high=0xffffffff\0" \
	"fdt_addr=" FDT_ADDR "\0" \
	"boot_fdt=try\0" \
	"mmcpart=1\0" \
	"nandroot=ubi0:rootfs rootfstype=ubifs\0" \
	"mmcautodetect=yes\0" \
	"mmcargs=setenv bootargs console=${console},${baudrate} " \
		"root=${mmcroot}\0" \
	"ubiargs=setenv bootargs console=${console},${baudrate} " \
		"ubi.mtd=5 root=${nandroot} ${mtdparts}\0" \
	"loadbootscript=" \
		"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
	"bootscript=echo Running bootscript from mmc ...; " \
		"source\0" \
	"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
	"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
	"loadfit=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${fit_image}\0" \
	"fitboot=echo Booting FIT image from mmc ...; " \
		"run mmcargs; " \
		"bootm ${loadaddr}\0" \
	"_mmcboot=run mmcargs; " \
		"run mmcargs; " \
		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
			"if run loadfdt; then " \
				"bootm ${loadaddr} - ${fdt_addr}; " \
			"else " \
				"if test ${boot_fdt} = try; then " \
					"bootm; " \
				"else " \
					"echo WARN: Cannot load the DT; " \
				"fi; " \
			"fi; " \
		"else " \
			"bootm; " \
		"fi\0" \
	"mmcboot=echo Booting from mmc ...; " \
		"if mmc rescan; then " \
			"if run loadbootscript; then " \
				"run bootscript; " \
			"else " \
				"if run loadfit; then " \
					"run fitboot; " \
				"else " \
					"if run loadimage; then " \
						"run _mmcboot; " \
					"fi; " \
				"fi; " \
			"fi; " \
		"fi\0" \
	"nandboot=echo Booting from nand ...; " \
		"if mtdparts; then " \
			"echo Starting nand boot ...; " \
		"else " \
			"mtdparts default; " \
		"fi; " \
		"run ubiargs; " \
		"nand read ${loadaddr} kernel 0x800000; " \
		"nand read ${fdt_addr} dtb 0x100000; " \
		"bootm ${loadaddr} - ${fdt_addr}\0"

#define CONFIG_BOOTCOMMAND		"run $modeboot"

/* Miscellaneous configurable options */
#define CONFIG_SYS_MEMTEST_START	0x80000000
#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + 0x8000000)

#define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
#define CONFIG_SYS_HZ			1000

#ifdef CONFIG_MX6UL
# define DRAM_OFFSET(x)			0x87##x
# define FDT_ADDR			__stringify(DRAM_OFFSET(800000))
#else 
# define DRAM_OFFSET(x)			0x1##x
# define FDT_ADDR			__stringify(DRAM_OFFSET(8000000))
#endif

/* Physical Memory Map */
#define CONFIG_NR_DRAM_BANKS		1
#define PHYS_SDRAM			MMDC0_ARB_BASE_ADDR

#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM
#define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE

#define CONFIG_SYS_INIT_SP_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - \
					GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + \
					CONFIG_SYS_INIT_SP_OFFSET)

/* FIT */
#ifdef CONFIG_FIT
# define CONFIG_IMAGE_FORMAT_LEGACY
#endif

/* UART */
#ifdef CONFIG_MXC_UART
# ifdef CONFIG_MX6UL
#  define CONFIG_MXC_UART_BASE		UART1_BASE
# else
#  define CONFIG_MXC_UART_BASE		UART4_BASE
# endif
#endif

/* MMC */
#ifdef CONFIG_FSL_USDHC
# define CONFIG_SYS_MMC_ENV_DEV		0
#endif

/* NAND */
#ifdef CONFIG_NAND_MXS
# define CONFIG_SYS_MAX_NAND_DEVICE	1
# define CONFIG_SYS_NAND_BASE		0x40000000
# define CONFIG_SYS_NAND_5_ADDR_CYCLE
# define CONFIG_SYS_NAND_ONFI_DETECTION
# define CONFIG_SYS_NAND_U_BOOT_START	CONFIG_SYS_TEXT_BASE
# define CONFIG_SYS_NAND_U_BOOT_OFFS	0x200000

/* MTD device */
# define CONFIG_MTD_DEVICE
# define CONFIG_MTD_PARTITIONS
# define MTDIDS_DEFAULT			"nand0=gpmi-nand"
# define MTDPARTS_DEFAULT		"mtdparts=gpmi-nand:2m(spl),2m(uboot)," \
					"1m(env),8m(kernel),1m(dtb),-(rootfs)"

# define CONFIG_APBH_DMA
# define CONFIG_APBH_DMA_BURST
# define CONFIG_APBH_DMA_BURST8
#endif

/* Ethernet */
#ifdef CONFIG_FEC_MXC
# ifdef CONFIG_TARGET_MX6Q_ICORE_RQS
#  define CONFIG_FEC_MXC_PHYADDR	3
#  define CONFIG_FEC_XCV_TYPE		RGMII
# else
#  define CONFIG_FEC_MXC_PHYADDR	0
#  define CONFIG_FEC_XCV_TYPE		RMII
# endif

# define CONFIG_MII
#endif

/* Framebuffer */
#ifdef CONFIG_VIDEO_IPUV3
# define CONFIG_IPUV3_CLK		260000000
# define CONFIG_IMX_VIDEO_SKIP

# define CONFIG_SPLASH_SCREEN
# define CONFIG_SPLASH_SCREEN_ALIGN
# define CONFIG_BMP_16BPP
# define CONFIG_VIDEO_BMP_RLE8
# define CONFIG_VIDEO_LOGO
# define CONFIG_VIDEO_BMP_LOGO
#endif

/* SPL */
#ifdef CONFIG_SPL
# ifdef CONFIG_NAND_MXS
#  define CONFIG_SPL_NAND_SUPPORT
# else
#  define CONFIG_SPL_MMC_SUPPORT
# endif

# include "imx6_spl.h"
# ifdef CONFIG_SPL_BUILD
#  if defined(CONFIG_TARGET_MX6Q_ICORE_RQS) || defined(CONFIG_TARGET_MX6UL_ISIOT)
#   define CONFIG_SYS_FSL_USDHC_NUM	2
#  else
#   define CONFIG_SYS_FSL_USDHC_NUM	1
#  endif

#  define CONFIG_SYS_FSL_ESDHC_ADDR	0
#  undef CONFIG_DM_GPIO
#  undef CONFIG_DM_MMC
# endif
#endif

#endif /* __IMX6_ENGICAM_CONFIG_H */
Commit	Line	Data
f4b7532f JT	1	/*
	2	* Copyright (C) 2016 Amarula Solutions B.V.
	3	* Copyright (C) 2016 Engicam S.r.l.
	4	*
0e689a61	5	* Configuration settings for the Engicam i.MX6 SOM Starter Kits.
f4b7532f JT	6	*
	7	* SPDX-License-Identifier: GPL-2.0+
	8	*/
	9
0e689a61 JT	10	#ifndef __IMX6_ENGICAM_CONFIG_H
0e689a61 JT	11	#define __IMX6_ENGICAM_CONFIG_H
f4b7532f JT	12
	13	#include <linux/sizes.h>
	14	#include "mx6_common.h"
	15
	16	/* Size of malloc() pool */
	17	#define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M)
	18
	19	/* Total Size of Environment Sector */
	20	#define CONFIG_ENV_SIZE SZ_128K
	21
	22	/* Allow to overwrite serial and ethaddr */
	23	#define CONFIG_ENV_OVERWRITE
	24
	25	/* Environment */
	26	#ifndef CONFIG_ENV_IS_NOWHERE
	27	/* Environment in MMC */
	28	# if defined(CONFIG_ENV_IS_IN_MMC)
	29	# define CONFIG_ENV_OFFSET 0x100000
023ff2f7 JT	30	/* Environment in NAND */
	31	# elif defined(CONFIG_ENV_IS_IN_NAND)
	32	# define CONFIG_ENV_OFFSET 0x400000
	33	# define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE
f4b7532f JT	34	# endif
	35	#endif
	36
	37	/* Default environment */
	38	#define CONFIG_EXTRA_ENV_SETTINGS \
	39	"script=boot.scr\0" \
3713571c	40	"splashpos=m,m\0" \
bfd96402	41	"image=uImage\0" \
66d1d687	42	"fit_image=fit.itb\0" \
f4b7532f	43	"fdt_high=0xffffffff\0" \
5ed7d31a	44	"fdt_addr=" FDT_ADDR "\0" \
f4b7532f	45	"boot_fdt=try\0" \
f4b7532f	46	"mmcpart=1\0" \
ddd90660	47	"nandroot=ubi0:rootfs rootfstype=ubifs\0" \
f4b7532f JT	48	"mmcautodetect=yes\0" \
	49	"mmcargs=setenv bootargs console=${console},${baudrate} " \
	50	"root=${mmcroot}\0" \
ddd90660 JT	51	"ubiargs=setenv bootargs console=${console},${baudrate} " \
ddd90660 JT	52	"ubi.mtd=5 root=${nandroot} ${mtdparts}\0" \
f4b7532f JT	53	"loadbootscript=" \
	54	"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
	55	"bootscript=echo Running bootscript from mmc ...; " \
	56	"source\0" \
	57	"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
	58	"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
66d1d687 JT	59	"loadfit=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${fit_image}\0" \
	60	"fitboot=echo Booting FIT image from mmc ...; " \
	61	"run mmcargs; " \
	62	"bootm ${loadaddr}\0" \
98f56610	63	"_mmcboot=run mmcargs; " \
f4b7532f JT	64	"run mmcargs; " \
	65	"if test ${boot_fdt} = yes \|\| test ${boot_fdt} = try; then " \
	66	"if run loadfdt; then " \
bfd96402	67	"bootm ${loadaddr} - ${fdt_addr}; " \
f4b7532f JT	68	"else " \
f4b7532f JT	69	"if test ${boot_fdt} = try; then " \
bfd96402	70	"bootm; " \
f4b7532f JT	71	"else " \
	72	"echo WARN: Cannot load the DT; " \
	73	"fi; " \
	74	"fi; " \
	75	"else " \
bfd96402	76	"bootm; " \
ddd90660	77	"fi\0" \
98f56610 JT	78	"mmcboot=echo Booting from mmc ...; " \
	79	"if mmc rescan; then " \
	80	"if run loadbootscript; then " \
	81	"run bootscript; " \
	82	"else " \
	83	"if run loadfit; then " \
	84	"run fitboot; " \
	85	"else " \
	86	"if run loadimage; then " \
	87	"run _mmcboot; " \
	88	"fi; " \
	89	"fi; " \
	90	"fi; " \
	91	"fi\0" \
ddd90660 JT	92	"nandboot=echo Booting from nand ...; " \
	93	"if mtdparts; then " \
	94	"echo Starting nand boot ...; " \
	95	"else " \
	96	"mtdparts default; " \
	97	"fi; " \
	98	"run ubiargs; " \
	99	"nand read ${loadaddr} kernel 0x800000; " \
	100	"nand read ${fdt_addr} dtb 0x100000; " \
	101	"bootm ${loadaddr} - ${fdt_addr}\0"
f4b7532f	102
98f56610	103	#define CONFIG_BOOTCOMMAND "run $modeboot"
f4b7532f JT	104
	105	/* Miscellaneous configurable options */
	106	#define CONFIG_SYS_MEMTEST_START 0x80000000
	107	#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x8000000)
	108
	109	#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
	110	#define CONFIG_SYS_HZ 1000
	111
0e689a61 JT	112	#ifdef CONFIG_MX6UL
	113	# define DRAM_OFFSET(x) 0x87##x
	114	# define FDT_ADDR __stringify(DRAM_OFFSET(800000))
	115	#else
	116	# define DRAM_OFFSET(x) 0x1##x
	117	# define FDT_ADDR __stringify(DRAM_OFFSET(8000000))
	118	#endif
5ed7d31a	119
f4b7532f JT	120	/* Physical Memory Map */
	121	#define CONFIG_NR_DRAM_BANKS 1
	122	#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
	123
	124	#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
	125	#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
	126	#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
	127
	128	#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
	129	GENERATED_GBL_DATA_SIZE)
	130	#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
	131	CONFIG_SYS_INIT_SP_OFFSET)
	132
ada832f8 JT	133	/* FIT */
ada832f8 JT	134	#ifdef CONFIG_FIT
8098b8cb	135	# define CONFIG_IMAGE_FORMAT_LEGACY
ada832f8 JT	136	#endif
ada832f8 JT	137
f4b7532f JT	138	/* UART */
f4b7532f JT	139	#ifdef CONFIG_MXC_UART
0e689a61 JT	140	# ifdef CONFIG_MX6UL
	141	# define CONFIG_MXC_UART_BASE UART1_BASE
	142	# else
	143	# define CONFIG_MXC_UART_BASE UART4_BASE
	144	# endif
f4b7532f JT	145	#endif
	146
	147	/* MMC */
	148	#ifdef CONFIG_FSL_USDHC
	149	# define CONFIG_SYS_MMC_ENV_DEV 0
f4b7532f JT	150	#endif
f4b7532f JT	151
023ff2f7 JT	152	/* NAND */
	153	#ifdef CONFIG_NAND_MXS
	154	# define CONFIG_SYS_MAX_NAND_DEVICE 1
	155	# define CONFIG_SYS_NAND_BASE 0x40000000
	156	# define CONFIG_SYS_NAND_5_ADDR_CYCLE
	157	# define CONFIG_SYS_NAND_ONFI_DETECTION
	158	# define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
	159	# define CONFIG_SYS_NAND_U_BOOT_OFFS 0x200000
	160
310db71d JT	161	/* MTD device */
310db71d JT	162	# define CONFIG_MTD_DEVICE
310db71d	163	# define CONFIG_MTD_PARTITIONS
83425771 JT	164	# define MTDIDS_DEFAULT "nand0=gpmi-nand"
83425771 JT	165	# define MTDPARTS_DEFAULT "mtdparts=gpmi-nand:2m(spl),2m(uboot)," \
08d7985b	166	"1m(env),8m(kernel),1m(dtb),-(rootfs)"
310db71d	167
023ff2f7 JT	168	# define CONFIG_APBH_DMA
	169	# define CONFIG_APBH_DMA_BURST
	170	# define CONFIG_APBH_DMA_BURST8
	171	#endif
	172
58413366 JT	173	/* Ethernet */
58413366 JT	174	#ifdef CONFIG_FEC_MXC
0e689a61 JT	175	# ifdef CONFIG_TARGET_MX6Q_ICORE_RQS
	176	# define CONFIG_FEC_MXC_PHYADDR 3
	177	# define CONFIG_FEC_XCV_TYPE RGMII
	178	# else
	179	# define CONFIG_FEC_MXC_PHYADDR 0
	180	# define CONFIG_FEC_XCV_TYPE RMII
	181	# endif
58413366 JT	182
58413366 JT	183	# define CONFIG_MII
58413366 JT	184	#endif
58413366 JT	185
ca7463c9 JT	186	/* Framebuffer */
	187	#ifdef CONFIG_VIDEO_IPUV3
	188	# define CONFIG_IPUV3_CLK 260000000
	189	# define CONFIG_IMX_VIDEO_SKIP
	190
	191	# define CONFIG_SPLASH_SCREEN
3713571c	192	# define CONFIG_SPLASH_SCREEN_ALIGN
ca7463c9 JT	193	# define CONFIG_BMP_16BPP
	194	# define CONFIG_VIDEO_BMP_RLE8
	195	# define CONFIG_VIDEO_LOGO
	196	# define CONFIG_VIDEO_BMP_LOGO
	197	#endif
	198
f4b7532f JT	199	/* SPL */
f4b7532f JT	200	#ifdef CONFIG_SPL
023ff2f7 JT	201	# ifdef CONFIG_NAND_MXS
	202	# define CONFIG_SPL_NAND_SUPPORT
	203	# else
	204	# define CONFIG_SPL_MMC_SUPPORT
	205	# endif
	206
f4b7532f	207	# include "imx6_spl.h"
f160c5c8	208	# ifdef CONFIG_SPL_BUILD
0e689a61 JT	209	# if defined(CONFIG_TARGET_MX6Q_ICORE_RQS) \|\| defined(CONFIG_TARGET_MX6UL_ISIOT)
	210	# define CONFIG_SYS_FSL_USDHC_NUM 2
	211	# else
	212	# define CONFIG_SYS_FSL_USDHC_NUM 1
	213	# endif
	214
6d931fd5	215	# define CONFIG_SYS_FSL_ESDHC_ADDR 0
f160c5c8 JT	216	# undef CONFIG_DM_GPIO
	217	# undef CONFIG_DM_MMC
	218	# endif
f4b7532f JT	219	#endif
f4b7532f JT	220
0e689a61	221	#endif /* __IMX6_ENGICAM_CONFIG_H */