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1/*
2 * (C) Copyright 2007
3 * Heiko Schocher, DENX Software Engineering, hs@denx.de.
4 *
1a459660 5 * SPDX-License-Identifier: GPL-2.0+
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6 */
7
8#ifndef __CONFIG_H
9#define __CONFIG_H
10
11/*
12 * High Level Configuration Options
13 * (easy to change)
14 */
15
b2a6dfe4 16#define CONFIG_MPC5200 1 /* This is an MPC5200 CPU */
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17#define CONFIG_JUPITER 1 /* ... on Jupiter board */
18
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19/*
20 * Valid values for CONFIG_SYS_TEXT_BASE are:
21 * 0xFFF00000 boot high (standard configuration)
22 * 0x00100000 boot from RAM (for testing only)
23 */
24#ifndef CONFIG_SYS_TEXT_BASE
25#define CONFIG_SYS_TEXT_BASE 0xFFF00000
26#endif
27
6d0f6bcf 28#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
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29
30#define CONFIG_BOARD_EARLY_INIT_R 1
2605e90b 31
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32#define CONFIG_HIGH_BATS 1 /* High BATs supported */
33
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34/*
35 * Serial console configuration
36 */
37#define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
38#define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */
6d0f6bcf 39#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
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40
41/*
42 * PCI Mapping:
43 * 0x40000000 - 0x4fffffff - PCI Memory
44 * 0x50000000 - 0x50ffffff - PCI IO Space
45 */
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46
47#if defined(CONFIG_PCI)
2605e90b 48#define CONFIG_PCI_SCAN_SHOW 1
f33fca22 49#define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE 1
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50
51#define CONFIG_PCI_MEM_BUS 0x40000000
52#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
53#define CONFIG_PCI_MEM_SIZE 0x10000000
54
55#define CONFIG_PCI_IO_BUS 0x50000000
56#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
57#define CONFIG_PCI_IO_SIZE 0x01000000
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58#endif
59
6d0f6bcf 60#define CONFIG_SYS_XLB_PIPELINING 1
2605e90b 61
2605e90b 62#define CONFIG_MII 1
6d0f6bcf 63#define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */
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64
65/* Partitions */
66#define CONFIG_MAC_PARTITION
67#define CONFIG_DOS_PARTITION
68#define CONFIG_ISO_PARTITION
69
70#define CONFIG_TIMESTAMP /* Print image info with timestamp */
71
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72/*
73 * BOOTP options
74 */
75#define CONFIG_BOOTP_BOOTFILESIZE
76#define CONFIG_BOOTP_BOOTPATH
77#define CONFIG_BOOTP_GATEWAY
78#define CONFIG_BOOTP_HOSTNAME
79
2605e90b 80/*
bc234c12 81 * Command line configuration.
2605e90b 82 */
2605e90b 83
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84#if defined(CONFIG_PCI)
85#define CODFIG_CMD_PCI
86#endif
87
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88/*
89 * Autobooting
90 */
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91
92#define CONFIG_PREBOOT "echo;" \
32bf3d14 93 "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
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94 "echo"
95
96#undef CONFIG_BOOTARGS
97
98#define CONFIG_EXTRA_ENV_SETTINGS \
99 "netdev=eth0\0" \
100 "nfsargs=setenv bootargs root=/dev/nfs rw " \
101 "nfsroot=${serverip}:${rootpath}\0" \
102 "ramargs=setenv bootargs root=/dev/ram rw\0" \
103 "addip=setenv bootargs ${bootargs} " \
104 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
105 ":${hostname}:${netdev}:off panic=1\0" \
a7090b99 106 "flash_nfs=run nfsargs addip addcons;" \
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107 "bootm ${kernel_addr}\0" \
108 "flash_self=run ramargs addip;" \
109 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
a7090b99 110 "addcons=setenv bootargs ${bootargs} console=${contyp}," \
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111 "${baudrate}\0" \
112 "contyp=ttyS0\0" \
a7090b99 113 "net_nfs=tftp 200000 ${bootfile};run nfsargs addip addcons;" \
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114 "bootm\0" \
115 "rootpath=/opt/eldk/ppc_6xx\0" \
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116 "bootfile=/tftpboot/jupiter/uImage\0" \
117 ""
118
119#define CONFIG_BOOTCOMMAND "run flash_self"
120
121/*
122 * IPB Bus clocking configuration.
123 */
6d0f6bcf 124#undef CONFIG_SYS_IPBSPEED_133 /* define for 133MHz speed */
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125
126#if 0
127/* pass open firmware flat tree */
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128#define OF_CPU "PowerPC,5200@0"
129#define OF_SOC "soc5200@f0000000"
130#define OF_TBCLK (bd->bi_busfreq / 8)
131#define OF_STDOUT_PATH "/soc5200@f0000000/serial@2000"
132#endif
133
134#if 0
135/*
136 * I2C configuration
137 */
138#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
6d0f6bcf 139#define CONFIG_SYS_I2C_MODULE 2 /* Select I2C module #1 or #2 */
2605e90b 140
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141#define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */
142#define CONFIG_SYS_I2C_SLAVE 0x7F
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143
144/*
145 * EEPROM configuration
146 */
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147#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* 1010000x */
148#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
149#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
150#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 70
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151#endif
152
153/*
154 * Flash configuration
155 */
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156#define CONFIG_SYS_FLASH_BASE 0xFF000000
157#define CONFIG_SYS_FLASH_SIZE 0x01000000
2605e90b 158
6d0f6bcf 159#define CONFIG_SYS_MAX_FLASH_SECT 128 /* max num of sects on one chip */
2605e90b 160
14d0a02a 161#define CONFIG_ENV_ADDR (CONFIG_SYS_TEXT_BASE + 0x40000) /* third sector */
2605e90b 162
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163#define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */
164#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */
2605e90b 165
6d0f6bcf 166#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of flash banks */
2605e90b 167
00b1883a 168#define CONFIG_FLASH_CFI_DRIVER
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169#define CONFIG_SYS_FLASH_CFI
170#define CONFIG_SYS_FLASH_EMPTY_INFO
171#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
172#define CONFIG_SYS_UPDATE_FLASH_SIZE 1
173#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
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174
175/*
176 * Environment settings
177 */
5a1aceb0 178#define CONFIG_ENV_IS_IN_FLASH 1
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179#define CONFIG_ENV_SIZE 0x20000
180#define CONFIG_ENV_SECT_SIZE 0x20000
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181#define CONFIG_ENV_OVERWRITE 1
182
8502e30a 183/* Address and size of Redundant Environment Sector */
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184#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
185#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
8502e30a 186
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187/*
188 * Memory map
189 */
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190#define CONFIG_SYS_MBAR 0xF0000000
191#define CONFIG_SYS_SDRAM_BASE 0x00000000
192#define CONFIG_SYS_DEFAULT_MBAR 0x80000000
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193
194/* Use SRAM until RAM will be available */
6d0f6bcf 195#define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM
553f0982 196#define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_SIZE /* Size of used area in DPRAM */
2605e90b 197
25ddd1fb 198#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
6d0f6bcf 199#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
2605e90b 200
14d0a02a 201#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
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202#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
203# define CONFIG_SYS_RAMBOOT 1
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204#endif
205
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206#define CONFIG_SYS_MONITOR_LEN (192 << 10) /* Reserve 192 kB for Monitor */
207#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
208#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
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209
210/*
211 * Ethernet configuration
212 */
213#define CONFIG_MPC5xxx_FEC 1
86321fc1 214#define CONFIG_MPC5xxx_FEC_MII100
2605e90b 215/*
86321fc1 216 * Define CONFIG_MPC5xxx_FEC_MII10 to force FEC at 10Mb
2605e90b 217 */
86321fc1 218/* #define CONFIG_MPC5xxx_FEC_MII10 */
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219#define CONFIG_PHY_ADDR 0x00
220
221/*
222 * GPIO configuration
223 */
6d0f6bcf 224#define CONFIG_SYS_GPS_PORT_CONFIG 0x10000004
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225
226/*
227 * Miscellaneous configurable options
228 */
6d0f6bcf 229#define CONFIG_SYS_LONGHELP /* undef to save memory */
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230
231#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
bc234c12 232#if defined(CONFIG_CMD_KGDB)
6d0f6bcf 233#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
2605e90b 234#else
6d0f6bcf 235#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
2605e90b 236#endif
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237#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
238#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
239#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
2605e90b 240
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241#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
242#define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
243#define CONFIG_SYS_ALT_MEMTEST 1
2605e90b 244
6d0f6bcf 245#define CONFIG_SYS_LOAD_ADDR 0x200000 /* default load address */
2605e90b 246
6d0f6bcf 247#define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
bc234c12 248#if defined(CONFIG_CMD_KGDB)
6d0f6bcf 249# define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
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250#endif
251
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252/*
253 * Various low-level settings
254 */
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255#define CONFIG_SYS_HID0_INIT HID0_ICE | HID0_ICFI
256#define CONFIG_SYS_HID0_FINAL HID0_ICE
2605e90b 257
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258#define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
259#define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE
260#define CONFIG_SYS_BOOTCS_CFG 0x00047801
261#define CONFIG_SYS_CS0_START CONFIG_SYS_FLASH_BASE
262#define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE
2605e90b 263
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264#define CONFIG_SYS_CS_BURST 0x00000000
265#define CONFIG_SYS_CS_DEADCYCLE 0x33333333
2605e90b 266
6d0f6bcf 267#define CONFIG_SYS_RESET_ADDRESS 0xff000000
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268
269#endif /* __CONFIG_H */