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Move CONFIG_OF_LIBFDT to Kconfig
[people/ms/u-boot.git] / include / configs / jupiter.h
CommitLineData
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1/*
2 * (C) Copyright 2007
3 * Heiko Schocher, DENX Software Engineering, hs@denx.de.
4 *
1a459660 5 * SPDX-License-Identifier: GPL-2.0+
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6 */
7
8#ifndef __CONFIG_H
9#define __CONFIG_H
10
11/*
12 * High Level Configuration Options
13 * (easy to change)
14 */
15
b2a6dfe4 16#define CONFIG_MPC5200 1 /* This is an MPC5200 CPU */
2605e90b 17#define CONFIG_JUPITER 1 /* ... on Jupiter board */
50301a5a 18#define CONFIG_DISPLAY_BOARDINFO
2605e90b 19
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20/*
21 * Valid values for CONFIG_SYS_TEXT_BASE are:
22 * 0xFFF00000 boot high (standard configuration)
23 * 0x00100000 boot from RAM (for testing only)
24 */
25#ifndef CONFIG_SYS_TEXT_BASE
26#define CONFIG_SYS_TEXT_BASE 0xFFF00000
27#endif
28
6d0f6bcf 29#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
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30
31#define CONFIG_BOARD_EARLY_INIT_R 1
32#define CONFIG_BOARD_EARLY_INIT_F 1
33
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34#define CONFIG_HIGH_BATS 1 /* High BATs supported */
35
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36/*
37 * Serial console configuration
38 */
39#define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
40#define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */
6d0f6bcf 41#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
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42
43/*
44 * PCI Mapping:
45 * 0x40000000 - 0x4fffffff - PCI Memory
46 * 0x50000000 - 0x50ffffff - PCI IO Space
47 */
769104c9 48/*#define CONFIG_PCI */
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49
50#if defined(CONFIG_PCI)
51#define CONFIG_PCI_PNP 1
52#define CONFIG_PCI_SCAN_SHOW 1
f33fca22 53#define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE 1
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54
55#define CONFIG_PCI_MEM_BUS 0x40000000
56#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
57#define CONFIG_PCI_MEM_SIZE 0x10000000
58
59#define CONFIG_PCI_IO_BUS 0x50000000
60#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
61#define CONFIG_PCI_IO_SIZE 0x01000000
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62#endif
63
6d0f6bcf 64#define CONFIG_SYS_XLB_PIPELINING 1
2605e90b 65
2605e90b 66#define CONFIG_MII 1
6d0f6bcf 67#define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */
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68
69/* Partitions */
70#define CONFIG_MAC_PARTITION
71#define CONFIG_DOS_PARTITION
72#define CONFIG_ISO_PARTITION
73
74#define CONFIG_TIMESTAMP /* Print image info with timestamp */
75
bc234c12 76
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77/*
78 * BOOTP options
79 */
80#define CONFIG_BOOTP_BOOTFILESIZE
81#define CONFIG_BOOTP_BOOTPATH
82#define CONFIG_BOOTP_GATEWAY
83#define CONFIG_BOOTP_HOSTNAME
84
85
2605e90b 86/*
bc234c12 87 * Command line configuration.
2605e90b 88 */
bc234c12 89#define CONFIG_CMD_SNTP
2605e90b 90
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91#if defined(CONFIG_PCI)
92#define CODFIG_CMD_PCI
93#endif
94
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95
96/*
97 * Autobooting
98 */
99#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
100
101#define CONFIG_PREBOOT "echo;" \
32bf3d14 102 "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
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103 "echo"
104
105#undef CONFIG_BOOTARGS
106
107#define CONFIG_EXTRA_ENV_SETTINGS \
108 "netdev=eth0\0" \
109 "nfsargs=setenv bootargs root=/dev/nfs rw " \
110 "nfsroot=${serverip}:${rootpath}\0" \
111 "ramargs=setenv bootargs root=/dev/ram rw\0" \
112 "addip=setenv bootargs ${bootargs} " \
113 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
114 ":${hostname}:${netdev}:off panic=1\0" \
a7090b99 115 "flash_nfs=run nfsargs addip addcons;" \
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116 "bootm ${kernel_addr}\0" \
117 "flash_self=run ramargs addip;" \
118 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
a7090b99 119 "addcons=setenv bootargs ${bootargs} console=${contyp}," \
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120 "${baudrate}\0" \
121 "contyp=ttyS0\0" \
a7090b99 122 "net_nfs=tftp 200000 ${bootfile};run nfsargs addip addcons;" \
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123 "bootm\0" \
124 "rootpath=/opt/eldk/ppc_6xx\0" \
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125 "bootfile=/tftpboot/jupiter/uImage\0" \
126 ""
127
128#define CONFIG_BOOTCOMMAND "run flash_self"
129
130/*
131 * IPB Bus clocking configuration.
132 */
6d0f6bcf 133#undef CONFIG_SYS_IPBSPEED_133 /* define for 133MHz speed */
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134
135#if 0
136/* pass open firmware flat tree */
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137#define CONFIG_OF_BOARD_SETUP 1
138
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139#define OF_CPU "PowerPC,5200@0"
140#define OF_SOC "soc5200@f0000000"
141#define OF_TBCLK (bd->bi_busfreq / 8)
142#define OF_STDOUT_PATH "/soc5200@f0000000/serial@2000"
143#endif
144
145#if 0
146/*
147 * I2C configuration
148 */
149#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
6d0f6bcf 150#define CONFIG_SYS_I2C_MODULE 2 /* Select I2C module #1 or #2 */
2605e90b 151
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152#define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */
153#define CONFIG_SYS_I2C_SLAVE 0x7F
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154
155/*
156 * EEPROM configuration
157 */
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158#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* 1010000x */
159#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
160#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
161#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 70
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162#endif
163
164/*
165 * Flash configuration
166 */
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167#define CONFIG_SYS_FLASH_BASE 0xFF000000
168#define CONFIG_SYS_FLASH_SIZE 0x01000000
2605e90b 169
6d0f6bcf 170#define CONFIG_SYS_MAX_FLASH_SECT 128 /* max num of sects on one chip */
2605e90b 171
14d0a02a 172#define CONFIG_ENV_ADDR (CONFIG_SYS_TEXT_BASE + 0x40000) /* third sector */
2605e90b 173
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174#define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */
175#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */
2605e90b 176
6d0f6bcf 177#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of flash banks */
2605e90b 178
00b1883a 179#define CONFIG_FLASH_CFI_DRIVER
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180#define CONFIG_SYS_FLASH_CFI
181#define CONFIG_SYS_FLASH_EMPTY_INFO
182#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
183#define CONFIG_SYS_UPDATE_FLASH_SIZE 1
184#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
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185
186/*
187 * Environment settings
188 */
5a1aceb0 189#define CONFIG_ENV_IS_IN_FLASH 1
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190#define CONFIG_ENV_SIZE 0x20000
191#define CONFIG_ENV_SECT_SIZE 0x20000
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192#define CONFIG_ENV_OVERWRITE 1
193
8502e30a 194/* Address and size of Redundant Environment Sector */
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195#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
196#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
8502e30a 197
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198/*
199 * Memory map
200 */
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201#define CONFIG_SYS_MBAR 0xF0000000
202#define CONFIG_SYS_SDRAM_BASE 0x00000000
203#define CONFIG_SYS_DEFAULT_MBAR 0x80000000
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204
205/* Use SRAM until RAM will be available */
6d0f6bcf 206#define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM
553f0982 207#define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_SIZE /* Size of used area in DPRAM */
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208
209
25ddd1fb 210#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
6d0f6bcf 211#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
2605e90b 212
14d0a02a 213#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
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214#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
215# define CONFIG_SYS_RAMBOOT 1
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216#endif
217
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218#define CONFIG_SYS_MONITOR_LEN (192 << 10) /* Reserve 192 kB for Monitor */
219#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
220#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
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221
222/*
223 * Ethernet configuration
224 */
225#define CONFIG_MPC5xxx_FEC 1
86321fc1 226#define CONFIG_MPC5xxx_FEC_MII100
2605e90b 227/*
86321fc1 228 * Define CONFIG_MPC5xxx_FEC_MII10 to force FEC at 10Mb
2605e90b 229 */
86321fc1 230/* #define CONFIG_MPC5xxx_FEC_MII10 */
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231#define CONFIG_PHY_ADDR 0x00
232
233/*
234 * GPIO configuration
235 */
6d0f6bcf 236#define CONFIG_SYS_GPS_PORT_CONFIG 0x10000004
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237
238/*
239 * Miscellaneous configurable options
240 */
6d0f6bcf 241#define CONFIG_SYS_LONGHELP /* undef to save memory */
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242
243#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
6d0f6bcf 244#define CONFIG_SYS_HUSH_PARSER 1 /* Use the HUSH parser */
bc234c12 245#if defined(CONFIG_CMD_KGDB)
6d0f6bcf 246#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
2605e90b 247#else
6d0f6bcf 248#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
2605e90b 249#endif
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250#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
251#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
252#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
2605e90b 253
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254#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
255#define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
256#define CONFIG_SYS_ALT_MEMTEST 1
2605e90b 257
6d0f6bcf 258#define CONFIG_SYS_LOAD_ADDR 0x200000 /* default load address */
2605e90b 259
6d0f6bcf 260#define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
bc234c12 261#if defined(CONFIG_CMD_KGDB)
6d0f6bcf 262# define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
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263#endif
264
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265/*
266 * Various low-level settings
267 */
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268#define CONFIG_SYS_HID0_INIT HID0_ICE | HID0_ICFI
269#define CONFIG_SYS_HID0_FINAL HID0_ICE
2605e90b 270
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271#define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
272#define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE
273#define CONFIG_SYS_BOOTCS_CFG 0x00047801
274#define CONFIG_SYS_CS0_START CONFIG_SYS_FLASH_BASE
275#define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE
2605e90b 276
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277#define CONFIG_SYS_CS_BURST 0x00000000
278#define CONFIG_SYS_CS_DEADCYCLE 0x33333333
2605e90b 279
6d0f6bcf 280#define CONFIG_SYS_RESET_ADDRESS 0xff000000
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281
282#endif /* __CONFIG_H */