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1/*
2 * (C) Copyright 2007
3 * Heiko Schocher, DENX Software Engineering, hs@denx.de.
4 *
1a459660 5 * SPDX-License-Identifier: GPL-2.0+
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6 */
7
8#ifndef __CONFIG_H
9#define __CONFIG_H
10
11/*
12 * High Level Configuration Options
13 * (easy to change)
14 */
15
b2a6dfe4 16#define CONFIG_MPC5200 1 /* This is an MPC5200 CPU */
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17#define CONFIG_JUPITER 1 /* ... on Jupiter board */
18
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19/*
20 * Valid values for CONFIG_SYS_TEXT_BASE are:
21 * 0xFFF00000 boot high (standard configuration)
22 * 0x00100000 boot from RAM (for testing only)
23 */
24#ifndef CONFIG_SYS_TEXT_BASE
25#define CONFIG_SYS_TEXT_BASE 0xFFF00000
26#endif
27
6d0f6bcf 28#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
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29
30#define CONFIG_BOARD_EARLY_INIT_R 1
31#define CONFIG_BOARD_EARLY_INIT_F 1
32
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33#define CONFIG_HIGH_BATS 1 /* High BATs supported */
34
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35/*
36 * Serial console configuration
37 */
38#define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
39#define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */
6d0f6bcf 40#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
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41
42/*
43 * PCI Mapping:
44 * 0x40000000 - 0x4fffffff - PCI Memory
45 * 0x50000000 - 0x50ffffff - PCI IO Space
46 */
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47
48#if defined(CONFIG_PCI)
49#define CONFIG_PCI_PNP 1
50#define CONFIG_PCI_SCAN_SHOW 1
f33fca22 51#define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE 1
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52
53#define CONFIG_PCI_MEM_BUS 0x40000000
54#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
55#define CONFIG_PCI_MEM_SIZE 0x10000000
56
57#define CONFIG_PCI_IO_BUS 0x50000000
58#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
59#define CONFIG_PCI_IO_SIZE 0x01000000
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60#endif
61
6d0f6bcf 62#define CONFIG_SYS_XLB_PIPELINING 1
2605e90b 63
2605e90b 64#define CONFIG_MII 1
6d0f6bcf 65#define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */
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66
67/* Partitions */
68#define CONFIG_MAC_PARTITION
69#define CONFIG_DOS_PARTITION
70#define CONFIG_ISO_PARTITION
71
72#define CONFIG_TIMESTAMP /* Print image info with timestamp */
73
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74/*
75 * BOOTP options
76 */
77#define CONFIG_BOOTP_BOOTFILESIZE
78#define CONFIG_BOOTP_BOOTPATH
79#define CONFIG_BOOTP_GATEWAY
80#define CONFIG_BOOTP_HOSTNAME
81
2605e90b 82/*
bc234c12 83 * Command line configuration.
2605e90b 84 */
2605e90b 85
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86#if defined(CONFIG_PCI)
87#define CODFIG_CMD_PCI
88#endif
89
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90/*
91 * Autobooting
92 */
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93
94#define CONFIG_PREBOOT "echo;" \
32bf3d14 95 "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
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96 "echo"
97
98#undef CONFIG_BOOTARGS
99
100#define CONFIG_EXTRA_ENV_SETTINGS \
101 "netdev=eth0\0" \
102 "nfsargs=setenv bootargs root=/dev/nfs rw " \
103 "nfsroot=${serverip}:${rootpath}\0" \
104 "ramargs=setenv bootargs root=/dev/ram rw\0" \
105 "addip=setenv bootargs ${bootargs} " \
106 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
107 ":${hostname}:${netdev}:off panic=1\0" \
a7090b99 108 "flash_nfs=run nfsargs addip addcons;" \
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109 "bootm ${kernel_addr}\0" \
110 "flash_self=run ramargs addip;" \
111 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
a7090b99 112 "addcons=setenv bootargs ${bootargs} console=${contyp}," \
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113 "${baudrate}\0" \
114 "contyp=ttyS0\0" \
a7090b99 115 "net_nfs=tftp 200000 ${bootfile};run nfsargs addip addcons;" \
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116 "bootm\0" \
117 "rootpath=/opt/eldk/ppc_6xx\0" \
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118 "bootfile=/tftpboot/jupiter/uImage\0" \
119 ""
120
121#define CONFIG_BOOTCOMMAND "run flash_self"
122
123/*
124 * IPB Bus clocking configuration.
125 */
6d0f6bcf 126#undef CONFIG_SYS_IPBSPEED_133 /* define for 133MHz speed */
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127
128#if 0
129/* pass open firmware flat tree */
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130#define OF_CPU "PowerPC,5200@0"
131#define OF_SOC "soc5200@f0000000"
132#define OF_TBCLK (bd->bi_busfreq / 8)
133#define OF_STDOUT_PATH "/soc5200@f0000000/serial@2000"
134#endif
135
136#if 0
137/*
138 * I2C configuration
139 */
140#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
6d0f6bcf 141#define CONFIG_SYS_I2C_MODULE 2 /* Select I2C module #1 or #2 */
2605e90b 142
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143#define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */
144#define CONFIG_SYS_I2C_SLAVE 0x7F
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145
146/*
147 * EEPROM configuration
148 */
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149#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* 1010000x */
150#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
151#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
152#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 70
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153#endif
154
155/*
156 * Flash configuration
157 */
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158#define CONFIG_SYS_FLASH_BASE 0xFF000000
159#define CONFIG_SYS_FLASH_SIZE 0x01000000
2605e90b 160
6d0f6bcf 161#define CONFIG_SYS_MAX_FLASH_SECT 128 /* max num of sects on one chip */
2605e90b 162
14d0a02a 163#define CONFIG_ENV_ADDR (CONFIG_SYS_TEXT_BASE + 0x40000) /* third sector */
2605e90b 164
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165#define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */
166#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */
2605e90b 167
6d0f6bcf 168#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of flash banks */
2605e90b 169
00b1883a 170#define CONFIG_FLASH_CFI_DRIVER
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171#define CONFIG_SYS_FLASH_CFI
172#define CONFIG_SYS_FLASH_EMPTY_INFO
173#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
174#define CONFIG_SYS_UPDATE_FLASH_SIZE 1
175#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
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176
177/*
178 * Environment settings
179 */
5a1aceb0 180#define CONFIG_ENV_IS_IN_FLASH 1
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181#define CONFIG_ENV_SIZE 0x20000
182#define CONFIG_ENV_SECT_SIZE 0x20000
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183#define CONFIG_ENV_OVERWRITE 1
184
8502e30a 185/* Address and size of Redundant Environment Sector */
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186#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
187#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
8502e30a 188
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189/*
190 * Memory map
191 */
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192#define CONFIG_SYS_MBAR 0xF0000000
193#define CONFIG_SYS_SDRAM_BASE 0x00000000
194#define CONFIG_SYS_DEFAULT_MBAR 0x80000000
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195
196/* Use SRAM until RAM will be available */
6d0f6bcf 197#define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM
553f0982 198#define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_SIZE /* Size of used area in DPRAM */
2605e90b 199
25ddd1fb 200#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
6d0f6bcf 201#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
2605e90b 202
14d0a02a 203#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
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204#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
205# define CONFIG_SYS_RAMBOOT 1
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206#endif
207
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208#define CONFIG_SYS_MONITOR_LEN (192 << 10) /* Reserve 192 kB for Monitor */
209#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
210#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
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211
212/*
213 * Ethernet configuration
214 */
215#define CONFIG_MPC5xxx_FEC 1
86321fc1 216#define CONFIG_MPC5xxx_FEC_MII100
2605e90b 217/*
86321fc1 218 * Define CONFIG_MPC5xxx_FEC_MII10 to force FEC at 10Mb
2605e90b 219 */
86321fc1 220/* #define CONFIG_MPC5xxx_FEC_MII10 */
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221#define CONFIG_PHY_ADDR 0x00
222
223/*
224 * GPIO configuration
225 */
6d0f6bcf 226#define CONFIG_SYS_GPS_PORT_CONFIG 0x10000004
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227
228/*
229 * Miscellaneous configurable options
230 */
6d0f6bcf 231#define CONFIG_SYS_LONGHELP /* undef to save memory */
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232
233#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
bc234c12 234#if defined(CONFIG_CMD_KGDB)
6d0f6bcf 235#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
2605e90b 236#else
6d0f6bcf 237#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
2605e90b 238#endif
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239#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
240#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
241#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
2605e90b 242
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243#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
244#define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
245#define CONFIG_SYS_ALT_MEMTEST 1
2605e90b 246
6d0f6bcf 247#define CONFIG_SYS_LOAD_ADDR 0x200000 /* default load address */
2605e90b 248
6d0f6bcf 249#define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
bc234c12 250#if defined(CONFIG_CMD_KGDB)
6d0f6bcf 251# define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
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252#endif
253
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254/*
255 * Various low-level settings
256 */
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257#define CONFIG_SYS_HID0_INIT HID0_ICE | HID0_ICFI
258#define CONFIG_SYS_HID0_FINAL HID0_ICE
2605e90b 259
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260#define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
261#define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE
262#define CONFIG_SYS_BOOTCS_CFG 0x00047801
263#define CONFIG_SYS_CS0_START CONFIG_SYS_FLASH_BASE
264#define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE
2605e90b 265
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266#define CONFIG_SYS_CS_BURST 0x00000000
267#define CONFIG_SYS_CS_DEADCYCLE 0x33333333
2605e90b 268
6d0f6bcf 269#define CONFIG_SYS_RESET_ADDRESS 0xff000000
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270
271#endif /* __CONFIG_H */