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1/*
2 * (C) Copyright 2007
3 * Heiko Schocher, DENX Software Engineering, hs@denx.de.
4 *
1a459660 5 * SPDX-License-Identifier: GPL-2.0+
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6 */
7
8#ifndef __CONFIG_H
9#define __CONFIG_H
10
11/*
12 * High Level Configuration Options
13 * (easy to change)
14 */
15
b2a6dfe4 16#define CONFIG_MPC5200 1 /* This is an MPC5200 CPU */
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17#define CONFIG_JUPITER 1 /* ... on Jupiter board */
18
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19/*
20 * Valid values for CONFIG_SYS_TEXT_BASE are:
21 * 0xFFF00000 boot high (standard configuration)
22 * 0x00100000 boot from RAM (for testing only)
23 */
24#ifndef CONFIG_SYS_TEXT_BASE
25#define CONFIG_SYS_TEXT_BASE 0xFFF00000
26#endif
27
6d0f6bcf 28#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
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29
30#define CONFIG_BOARD_EARLY_INIT_R 1
2605e90b 31
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32#define CONFIG_HIGH_BATS 1 /* High BATs supported */
33
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34/*
35 * Serial console configuration
36 */
37#define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
6d0f6bcf 38#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
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39
40/*
41 * PCI Mapping:
42 * 0x40000000 - 0x4fffffff - PCI Memory
43 * 0x50000000 - 0x50ffffff - PCI IO Space
44 */
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45
46#if defined(CONFIG_PCI)
2605e90b 47#define CONFIG_PCI_SCAN_SHOW 1
f33fca22 48#define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE 1
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49
50#define CONFIG_PCI_MEM_BUS 0x40000000
51#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
52#define CONFIG_PCI_MEM_SIZE 0x10000000
53
54#define CONFIG_PCI_IO_BUS 0x50000000
55#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
56#define CONFIG_PCI_IO_SIZE 0x01000000
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57#endif
58
6d0f6bcf 59#define CONFIG_SYS_XLB_PIPELINING 1
2605e90b 60
2605e90b 61#define CONFIG_MII 1
6d0f6bcf 62#define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */
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63
64/* Partitions */
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65
66#define CONFIG_TIMESTAMP /* Print image info with timestamp */
67
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68/*
69 * BOOTP options
70 */
71#define CONFIG_BOOTP_BOOTFILESIZE
72#define CONFIG_BOOTP_BOOTPATH
73#define CONFIG_BOOTP_GATEWAY
74#define CONFIG_BOOTP_HOSTNAME
75
2605e90b 76/*
bc234c12 77 * Command line configuration.
2605e90b 78 */
2605e90b 79
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80#if defined(CONFIG_PCI)
81#define CODFIG_CMD_PCI
82#endif
83
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84/*
85 * Autobooting
86 */
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87
88#define CONFIG_PREBOOT "echo;" \
32bf3d14 89 "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
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90 "echo"
91
92#undef CONFIG_BOOTARGS
93
94#define CONFIG_EXTRA_ENV_SETTINGS \
95 "netdev=eth0\0" \
96 "nfsargs=setenv bootargs root=/dev/nfs rw " \
97 "nfsroot=${serverip}:${rootpath}\0" \
98 "ramargs=setenv bootargs root=/dev/ram rw\0" \
99 "addip=setenv bootargs ${bootargs} " \
100 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
101 ":${hostname}:${netdev}:off panic=1\0" \
a7090b99 102 "flash_nfs=run nfsargs addip addcons;" \
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103 "bootm ${kernel_addr}\0" \
104 "flash_self=run ramargs addip;" \
105 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
a7090b99 106 "addcons=setenv bootargs ${bootargs} console=${contyp}," \
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107 "${baudrate}\0" \
108 "contyp=ttyS0\0" \
a7090b99 109 "net_nfs=tftp 200000 ${bootfile};run nfsargs addip addcons;" \
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110 "bootm\0" \
111 "rootpath=/opt/eldk/ppc_6xx\0" \
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112 "bootfile=/tftpboot/jupiter/uImage\0" \
113 ""
114
115#define CONFIG_BOOTCOMMAND "run flash_self"
116
117/*
118 * IPB Bus clocking configuration.
119 */
6d0f6bcf 120#undef CONFIG_SYS_IPBSPEED_133 /* define for 133MHz speed */
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121
122#if 0
123/* pass open firmware flat tree */
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124#define OF_CPU "PowerPC,5200@0"
125#define OF_SOC "soc5200@f0000000"
126#define OF_TBCLK (bd->bi_busfreq / 8)
127#define OF_STDOUT_PATH "/soc5200@f0000000/serial@2000"
128#endif
129
130#if 0
131/*
132 * I2C configuration
133 */
134#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
6d0f6bcf 135#define CONFIG_SYS_I2C_MODULE 2 /* Select I2C module #1 or #2 */
2605e90b 136
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137#define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */
138#define CONFIG_SYS_I2C_SLAVE 0x7F
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139
140/*
141 * EEPROM configuration
142 */
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143#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* 1010000x */
144#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
145#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
146#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 70
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147#endif
148
149/*
150 * Flash configuration
151 */
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152#define CONFIG_SYS_FLASH_BASE 0xFF000000
153#define CONFIG_SYS_FLASH_SIZE 0x01000000
2605e90b 154
6d0f6bcf 155#define CONFIG_SYS_MAX_FLASH_SECT 128 /* max num of sects on one chip */
2605e90b 156
14d0a02a 157#define CONFIG_ENV_ADDR (CONFIG_SYS_TEXT_BASE + 0x40000) /* third sector */
2605e90b 158
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159#define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */
160#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */
2605e90b 161
6d0f6bcf 162#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of flash banks */
2605e90b 163
00b1883a 164#define CONFIG_FLASH_CFI_DRIVER
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165#define CONFIG_SYS_FLASH_CFI
166#define CONFIG_SYS_FLASH_EMPTY_INFO
167#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
168#define CONFIG_SYS_UPDATE_FLASH_SIZE 1
169#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
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170
171/*
172 * Environment settings
173 */
5a1aceb0 174#define CONFIG_ENV_IS_IN_FLASH 1
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175#define CONFIG_ENV_SIZE 0x20000
176#define CONFIG_ENV_SECT_SIZE 0x20000
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177#define CONFIG_ENV_OVERWRITE 1
178
8502e30a 179/* Address and size of Redundant Environment Sector */
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180#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
181#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
8502e30a 182
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183/*
184 * Memory map
185 */
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186#define CONFIG_SYS_MBAR 0xF0000000
187#define CONFIG_SYS_SDRAM_BASE 0x00000000
188#define CONFIG_SYS_DEFAULT_MBAR 0x80000000
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189
190/* Use SRAM until RAM will be available */
6d0f6bcf 191#define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM
553f0982 192#define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_SIZE /* Size of used area in DPRAM */
2605e90b 193
25ddd1fb 194#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
6d0f6bcf 195#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
2605e90b 196
14d0a02a 197#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
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198#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
199# define CONFIG_SYS_RAMBOOT 1
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200#endif
201
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202#define CONFIG_SYS_MONITOR_LEN (192 << 10) /* Reserve 192 kB for Monitor */
203#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
204#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
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205
206/*
207 * Ethernet configuration
208 */
209#define CONFIG_MPC5xxx_FEC 1
86321fc1 210#define CONFIG_MPC5xxx_FEC_MII100
2605e90b 211/*
86321fc1 212 * Define CONFIG_MPC5xxx_FEC_MII10 to force FEC at 10Mb
2605e90b 213 */
86321fc1 214/* #define CONFIG_MPC5xxx_FEC_MII10 */
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215#define CONFIG_PHY_ADDR 0x00
216
217/*
218 * GPIO configuration
219 */
6d0f6bcf 220#define CONFIG_SYS_GPS_PORT_CONFIG 0x10000004
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221
222/*
223 * Miscellaneous configurable options
224 */
6d0f6bcf 225#define CONFIG_SYS_LONGHELP /* undef to save memory */
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226
227#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
bc234c12 228#if defined(CONFIG_CMD_KGDB)
6d0f6bcf 229#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
2605e90b 230#else
6d0f6bcf 231#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
2605e90b 232#endif
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233#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
234#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
235#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
2605e90b 236
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237#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
238#define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
239#define CONFIG_SYS_ALT_MEMTEST 1
2605e90b 240
6d0f6bcf 241#define CONFIG_SYS_LOAD_ADDR 0x200000 /* default load address */
2605e90b 242
6d0f6bcf 243#define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
bc234c12 244#if defined(CONFIG_CMD_KGDB)
6d0f6bcf 245# define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
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246#endif
247
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248/*
249 * Various low-level settings
250 */
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251#define CONFIG_SYS_HID0_INIT HID0_ICE | HID0_ICFI
252#define CONFIG_SYS_HID0_FINAL HID0_ICE
2605e90b 253
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254#define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
255#define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE
256#define CONFIG_SYS_BOOTCS_CFG 0x00047801
257#define CONFIG_SYS_CS0_START CONFIG_SYS_FLASH_BASE
258#define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE
2605e90b 259
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260#define CONFIG_SYS_CS_BURST 0x00000000
261#define CONFIG_SYS_CS_DEADCYCLE 0x33333333
2605e90b 262
6d0f6bcf 263#define CONFIG_SYS_RESET_ADDRESS 0xff000000
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264
265#endif /* __CONFIG_H */