[people/ms/u-boot.git] / include / configs / km / km_arm.h

/*
 * (C) Copyright 2009
 * Marvell Semiconductor <www.marvell.com>
 * Prafulla Wadaskar <prafulla@marvell.com>
 *
 * (C) Copyright 2009
 * Stefan Roese, DENX Software Engineering, sr@denx.de.
 *
 * (C) Copyright 2010-2011
 * Heiko Schocher, DENX Software Engineering, hs@denx.de.
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
 * MA 02110-1301 USA
 */

/*
 * for linking errors see
 * http://lists.denx.de/pipermail/u-boot/2009-July/057350.html
 */

#ifndef _CONFIG_KM_ARM_H
#define _CONFIG_KM_ARM_H

/*
 * High Level Configuration Options (easy to change)
 */
#define CONFIG_MARVELL
#define CONFIG_ARM926EJS		/* Basic Architecture */
#define CONFIG_FEROCEON_88FR131		/* CPU Core subversion */
#define CONFIG_KIRKWOOD			/* SOC Family Name */
#define CONFIG_KW88F6281		/* SOC Name */
#define CONFIG_MACH_KM_KIRKWOOD		/* Machine type */

/* include common defines/options for all Keymile boards */
#include "keymile-common.h"

#define CONFIG_SYS_TEXT_BASE	0x04000000	/* code address after reloc */
#define CONFIG_ENV_SIZE		(128 << 10)	/* NAND chip block size	*/
#define CONFIG_SYS_MEMTEST_START 0x00400000	/* 4M */
#define CONFIG_SYS_MEMTEST_END	0x007fffff	/*(_8M -1) */
#define CONFIG_SYS_LOAD_ADDR	0x00800000	/* default load adr- 8M */

/* pseudo-non volatile RAM [hex] */
#define CONFIG_KM_PNVRAM	0x80000
/* physical RAM MTD size [hex] */
#define CONFIG_KM_PHRAM		0x17F000

#define CONFIG_KM_CRAMFS_ADDR	0x2400000
#define CONFIG_KM_KERNEL_ADDR	0x2000000	/* 4096KBytes */

#define CONFIG_KM_DEF_ENV_CPU						\
	"addmtdparts=setenv bootargs ${bootargs} ${mtdparts}\0"		\
	"boot=bootm ${actual_kernel_addr} - -\0"			\
	"cramfsloadfdt=true\0"						\
	CONFIG_KM_DEF_ENV_UPDATE					\
	""

#define CONFIG_KM_ARCH_DBG_FILE		"scripts/debug-arm-env.txt"

#define CONFIG_MD5	/* get_random_hex on krikwood needs MD5 support */
#define CONFIG_SKIP_LOWLEVEL_INIT	/* disable board lowlevel_init */
#define CONFIG_KIRKWOOD_EGIGA_INIT	/* Enable GbePort0/1 for kernel */
#undef  CONFIG_KIRKWOOD_PCIE_INIT	/* Disable PCIE Port0 for kernel */
#define CONFIG_KIRKWOOD_RGMII_PAD_1V8	/* Set RGMII Pad voltage to 1.8V */

#define CONFIG_MISC_INIT_R

/*
 * NS16550 Configuration
 */
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE	(-4)
#define CONFIG_SYS_NS16550_CLK		CONFIG_SYS_TCLK
#define CONFIG_SYS_NS16550_COM1		KW_UART0_BASE

/*
 * Serial Port configuration
 * The following definitions let you select what serial you want to use
 * for your console driver.
 */

#define CONFIG_CONS_INDEX	1	/* Console on UART0 */

/*
 * For booting Linux, the board info and command line data
 * have to be in the first 8 MB of memory, since this is
 * the maximum mapped by the Linux kernel during initialization.
 */
#define CONFIG_BOOTMAPSZ	(8 << 20)	/* Initial Memmap for Linux */
#define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs  */
#define CONFIG_INITRD_TAG		/* enable INITRD tag */
#define CONFIG_SETUP_MEMORY_TAGS	/* enable memory tag */

/*
 * Commands configuration
 */
#define CONFIG_CMD_ELF
#define CONFIG_CMD_MTDPARTS
#define CONFIG_CMD_NAND
#define CONFIG_CMD_NFS

/*
 * Without NOR FLASH we need this
 */
#define CONFIG_SYS_NO_FLASH
#undef CONFIG_CMD_FLASH
#undef CONFIG_CMD_IMLS

/*
 * NAND Flash configuration
 */
#define CONFIG_SYS_MAX_NAND_DEVICE	1
#define NAND_MAX_CHIPS			1
#define CONFIG_NAND_KIRKWOOD
#define CONFIG_SYS_NAND_BASE		0xd8000000

#define BOOTFLASH_START		0x0

#define CONFIG_KM_CONSOLE_TTY	"ttyS0"

/*
 * Other required minimal configurations
 */
#define CONFIG_CONSOLE_INFO_QUIET	/* some code reduction */
#define CONFIG_ARCH_CPU_INIT		/* call arch_cpu_init() */
#define CONFIG_ARCH_MISC_INIT		/* call arch_misc_init() */
#define CONFIG_DISPLAY_CPUINFO		/* Display cpu info */
#define CONFIG_NR_DRAM_BANKS	4
#define CONFIG_STACKSIZE	0x00100000	/* regular stack- 1M */
#define CONFIG_SYS_RESET_ADDRESS 0xffff0000	/* Rst Vector Adr */

/*
 * Ethernet Driver configuration
 */
#define CONFIG_NETCONSOLE	/* include NetConsole support   */
#define CONFIG_NET_MULTI	/* specify more that one ports available */
#define CONFIG_MII		/* expose smi ove miiphy interface */
#define CONFIG_MVGBE		/* Enable Marvell Gbe Controller Driver */
#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN	/* detect link using phy */
#define CONFIG_MVGBE_PORTS	{1, 0}	/* enable port 0 only */
#define CONFIG_PHY_BASE_ADR	0
#define CONFIG_ENV_OVERWRITE	/* ethaddr can be reprogrammed */
#define CONFIG_RESET_PHY_R	/* use reset_phy() to init 88E1118 PHY */

/*
 * UBI related stuff
 */
#define CONFIG_SYS_USE_UBI

/*
 * I2C related stuff
 */
#define	CONFIG_SOFT_I2C		/* I2C bit-banged	*/

#define	CONFIG_KIRKWOOD_GPIO		/* Enable GPIO Support */
#if defined(CONFIG_SOFT_I2C)
#ifndef __ASSEMBLY__
#include <asm/arch-kirkwood/gpio.h>
extern void __set_direction(unsigned pin, int high);
void set_sda(int state);
void set_scl(int state);
int get_sda(void);
int get_scl(void);
#define KM_KIRKWOOD_SDA_PIN	8
#define KM_KIRKWOOD_SCL_PIN	9
#define KM_KIRKWOOD_ENV_WP	38

#define I2C_ACTIVE	__set_direction(KM_KIRKWOOD_SDA_PIN, 0)
#define I2C_TRISTATE	__set_direction(KM_KIRKWOOD_SDA_PIN, 1)
#define I2C_READ	(kw_gpio_get_value(KM_KIRKWOOD_SDA_PIN) ? 1 : 0)
#define I2C_SDA(bit)	kw_gpio_set_value(KM_KIRKWOOD_SDA_PIN, bit)
#define I2C_SCL(bit)	kw_gpio_set_value(KM_KIRKWOOD_SCL_PIN, bit)
#endif

#define I2C_DELAY	udelay(3)	/* 1/4 I2C clock duration */
#define I2C_SOFT_DECLARATIONS

#define	CONFIG_SYS_I2C_SLAVE		0x0
#define	CONFIG_SYS_I2C_SPEED		100000
#endif

#define CONFIG_SYS_I2C_EEPROM_ADDR	0x50
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	2

/*
 *  Environment variables configurations
 */
#define CONFIG_ENV_IS_IN_EEPROM		/* use EEPROM for environment vars */
#define CONFIG_SYS_DEF_EEPROM_ADDR	0x50
#define CONFIG_ENV_EEPROM_IS_ON_I2C
#define CONFIG_SYS_EEPROM_WREN
#define CONFIG_ENV_OFFSET		0x0 /* no bracets! */
#undef	CONFIG_ENV_SIZE
#define CONFIG_ENV_SIZE			(0x2000 - CONFIG_ENV_OFFSET)
#define CONFIG_I2C_ENV_EEPROM_BUS	"pca9547:70:d\0"

/* offset redund: (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) */
#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
#define CONFIG_ENV_OFFSET_REDUND	0x2000 /* no bracets! */
#define CONFIG_ENV_SIZE_REDUND		(CONFIG_ENV_SIZE)

#define CONFIG_CMD_SF

#define CONFIG_SPI_FLASH
#define CONFIG_HARD_SPI
#define CONFIG_KIRKWOOD_SPI
#define CONFIG_SPI_FLASH_STMICRO
#define CONFIG_ENV_SPI_BUS		0
#define CONFIG_ENV_SPI_CS		0
#define CONFIG_ENV_SPI_MAX_HZ		50000000	/* 50Mhz */

#define FLASH_GPIO_PIN			0x00010000

#define MTDIDS_DEFAULT		"nand0=orion_nand"
/* test-only: partitioning needs some tuning, this is just for tests */
#define MTDPARTS_DEFAULT	"mtdparts="				\
	"orion_nand:"							\
		"-(" CONFIG_KM_UBI_PARTITION_NAME ")"

#define	CONFIG_KM_DEF_ENV_UPDATE					\
	"update="							\
		"spi on;sf probe 0;sf erase 0 50000;"			\
		"sf write ${u-boot_addr_r} 0 ${filesize};"		\
		"spi off\0"

#if defined(CONFIG_SYS_NO_FLASH)
#define CONFIG_KM_UBI_PARTITION_NAME   "ubi0"
#undef	CONFIG_FLASH_CFI_MTD
#undef	CONFIG_JFFS2_CMDLINE
#endif

/* additions for new relocation code, must be added to all boards */
#define CONFIG_SYS_SDRAM_BASE		0x00000000
/* Kirkwood has 2k of Security SRAM, use it for SP */
#define CONFIG_SYS_INIT_SP_ADDR		0xC8012000
/* Do early setups now in board_init_f() */
#define CONFIG_BOARD_EARLY_INIT_F

/*
 * resereved pram area at the end of memroy [hex]
 * 8Mbytes for switch + 4Kbytes for bootcount
 */
#define CONFIG_KM_RESERVED_PRAM 0x801000
/* address for the bootcount (taken from end of RAM) */
#define BOOTCOUNT_ADDR          (CONFIG_KM_RESERVED_PRAM)

#endif /* _CONFIG_KM_ARM_H */
Commit	Line	Data
67fa8c25 HS	1	/*
	2	* (C) Copyright 2009
	3	* Marvell Semiconductor <www.marvell.com>
	4	* Prafulla Wadaskar <prafulla@marvell.com>
	5	*
	6	* (C) Copyright 2009
	7	* Stefan Roese, DENX Software Engineering, sr@denx.de.
	8	*
b11f53f3 HS	9	* (C) Copyright 2010-2011
	10	* Heiko Schocher, DENX Software Engineering, hs@denx.de.
	11	*
67fa8c25 HS	12	* See file CREDITS for list of people who contributed to this
	13	* project.
	14	*
	15	* This program is free software; you can redistribute it and/or
	16	* modify it under the terms of the GNU General Public License as
	17	* published by the Free Software Foundation; either version 2 of
	18	* the License, or (at your option) any later version.
	19	*
	20	* This program is distributed in the hope that it will be useful,
	21	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	22	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	23	* GNU General Public License for more details.
	24	*
	25	* You should have received a copy of the GNU General Public License
	26	* along with this program; if not, write to the Free Software
	27	* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
	28	* MA 02110-1301 USA
	29	*/
	30
b11f53f3 HS	31	/*
	32	* for linking errors see
	33	* http://lists.denx.de/pipermail/u-boot/2009-July/057350.html
	34	*/
67fa8c25 HS	35
	36	#ifndef _CONFIG_KM_ARM_H
	37	#define _CONFIG_KM_ARM_H
	38
	39	/*
	40	* High Level Configuration Options (easy to change)
	41	*/
	42	#define CONFIG_MARVELL
	43	#define CONFIG_ARM926EJS /* Basic Architecture */
	44	#define CONFIG_FEROCEON_88FR131 /* CPU Core subversion */
	45	#define CONFIG_KIRKWOOD /* SOC Family Name */
	46	#define CONFIG_KW88F6281 /* SOC Name */
802d9963	47	#define CONFIG_MACH_KM_KIRKWOOD /* Machine type */
67fa8c25 HS	48
	49	/* include common defines/options for all Keymile boards */
	50	#include "keymile-common.h"
de3ad13d	51
731b9680	52	#define CONFIG_SYS_TEXT_BASE 0x04000000 /* code address after reloc */
de3ad13d HB	53	#define CONFIG_ENV_SIZE (128 << 10) /* NAND chip block size */
	54	#define CONFIG_SYS_MEMTEST_START 0x00400000 /* 4M */
	55	#define CONFIG_SYS_MEMTEST_END 0x007fffff /(_8M -1) /
	56	#define CONFIG_SYS_LOAD_ADDR 0x00800000 /* default load adr- 8M */
	57
	58	/* pseudo-non volatile RAM [hex] */
	59	#define CONFIG_KM_PNVRAM 0x80000
	60	/* physical RAM MTD size [hex] */
	61	#define CONFIG_KM_PHRAM 0x17F000
	62
	63	#define CONFIG_KM_CRAMFS_ADDR 0x2400000
	64	#define CONFIG_KM_KERNEL_ADDR 0x2000000 /* 4096KBytes */
	65
	66	#define CONFIG_KM_DEF_ENV_CPU \
	67	"addmtdparts=setenv bootargs ${bootargs} ${mtdparts}\0" \
	68	"boot=bootm ${actual_kernel_addr} - -\0" \
2d9528e3	69	"cramfsloadfdt=true\0" \
de3ad13d HB	70	CONFIG_KM_DEF_ENV_UPDATE \
	71	""
	72
2d9528e3	73	#define CONFIG_KM_ARCH_DBG_FILE "scripts/debug-arm-env.txt"
67fa8c25 HS	74
	75	#define CONFIG_MD5 /* get_random_hex on krikwood needs MD5 support */
	76	#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */
	77	#define CONFIG_KIRKWOOD_EGIGA_INIT /* Enable GbePort0/1 for kernel */
	78	#undef CONFIG_KIRKWOOD_PCIE_INIT /* Disable PCIE Port0 for kernel */
	79	#define CONFIG_KIRKWOOD_RGMII_PAD_1V8 /* Set RGMII Pad voltage to 1.8V */
	80
	81	#define CONFIG_MISC_INIT_R
	82
	83	/*
	84	* NS16550 Configuration
	85	*/
	86	#define CONFIG_SYS_NS16550
	87	#define CONFIG_SYS_NS16550_SERIAL
	88	#define CONFIG_SYS_NS16550_REG_SIZE (-4)
	89	#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK
	90	#define CONFIG_SYS_NS16550_COM1 KW_UART0_BASE
	91
	92	/*
	93	* Serial Port configuration
	94	* The following definitions let you select what serial you want to use
	95	* for your console driver.
	96	*/
	97
	98	#define CONFIG_CONS_INDEX 1 /* Console on UART0 */
	99
	100	/*
	101	* For booting Linux, the board info and command line data
	102	* have to be in the first 8 MB of memory, since this is
	103	* the maximum mapped by the Linux kernel during initialization.
	104	*/
	105	#define CONFIG_BOOTMAPSZ (8 << 20) /* Initial Memmap for Linux */
	106	#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
	107	#define CONFIG_INITRD_TAG /* enable INITRD tag */
499b1a4d	108	#define CONFIG_SETUP_MEMORY_TAGS /* enable memory tag */
67fa8c25 HS	109
	110	/*
	111	* Commands configuration
	112	*/
	113	#define CONFIG_CMD_ELF
	114	#define CONFIG_CMD_MTDPARTS
	115	#define CONFIG_CMD_NAND
	116	#define CONFIG_CMD_NFS
	117
	118	/*
	119	* Without NOR FLASH we need this
	120	*/
	121	#define CONFIG_SYS_NO_FLASH
	122	#undef CONFIG_CMD_FLASH
	123	#undef CONFIG_CMD_IMLS
	124
	125	/*
	126	* NAND Flash configuration
	127	*/
	128	#define CONFIG_SYS_MAX_NAND_DEVICE 1
	129	#define NAND_MAX_CHIPS 1
	130	#define CONFIG_NAND_KIRKWOOD
	131	#define CONFIG_SYS_NAND_BASE 0xd8000000
	132
	133	#define BOOTFLASH_START 0x0
	134
	135	#define CONFIG_KM_CONSOLE_TTY "ttyS0"
	136
67fa8c25 HS	137	/*
	138	* Other required minimal configurations
	139	*/
	140	#define CONFIG_CONSOLE_INFO_QUIET /* some code reduction */
	141	#define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */
	142	#define CONFIG_ARCH_MISC_INIT /* call arch_misc_init() */
	143	#define CONFIG_DISPLAY_CPUINFO /* Display cpu info */
	144	#define CONFIG_NR_DRAM_BANKS 4
	145	#define CONFIG_STACKSIZE 0x00100000 /* regular stack- 1M */
	146	#define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */
	147
	148	/*
	149	* Ethernet Driver configuration
	150	*/
	151	#define CONFIG_NETCONSOLE /* include NetConsole support */
	152	#define CONFIG_NET_MULTI /* specify more that one ports available */
	153	#define CONFIG_MII /* expose smi ove miiphy interface */
d44265ad	154	#define CONFIG_MVGBE /* Enable Marvell Gbe Controller Driver */
67fa8c25	155	#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN /* detect link using phy */
d44265ad	156	#define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */
67fa8c25 HS	157	#define CONFIG_PHY_BASE_ADR 0
	158	#define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */
	159	#define CONFIG_RESET_PHY_R /* use reset_phy() to init 88E1118 PHY */
	160
	161	/*
	162	* UBI related stuff
	163	*/
	164	#define CONFIG_SYS_USE_UBI
	165
	166	/*
	167	* I2C related stuff
	168	*/
67fa8c25 HS	169	#define CONFIG_SOFT_I2C /* I2C bit-banged */
67fa8c25 HS	170
67fa8c25 HS	171	#define CONFIG_KIRKWOOD_GPIO /* Enable GPIO Support */
	172	#if defined(CONFIG_SOFT_I2C)
	173	#ifndef __ASSEMBLY__
	174	#include <asm/arch-kirkwood/gpio.h>
	175	extern void __set_direction(unsigned pin, int high);
499b1a4d HB	176	void set_sda(int state);
	177	void set_scl(int state);
	178	int get_sda(void);
	179	int get_scl(void);
44097e26 HS	180	#define KM_KIRKWOOD_SDA_PIN 8
	181	#define KM_KIRKWOOD_SCL_PIN 9
	182	#define KM_KIRKWOOD_ENV_WP 38
	183
	184	#define I2C_ACTIVE __set_direction(KM_KIRKWOOD_SDA_PIN, 0)
	185	#define I2C_TRISTATE __set_direction(KM_KIRKWOOD_SDA_PIN, 1)
	186	#define I2C_READ (kw_gpio_get_value(KM_KIRKWOOD_SDA_PIN) ? 1 : 0)
	187	#define I2C_SDA(bit) kw_gpio_set_value(KM_KIRKWOOD_SDA_PIN, bit)
	188	#define I2C_SCL(bit) kw_gpio_set_value(KM_KIRKWOOD_SCL_PIN, bit)
67fa8c25 HS	189	#endif
	190
	191	#define I2C_DELAY udelay(3) /* 1/4 I2C clock duration */
	192	#define I2C_SOFT_DECLARATIONS
	193
	194	#define CONFIG_SYS_I2C_SLAVE 0x0
	195	#define CONFIG_SYS_I2C_SPEED 100000
	196	#endif
	197
	198	#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
	199	#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
	200
331a30dc HS	201	/*
	202	* Environment variables configurations
	203	*/
	204	#define CONFIG_ENV_IS_IN_EEPROM /* use EEPROM for environment vars */
	205	#define CONFIG_SYS_DEF_EEPROM_ADDR 0x50
	206	#define CONFIG_ENV_EEPROM_IS_ON_I2C
	207	#define CONFIG_SYS_EEPROM_WREN
	208	#define CONFIG_ENV_OFFSET 0x0 /* no bracets! */
	209	#undef CONFIG_ENV_SIZE
	210	#define CONFIG_ENV_SIZE (0x2000 - CONFIG_ENV_OFFSET)
	211	#define CONFIG_I2C_ENV_EEPROM_BUS "pca9547:70:d\0"
	212
	213	/* offset redund: (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) */
	214	#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
	215	#define CONFIG_ENV_OFFSET_REDUND 0x2000 /* no bracets! */
	216	#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
	217
	218	#define CONFIG_CMD_SF
	219
	220	#define CONFIG_SPI_FLASH
	221	#define CONFIG_HARD_SPI
	222	#define CONFIG_KIRKWOOD_SPI
	223	#define CONFIG_SPI_FLASH_STMICRO
	224	#define CONFIG_ENV_SPI_BUS 0
	225	#define CONFIG_ENV_SPI_CS 0
	226	#define CONFIG_ENV_SPI_MAX_HZ 50000000 /* 50Mhz */
	227
	228	#define FLASH_GPIO_PIN 0x00010000
	229
	230	#define MTDIDS_DEFAULT "nand0=orion_nand"
	231	/* test-only: partitioning needs some tuning, this is just for tests */
	232	#define MTDPARTS_DEFAULT "mtdparts=" \
	233	"orion_nand:" \
	234	"-(" CONFIG_KM_UBI_PARTITION_NAME ")"
	235
	236	#define CONFIG_KM_DEF_ENV_UPDATE \
	237	"update=" \
	238	"spi on;sf probe 0;sf erase 0 50000;" \
	239	"sf write ${u-boot_addr_r} 0 ${filesize};" \
	240	"spi off\0"
	241
67fa8c25 HS	242	#if defined(CONFIG_SYS_NO_FLASH)
	243	#define CONFIG_KM_UBI_PARTITION_NAME "ubi0"
	244	#undef CONFIG_FLASH_CFI_MTD
	245	#undef CONFIG_JFFS2_CMDLINE
	246	#endif
	247
a784c01a	248	/* additions for new relocation code, must be added to all boards */
ab86f72c	249	#define CONFIG_SYS_SDRAM_BASE 0x00000000
6b0ccc3b HS	250	/* Kirkwood has 2k of Security SRAM, use it for SP */
	251	#define CONFIG_SYS_INIT_SP_ADDR 0xC8012000
	252	/* Do early setups now in board_init_f() */
	253	#define CONFIG_BOARD_EARLY_INIT_F
f1fef1d8 HS	254
	255	/*
	256	* resereved pram area at the end of memroy [hex]
	257	* 8Mbytes for switch + 4Kbytes for bootcount
	258	*/
	259	#define CONFIG_KM_RESERVED_PRAM 0x801000
a21b5d4b HB	260	/* address for the bootcount (taken from end of RAM) */
a21b5d4b HB	261	#define BOOTCOUNT_ADDR (CONFIG_KM_RESERVED_PRAM)
f1fef1d8	262
67fa8c25	263	#endif /* _CONFIG_KM_ARM_H */