[people/ms/u-boot.git] / include / configs / luan.h

/*
 * (C) Copyright 2005
 * Stefan Roese, DENX Software Engineering, sr@denx.de.
 * John Otken, jotken@softadvances.com
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

/************************************************************************
 * luan.h - configuration for LUAN board
 ***********************************************************************/
#ifndef __CONFIG_H
#define __CONFIG_H

/*-----------------------------------------------------------------------
 * High Level Configuration Options
 *----------------------------------------------------------------------*/
#define CONFIG_LUAN		1	/* Board is Luan		*/
#define CONFIG_440SP		1	/* Specific PPC440SP support    */
#define CONFIG_4xx		1	/* PPC4xx family	        */
#define CONFIG_440		1
#define CONFIG_SYS_CLK_FREQ	33333333 /* external freq to pll	*/

/*
 * Include common defines/options for all AMCC eval boards
 */
#define CONFIG_HOSTNAME		luan
#include "amcc-common.h"

#define CONFIG_BOARD_EARLY_INIT_F 1	/* call board_early_init_f()	*/
#define CONFIG_MISC_INIT_R	1	/* call misc_init_r()		*/

/*-----------------------------------------------------------------------
 * Base addresses -- Note these are effective addresses where the
 * actual resources get mapped (not physical addresses)
 *----------------------------------------------------------------------*/
#define CFG_LARGE_FLASH		0xffc00000	/* 4MB flash address CS0 */
#define CFG_SMALL_FLASH		0xff900000	/* 1MB flash address CS2 */
#define CFG_SRAM_BASE		0xff800000	/* 1MB SRAM  address CS2 */
#define CFG_EPLD_BASE		0xff000000	/* EPLD and FRAM     CS1 */

#define CFG_ISRAM_BASE	        0xf8000000	/* internal 8k SRAM (L2 cache) */

#define CFG_PERIPHERAL_BASE     0xf0000000	/* internal peripherals */

#define CFG_PCI_MEMBASE		0x80000000	/* mapped pci memory */
#define CFG_PCI_BASE		0xd0000000	/* internal PCI regs */
#define CFG_PCI_TARGBASE	0x80000000	/* PCIaddr mapped to CFG_PCI_MEMBASE */

#if CFG_LARGE_FLASH == 0xffc00000
#define CFG_FLASH_BASE		CFG_LARGE_FLASH
#else
#define CFG_FLASH_BASE		CFG_SMALL_FLASH
#endif

#if CFG_SRAM_BASE
#define CFG_KBYTES_SDRAM	1024*2
#else
#define CFG_KBYTES_SDRAM	1024
#endif

/*-----------------------------------------------------------------------
 * Initial RAM & stack pointer (placed in SDRAM)
 *----------------------------------------------------------------------*/
#define CFG_INIT_RAM_ADDR	CFG_ISRAM_BASE
#define CFG_INIT_RAM_END	(8 << 10)
#define CFG_GBL_DATA_SIZE	256		/* num bytes initial data */
#define CFG_GBL_DATA_OFFSET	(CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
#define CFG_INIT_SP_OFFSET	CFG_GBL_DATA_OFFSET

/*-----------------------------------------------------------------------
 * Serial Port
 *----------------------------------------------------------------------*/
#define CFG_EXT_SERIAL_CLOCK	11059200 /* external 11.059MHz clk */
#undef  CONFIG_UART1_CONSOLE		/* define if you want console on UART1 */

/*-----------------------------------------------------------------------
 * Environment
 *----------------------------------------------------------------------*/
/*
 * Define here the location of the environment variables (FLASH or EEPROM).
 * Note: DENX encourages to use redundant environment in FLASH.
 */
#define CFG_ENV_IS_IN_FLASH     1	/* use FLASH for environment vars	*/

/*-----------------------------------------------------------------------
 * FLASH related
 *----------------------------------------------------------------------*/
#define CFG_MAX_FLASH_BANKS	3	/* max number of memory banks		*/
#define CFG_MAX_FLASH_SECT	64	/* max number of sectors on one chip	*/

#define CFG_FLASH_ERASE_TOUT	120000	/* Timeout for Flash Erase (in ms)	*/
#define CFG_FLASH_WRITE_TOUT	500	/* Timeout for Flash Write (in ms)	*/

#define CFG_FLASH_EMPTY_INFO		/* print 'E' for empty sector on flinfo */

#define CFG_FLASH_ADDR0         0x555
#define CFG_FLASH_ADDR1         0x2aa
#define CFG_FLASH_WORD_SIZE     unsigned char

#ifdef CFG_ENV_IS_IN_FLASH
#define CFG_ENV_SECT_SIZE	0x10000 /* size of one complete sector	*/
#define CFG_ENV_ADDR		(CFG_MONITOR_BASE-CFG_ENV_SECT_SIZE)
#define CFG_ENV_SIZE		0x2000	/* Total Size of Environment Sector	*/

/* Address and size of Redundant Environment Sector	*/
#define CFG_ENV_ADDR_REDUND	(CFG_ENV_ADDR-CFG_ENV_SECT_SIZE)
#define CFG_ENV_SIZE_REDUND	(CFG_ENV_SIZE)
#endif /* CFG_ENV_IS_IN_FLASH */

/*-----------------------------------------------------------------------
 * DDR SDRAM
 *----------------------------------------------------------------------*/
#define CONFIG_SPD_EEPROM	1	/* Use SPD EEPROM for setup	*/
#define SPD_EEPROM_ADDRESS	{0x53, 0x52}	/* SPD i2c spd addresses*/
#define CONFIG_DDR_ECC		1	/* with ECC support		*/

/*-----------------------------------------------------------------------
 * I2C
 *----------------------------------------------------------------------*/
#define CFG_I2C_SPEED		400000	/* I2C speed and slave address	*/

#define CFG_I2C_MULTI_EEPROMS
#define CFG_I2C_EEPROM_ADDR	(0xa8>>1)
#define CFG_I2C_EEPROM_ADDR_LEN 1
#define CFG_EEPROM_PAGE_WRITE_ENABLE
#define CFG_EEPROM_PAGE_WRITE_BITS 3
#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10

/*
 * Default environment variables
 */
#define	CONFIG_EXTRA_ENV_SETTINGS					\
	CONFIG_AMCC_DEF_ENV						\
	CONFIG_AMCC_DEF_ENV_PPC						\
	CONFIG_AMCC_DEF_ENV_NOR_UPD					\
	"kernel_addr=fc000000\0"					\
	"ramdisk_addr=fc100000\0"					\
	""

#define CONFIG_HAS_ETH0
#define CONFIG_PHY_ADDR		1
#define CONFIG_CIS8201_PHY	1	/* Enable 'special' RGMII mode for Cicada phy */
#define CONFIG_PHY_GIGE		1	/* Include GbE speed/duplex detection */

#ifdef DEBUG
#define CONFIG_PANIC_HANG
#else
#define CONFIG_HW_WATCHDOG			/* watchdog */
#endif

/*
 * Commands additional to the ones defined in amcc-common.h
 */
#define CONFIG_CMD_PCI
#define CONFIG_CMD_SDRAM

/*-----------------------------------------------------------------------
 * PCI stuff
 *-----------------------------------------------------------------------
 */
#if defined(CONFIG_CMD_PCI)

/* General PCI */
#define CONFIG_PCI			/* include pci support	        */
#define CONFIG_PCI_PNP			/* do (not) pci plug-and-play   */
#define CONFIG_PCI_SCAN_SHOW            /* show pci devices on startup  */

/* Board-specific PCI */
#define CFG_PCI_TARGET_INIT
#undef  CFG_PCI_MASTER_INIT

#define CFG_PCI_SUBSYS_VENDORID 0x10e8	/* AMCC */
#define CFG_PCI_SUBSYS_DEVICEID 0x4403	/* whatever */

#endif

#endif	/* __CONFIG_H */
Commit	Line	Data
6e7fb6ea SR	1	/*
	2	* (C) Copyright 2005
	3	* Stefan Roese, DENX Software Engineering, sr@denx.de.
	4	* John Otken, jotken@softadvances.com
	5	*
	6	* See file CREDITS for list of people who contributed to this
	7	* project.
	8	*
	9	* This program is free software; you can redistribute it and/or
	10	* modify it under the terms of the GNU General Public License as
	11	* published by the Free Software Foundation; either version 2 of
	12	* the License, or (at your option) any later version.
	13	*
	14	* This program is distributed in the hope that it will be useful,
	15	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	16	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	17	* GNU General Public License for more details.
	18	*
	19	* You should have received a copy of the GNU General Public License
	20	* along with this program; if not, write to the Free Software
	21	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	22	* MA 02111-1307 USA
	23	*/
	24
	25	/************************************************************************
	26	* luan.h - configuration for LUAN board
	27	***********************************************************************/
	28	#ifndef __CONFIG_H
	29	#define __CONFIG_H
	30
	31	/*-----------------------------------------------------------------------
	32	* High Level Configuration Options
	33	----------------------------------------------------------------------/
	34	#define CONFIG_LUAN 1 /* Board is Luan */
	35	#define CONFIG_440SP 1 /* Specific PPC440SP support */
	36	#define CONFIG_4xx 1 /* PPC4xx family */
	37	#define CONFIG_440 1
	38	#define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */
	39
490f2040 SR	40	/*
	41	* Include common defines/options for all AMCC eval boards
	42	*/
	43	#define CONFIG_HOSTNAME luan
	44	#include "amcc-common.h"
	45
00cdb4ce	46	#define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */
6e7fb6ea SR	47	#define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */
	48
	49	/*-----------------------------------------------------------------------
	50	* Base addresses -- Note these are effective addresses where the
	51	* actual resources get mapped (not physical addresses)
	52	----------------------------------------------------------------------/
6e7fb6ea SR	53	#define CFG_LARGE_FLASH 0xffc00000 /* 4MB flash address CS0 */
	54	#define CFG_SMALL_FLASH 0xff900000 /* 1MB flash address CS2 */
	55	#define CFG_SRAM_BASE 0xff800000 /* 1MB SRAM address CS2 */
	56	#define CFG_EPLD_BASE 0xff000000 /* EPLD and FRAM CS1 */
	57
	58	#define CFG_ISRAM_BASE 0xf8000000 /* internal 8k SRAM (L2 cache) */
	59
	60	#define CFG_PERIPHERAL_BASE 0xf0000000 /* internal peripherals */
	61
	62	#define CFG_PCI_MEMBASE 0x80000000 /* mapped pci memory */
	63	#define CFG_PCI_BASE 0xd0000000 /* internal PCI regs */
	64	#define CFG_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to CFG_PCI_MEMBASE */
	65
	66	#if CFG_LARGE_FLASH == 0xffc00000
	67	#define CFG_FLASH_BASE CFG_LARGE_FLASH
	68	#else
	69	#define CFG_FLASH_BASE CFG_SMALL_FLASH
	70	#endif
	71
6e7fb6ea SR	72	#if CFG_SRAM_BASE
	73	#define CFG_KBYTES_SDRAM 1024*2
	74	#else
	75	#define CFG_KBYTES_SDRAM 1024
	76	#endif
	77
	78	/*-----------------------------------------------------------------------
	79	* Initial RAM & stack pointer (placed in SDRAM)
	80	----------------------------------------------------------------------/
	81	#define CFG_INIT_RAM_ADDR CFG_ISRAM_BASE
	82	#define CFG_INIT_RAM_END (8 << 10)
	83	#define CFG_GBL_DATA_SIZE 256 /* num bytes initial data */
	84	#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
	85	#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
	86
	87	/*-----------------------------------------------------------------------
	88	* Serial Port
	89	----------------------------------------------------------------------/
	90	#define CFG_EXT_SERIAL_CLOCK 11059200 /* external 11.059MHz clk */
6e7fb6ea SR	91	#undef CONFIG_UART1_CONSOLE /* define if you want console on UART1 */
6e7fb6ea SR	92
6e7fb6ea SR	93	/*-----------------------------------------------------------------------
	94	* Environment
	95	----------------------------------------------------------------------/
	96	/*
	97	* Define here the location of the environment variables (FLASH or EEPROM).
	98	* Note: DENX encourages to use redundant environment in FLASH.
	99	*/
	100	#define CFG_ENV_IS_IN_FLASH 1 /* use FLASH for environment vars */
	101
	102	/*-----------------------------------------------------------------------
	103	* FLASH related
	104	----------------------------------------------------------------------/
	105	#define CFG_MAX_FLASH_BANKS 3 /* max number of memory banks */
	106	#define CFG_MAX_FLASH_SECT 64 /* max number of sectors on one chip */
	107
	108	#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
	109	#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
	110
	111	#define CFG_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
	112
	113	#define CFG_FLASH_ADDR0 0x555
	114	#define CFG_FLASH_ADDR1 0x2aa
	115	#define CFG_FLASH_WORD_SIZE unsigned char
	116
	117	#ifdef CFG_ENV_IS_IN_FLASH
	118	#define CFG_ENV_SECT_SIZE 0x10000 /* size of one complete sector */
	119	#define CFG_ENV_ADDR (CFG_MONITOR_BASE-CFG_ENV_SECT_SIZE)
	120	#define CFG_ENV_SIZE 0x2000 /* Total Size of Environment Sector */
	121
	122	/* Address and size of Redundant Environment Sector */
	123	#define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR-CFG_ENV_SECT_SIZE)
	124	#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
	125	#endif /* CFG_ENV_IS_IN_FLASH */
	126
	127	/*-----------------------------------------------------------------------
	128	* DDR SDRAM
	129	----------------------------------------------------------------------/
00cdb4ce SR	130	#define CONFIG_SPD_EEPROM 1 /* Use SPD EEPROM for setup */
00cdb4ce SR	131	#define SPD_EEPROM_ADDRESS {0x53, 0x52} /* SPD i2c spd addresses*/
e4bbed28	132	#define CONFIG_DDR_ECC 1 /* with ECC support */
6e7fb6ea SR	133
	134	/*-----------------------------------------------------------------------
	135	* I2C
	136	----------------------------------------------------------------------/
6e7fb6ea	137	#define CFG_I2C_SPEED 400000 /* I2C speed and slave address */
6e7fb6ea	138
4f92ed5f SR	139	#define CFG_I2C_MULTI_EEPROMS
	140	#define CFG_I2C_EEPROM_ADDR (0xa8>>1)
	141	#define CFG_I2C_EEPROM_ADDR_LEN 1
	142	#define CFG_EEPROM_PAGE_WRITE_ENABLE
	143	#define CFG_EEPROM_PAGE_WRITE_BITS 3
	144	#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10
	145
490f2040 SR	146	/*
	147	* Default environment variables
	148	*/
	149	#define CONFIG_EXTRA_ENV_SETTINGS \
	150	CONFIG_AMCC_DEF_ENV \
	151	CONFIG_AMCC_DEF_ENV_PPC \
	152	CONFIG_AMCC_DEF_ENV_NOR_UPD \
6e7fb6ea SR	153	"kernel_addr=fc000000\0" \
6e7fb6ea SR	154	"ramdisk_addr=fc100000\0" \
6e7fb6ea	155	""
6e7fb6ea	156
a00eccfe	157	#define CONFIG_HAS_ETH0
6e7fb6ea SR	158	#define CONFIG_PHY_ADDR 1
	159	#define CONFIG_CIS8201_PHY 1 /* Enable 'special' RGMII mode for Cicada phy */
	160	#define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */
	161
6e7fb6ea SR	162	#ifdef DEBUG
	163	#define CONFIG_PANIC_HANG
	164	#else
	165	#define CONFIG_HW_WATCHDOG /* watchdog */
	166	#endif
	167
7f5c0157	168	/*
490f2040	169	* Commands additional to the ones defined in amcc-common.h
7f5c0157	170	*/
9bbb1c08	171	#define CONFIG_CMD_PCI
9bbb1c08	172	#define CONFIG_CMD_SDRAM
6e7fb6ea	173
6e7fb6ea SR	174	/*-----------------------------------------------------------------------
	175	* PCI stuff
	176	*-----------------------------------------------------------------------
	177	*/
9bbb1c08	178	#if defined(CONFIG_CMD_PCI)
6e7fb6ea SR	179
	180	/* General PCI */
	181	#define CONFIG_PCI /* include pci support */
	182	#define CONFIG_PCI_PNP /* do (not) pci plug-and-play */
	183	#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
	184
	185	/* Board-specific PCI */
6e7fb6ea SR	186	#define CFG_PCI_TARGET_INIT
	187	#undef CFG_PCI_MASTER_INIT
	188
	189	#define CFG_PCI_SUBSYS_VENDORID 0x10e8 /* AMCC */
	190	#define CFG_PCI_SUBSYS_DEVICEID 0x4403 /* whatever */
	191
9bbb1c08	192	#endif
6e7fb6ea	193
6e7fb6ea	194	#endif /* __CONFIG_H */