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fc102728 MV |
1 | /* |
2 | * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com> | |
3 | * on behalf of DENX Software Engineering GmbH | |
4 | * | |
3765b3e7 | 5 | * SPDX-License-Identifier: GPL-2.0+ |
fc102728 | 6 | */ |
5434caf5 MV |
7 | #ifndef __CONFIGS_M28EVK_H__ |
8 | #define __CONFIGS_M28EVK_H__ | |
fc102728 | 9 | |
5434caf5 MV |
10 | /* System configurations */ |
11 | #define CONFIG_MX28 /* i.MX28 SoC */ | |
5f71bca7 | 12 | #define MACH_TYPE_M28EVK 3613 |
5f71bca7 | 13 | #define CONFIG_MACH_TYPE MACH_TYPE_M28EVK |
fc102728 | 14 | |
31b57a52 MV |
15 | #define CONFIG_TIMESTAMP /* Print image info with timestamp */ |
16 | ||
5434caf5 | 17 | /* U-Boot Commands */ |
5f71bca7 | 18 | #define CONFIG_SYS_NO_FLASH |
5f71bca7 WD |
19 | #define CONFIG_DISPLAY_CPUINFO |
20 | #define CONFIG_DOS_PARTITION | |
31b57a52 | 21 | #define CONFIG_FAT_WRITE |
fc102728 | 22 | |
31b57a52 MV |
23 | #define CONFIG_CMD_ASKENV |
24 | #define CONFIG_CMD_BMP | |
5f71bca7 WD |
25 | #define CONFIG_CMD_CACHE |
26 | #define CONFIG_CMD_DATE | |
27 | #define CONFIG_CMD_DHCP | |
28 | #define CONFIG_CMD_EEPROM | |
31b57a52 MV |
29 | #define CONFIG_CMD_EXT4 |
30 | #define CONFIG_CMD_EXT4_WRITE | |
5f71bca7 | 31 | #define CONFIG_CMD_FAT |
fc532a92 | 32 | #define CONFIG_CMD_FS_GENERIC |
ee747a21 | 33 | #define CONFIG_CMD_GREPENV |
5f71bca7 WD |
34 | #define CONFIG_CMD_I2C |
35 | #define CONFIG_CMD_MII | |
36 | #define CONFIG_CMD_MMC | |
37 | #define CONFIG_CMD_NAND | |
32cc24d3 | 38 | #define CONFIG_CMD_NAND_TRIMFFS |
5f71bca7 | 39 | #define CONFIG_CMD_PING |
5f71bca7 WD |
40 | #define CONFIG_CMD_SF |
41 | #define CONFIG_CMD_SPI | |
42 | #define CONFIG_CMD_USB | |
d782c1fe | 43 | #define CONFIG_VIDEO |
fc102728 | 44 | |
ee747a21 | 45 | |
5434caf5 | 46 | /* Memory configuration */ |
5f71bca7 WD |
47 | #define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */ |
48 | #define PHYS_SDRAM_1 0x40000000 /* Base address */ | |
49 | #define PHYS_SDRAM_1_SIZE 0x20000000 /* Max 512 MB RAM */ | |
5f71bca7 | 50 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 |
fc102728 | 51 | |
5434caf5 | 52 | /* Environment */ |
5f71bca7 | 53 | #define CONFIG_ENV_SIZE (16 * 1024) |
5434caf5 | 54 | #define CONFIG_ENV_IS_IN_NAND |
fc102728 MV |
55 | |
56 | /* Environment is in NAND */ | |
5434caf5 | 57 | #if defined(CONFIG_CMD_NAND) && defined(CONFIG_ENV_IS_IN_NAND) |
5f71bca7 WD |
58 | #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE |
59 | #define CONFIG_ENV_SECT_SIZE (128 * 1024) | |
76582f9d MV |
60 | #define CONFIG_ENV_RANGE (4 * CONFIG_ENV_SECT_SIZE) |
61 | #define CONFIG_ENV_OFFSET (24 * CONFIG_ENV_SECT_SIZE) /* 3 MiB */ | |
5f71bca7 | 62 | #define CONFIG_ENV_OFFSET_REDUND \ |
fc102728 MV |
63 | (CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE) |
64 | ||
5f71bca7 WD |
65 | #define CONFIG_CMD_UBI |
66 | #define CONFIG_CMD_UBIFS | |
67 | #define CONFIG_CMD_MTDPARTS | |
68 | #define CONFIG_RBTREE | |
69 | #define CONFIG_LZO | |
70 | #define CONFIG_MTD_DEVICE | |
71 | #define CONFIG_MTD_PARTITIONS | |
72 | #define MTDIDS_DEFAULT "nand0=gpmi-nand" | |
73 | #define MTDPARTS_DEFAULT \ | |
c16ecb09 | 74 | "mtdparts=gpmi-nand:" \ |
76582f9d MV |
75 | "3m(u-boot)," \ |
76 | "512k(env1)," \ | |
77 | "512k(env2)," \ | |
78 | "14m(boot)," \ | |
79 | "238m(data)," \ | |
80 | "-@4096k(UBI)" | |
c660a541 | 81 | #else |
5f71bca7 | 82 | #define CONFIG_ENV_IS_NOWHERE |
fc102728 MV |
83 | #endif |
84 | ||
5434caf5 MV |
85 | /* FEC Ethernet on SoC */ |
86 | #ifdef CONFIG_CMD_NET | |
5f71bca7 | 87 | #define CONFIG_FEC_MXC |
fc102728 MV |
88 | #endif |
89 | ||
5434caf5 MV |
90 | /* EEPROM */ |
91 | #ifdef CONFIG_CMD_EEPROM | |
5f71bca7 | 92 | #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 |
fc102728 MV |
93 | #endif |
94 | ||
5434caf5 MV |
95 | /* RTC */ |
96 | #ifdef CONFIG_CMD_DATE | |
fc102728 | 97 | /* Use the internal RTC in the MXS chip */ |
5f71bca7 | 98 | #define CONFIG_RTC_INTERNAL |
5434caf5 | 99 | #ifdef CONFIG_RTC_INTERNAL |
5f71bca7 | 100 | #define CONFIG_RTC_MXS |
fc102728 | 101 | #else |
5f71bca7 WD |
102 | #define CONFIG_RTC_M41T62 |
103 | #define CONFIG_SYS_I2C_RTC_ADDR 0x68 | |
104 | #define CONFIG_SYS_M41T11_BASE_YEAR 2000 | |
fc102728 MV |
105 | #endif |
106 | #endif | |
107 | ||
5434caf5 MV |
108 | /* USB */ |
109 | #ifdef CONFIG_CMD_USB | |
afa87210 MV |
110 | #define CONFIG_EHCI_MXS_PORT0 |
111 | #define CONFIG_EHCI_MXS_PORT1 | |
112 | #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 | |
5f71bca7 | 113 | #define CONFIG_USB_STORAGE |
8f59bc1f MV |
114 | #endif |
115 | ||
5434caf5 MV |
116 | /* SPI */ |
117 | #ifdef CONFIG_CMD_SPI | |
5f71bca7 WD |
118 | #define CONFIG_DEFAULT_SPI_BUS 2 |
119 | #define CONFIG_DEFAULT_SPI_CS 0 | |
120 | #define CONFIG_DEFAULT_SPI_MODE SPI_MODE_0 | |
fc102728 MV |
121 | |
122 | /* SPI FLASH */ | |
5434caf5 | 123 | #ifdef CONFIG_CMD_SF |
5f71bca7 WD |
124 | #define CONFIG_SF_DEFAULT_BUS 2 |
125 | #define CONFIG_SF_DEFAULT_CS 0 | |
126 | #define CONFIG_SF_DEFAULT_SPEED 40000000 | |
127 | #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 | |
fc102728 | 128 | |
5f71bca7 WD |
129 | #define CONFIG_ENV_SPI_BUS 2 |
130 | #define CONFIG_ENV_SPI_CS 0 | |
131 | #define CONFIG_ENV_SPI_MAX_HZ 40000000 | |
132 | #define CONFIG_ENV_SPI_MODE SPI_MODE_0 | |
fc102728 | 133 | #endif |
5434caf5 | 134 | |
fc102728 MV |
135 | #endif |
136 | ||
5434caf5 MV |
137 | /* LCD */ |
138 | #ifdef CONFIG_VIDEO | |
d782c1fe | 139 | #define CONFIG_VIDEO_LOGO |
d782c1fe MV |
140 | #define CONFIG_SPLASH_SCREEN |
141 | #define CONFIG_CMD_BMP | |
142 | #define CONFIG_BMP_16BPP | |
143 | #define CONFIG_VIDEO_BMP_RLE8 | |
144 | #define CONFIG_VIDEO_BMP_GZIP | |
31b57a52 | 145 | #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (2 << 20) |
d782c1fe MV |
146 | #endif |
147 | ||
5434caf5 | 148 | /* Booting Linux */ |
5f71bca7 | 149 | #define CONFIG_BOOTDELAY 3 |
a428ac91 | 150 | #define CONFIG_BOOTFILE "fitImage" |
5f71bca7 | 151 | #define CONFIG_BOOTARGS "console=ttyAMA0,115200n8 " |
a428ac91 | 152 | #define CONFIG_BOOTCOMMAND "run mmc_mmc" |
5f71bca7 WD |
153 | #define CONFIG_LOADADDR 0x42000000 |
154 | #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR | |
fc102728 | 155 | |
5434caf5 | 156 | /* Extra Environment */ |
a428ac91 LR |
157 | #define CONFIG_PREBOOT "run try_bootscript" |
158 | #define CONFIG_HOSTNAME m28evk | |
159 | ||
5f71bca7 | 160 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
a428ac91 LR |
161 | "consdev=ttyAMA0\0" \ |
162 | "baudrate=115200\0" \ | |
d12159b6 | 163 | "bootscript=boot.scr\0" \ |
a428ac91 LR |
164 | "bootdev=/dev/mmcblk0p2\0" \ |
165 | "rootdev=/dev/mmcblk0p3\0" \ | |
166 | "netdev=eth0\0" \ | |
167 | "hostname=m28evk\0" \ | |
168 | "rootpath=/opt/eldk-5.5/armv5te/rootfs-qte-sdk\0" \ | |
169 | "kernel_addr_r=0x42000000\0" \ | |
170 | "videomode=video=ctfb:x:800,y:480,depth:18,mode:0,pclk:30066," \ | |
171 | "le:0,ri:256,up:0,lo:45,hs:1,vs:1,sync:100663296," \ | |
172 | "vmode:0\0" \ | |
fc102728 MV |
173 | "update_nand_full_filename=u-boot.nand\0" \ |
174 | "update_nand_firmware_filename=u-boot.sb\0" \ | |
9a0f98d3 | 175 | "update_sd_firmware_filename=u-boot.sd\0" \ |
fc102728 MV |
176 | "update_nand_firmware_maxsz=0x100000\0" \ |
177 | "update_nand_stride=0x40\0" /* MX28 datasheet ch. 12.12 */ \ | |
178 | "update_nand_count=0x4\0" /* MX28 datasheet ch. 12.12 */ \ | |
179 | "update_nand_get_fcb_size=" /* Get size of FCB blocks */ \ | |
180 | "nand device 0 ; " \ | |
181 | "nand info ; " \ | |
182 | "setexpr fcb_sz ${update_nand_stride} * ${update_nand_count};" \ | |
183 | "setexpr update_nand_fcb ${fcb_sz} * ${nand_writesize}\0" \ | |
184 | "update_nand_full=" /* Update FCB, DBBT and FW */ \ | |
185 | "if tftp ${update_nand_full_filename} ; then " \ | |
186 | "run update_nand_get_fcb_size ; " \ | |
187 | "nand scrub -y 0x0 ${filesize} ; " \ | |
a428ac91 | 188 | "nand write.raw ${loadaddr} 0x0 ${fcb_sz} ; " \ |
fc102728 MV |
189 | "setexpr update_off ${loadaddr} + ${update_nand_fcb} ; " \ |
190 | "setexpr update_sz ${filesize} - ${update_nand_fcb} ; " \ | |
191 | "nand write ${update_off} ${update_nand_fcb} ${update_sz} ; " \ | |
192 | "fi\0" \ | |
193 | "update_nand_firmware=" /* Update only firmware */ \ | |
194 | "if tftp ${update_nand_firmware_filename} ; then " \ | |
195 | "run update_nand_get_fcb_size ; " \ | |
196 | "setexpr fcb_sz ${update_nand_fcb} * 2 ; " /* FCB + DBBT */ \ | |
197 | "setexpr fw_sz ${update_nand_firmware_maxsz} * 2 ; " \ | |
198 | "setexpr fw_off ${fcb_sz} + ${update_nand_firmware_maxsz};" \ | |
199 | "nand erase ${fcb_sz} ${fw_sz} ; " \ | |
200 | "nand write ${loadaddr} ${fcb_sz} ${filesize} ; " \ | |
201 | "nand write ${loadaddr} ${fw_off} ${filesize} ; " \ | |
9a0f98d3 MV |
202 | "fi\0" \ |
203 | "update_sd_firmware=" /* Update the SD firmware partition */ \ | |
204 | "if mmc rescan ; then " \ | |
205 | "if tftp ${update_sd_firmware_filename} ; then " \ | |
206 | "setexpr fw_sz ${filesize} / 0x200 ; " /* SD block size */ \ | |
207 | "setexpr fw_sz ${fw_sz} + 1 ; " \ | |
208 | "mmc write ${loadaddr} 0x800 ${fw_sz} ; " \ | |
209 | "fi ; " \ | |
a428ac91 LR |
210 | "fi\0" \ |
211 | "addcons=" \ | |
212 | "setenv bootargs ${bootargs} " \ | |
213 | "console=${consdev},${baudrate}\0" \ | |
214 | "addip=" \ | |
215 | "setenv bootargs ${bootargs} " \ | |
216 | "ip=${ipaddr}:${serverip}:${gatewayip}:" \ | |
217 | "${netmask}:${hostname}:${netdev}:off\0" \ | |
218 | "addmisc=" \ | |
219 | "setenv bootargs ${bootargs} ${miscargs}\0" \ | |
220 | "adddfltmtd=" \ | |
221 | "if test \"x${mtdparts}\" == \"x\" ; then " \ | |
222 | "mtdparts default ; " \ | |
223 | "fi\0" \ | |
224 | "addmtd=" \ | |
225 | "run adddfltmtd ; " \ | |
226 | "setenv bootargs ${bootargs} ${mtdparts}\0" \ | |
227 | "addargs=run addcons addmtd addmisc\0" \ | |
228 | "mmcload=" \ | |
229 | "mmc rescan ; " \ | |
fc532a92 | 230 | "load mmc 0:2 ${kernel_addr_r} ${bootfile}\0" \ |
a428ac91 LR |
231 | "ubiload=" \ |
232 | "ubi part UBI ; ubifsmount ubi0:rootfs ; " \ | |
233 | "ubifsload ${kernel_addr_r} /boot/${bootfile}\0" \ | |
234 | "netload=" \ | |
235 | "tftp ${kernel_addr_r} ${hostname}/${bootfile}\0" \ | |
236 | "miscargs=nohlt panic=1\0" \ | |
237 | "mmcargs=setenv bootargs root=${rootdev} rw rootwait\0" \ | |
238 | "ubiargs=" \ | |
239 | "setenv bootargs ubi.mtd=5 " \ | |
240 | "root=ubi0:rootfs rootfstype=ubifs\0" \ | |
241 | "nfsargs=" \ | |
242 | "setenv bootargs root=/dev/nfs rw " \ | |
243 | "nfsroot=${serverip}:${rootpath},v3,tcp\0" \ | |
244 | "mmc_mmc=" \ | |
245 | "run mmcload mmcargs addargs ; " \ | |
246 | "bootm ${kernel_addr_r}\0" \ | |
247 | "mmc_ubi=" \ | |
248 | "run mmcload ubiargs addargs ; " \ | |
249 | "bootm ${kernel_addr_r}\0" \ | |
250 | "mmc_nfs=" \ | |
251 | "run mmcload nfsargs addip addargs ; " \ | |
252 | "bootm ${kernel_addr_r}\0" \ | |
253 | "ubi_mmc=" \ | |
254 | "run ubiload mmcargs addargs ; " \ | |
255 | "bootm ${kernel_addr_r}\0" \ | |
256 | "ubi_ubi=" \ | |
257 | "run ubiload ubiargs addargs ; " \ | |
258 | "bootm ${kernel_addr_r}\0" \ | |
259 | "ubi_nfs=" \ | |
260 | "run ubiload nfsargs addip addargs ; " \ | |
261 | "bootm ${kernel_addr_r}\0" \ | |
262 | "net_mmc=" \ | |
263 | "run netload mmcargs addargs ; " \ | |
264 | "bootm ${kernel_addr_r}\0" \ | |
265 | "net_ubi=" \ | |
266 | "run netload ubiargs addargs ; " \ | |
267 | "bootm ${kernel_addr_r}\0" \ | |
268 | "net_nfs=" \ | |
269 | "run netload nfsargs addip addargs ; " \ | |
270 | "bootm ${kernel_addr_r}\0" \ | |
271 | "try_bootscript=" \ | |
272 | "mmc rescan;" \ | |
4ba9b1c2 | 273 | "if test -e mmc 0:2 ${bootscript} ; then " \ |
fc532a92 | 274 | "if load mmc 0:2 ${kernel_addr_r} ${bootscript};" \ |
46f8a4b7 MV |
275 | "then ; " \ |
276 | "echo Running bootscript... ; " \ | |
277 | "source ${kernel_addr_r} ; " \ | |
4ba9b1c2 | 278 | "fi ; " \ |
fc102728 MV |
279 | "fi\0" |
280 | ||
5434caf5 MV |
281 | /* The rest of the configuration is shared */ |
282 | #include <configs/mxs.h> | |
283 | ||
284 | #endif /* __CONFIGS_M28EVK_H__ */ |