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0f83b365 MV |
1 | /* |
2 | * DENX M53 configuration | |
3 | * Copyright (C) 2012-2013 Marek Vasut <marex@denx.de> | |
4 | * | |
3765b3e7 | 5 | * SPDX-License-Identifier: GPL-2.0+ |
0f83b365 MV |
6 | */ |
7 | ||
8 | #ifndef __M53EVK_CONFIG_H__ | |
9 | #define __M53EVK_CONFIG_H__ | |
10 | ||
11 | #define CONFIG_MX53 | |
12 | #define CONFIG_MXC_GPIO | |
0f83b365 MV |
13 | |
14 | #include <asm/arch/imx-regs.h> | |
15 | ||
16 | #define CONFIG_DISPLAY_CPUINFO | |
17 | #define CONFIG_BOARD_EARLY_INIT_F | |
18 | #define CONFIG_REVISION_TAG | |
19 | #define CONFIG_SYS_NO_FLASH | |
18fb0e3c | 20 | #define CONFIG_SYS_FSL_CLK |
0f83b365 | 21 | |
62d3c2d6 MV |
22 | #define CONFIG_TIMESTAMP /* Print image info with timestamp */ |
23 | ||
0f83b365 MV |
24 | /* |
25 | * U-Boot Commands | |
26 | */ | |
0f83b365 MV |
27 | #define CONFIG_DISPLAY_BOARDINFO |
28 | #define CONFIG_DOS_PARTITION | |
62d3c2d6 | 29 | #define CONFIG_FAT_WRITE |
0f83b365 | 30 | |
62d3c2d6 | 31 | #define CONFIG_CMD_BMP |
0f83b365 | 32 | #define CONFIG_CMD_DATE |
0f83b365 | 33 | #define CONFIG_CMD_NAND |
08cb4483 | 34 | #define CONFIG_CMD_NAND_TRIMFFS |
0f83b365 | 35 | #define CONFIG_CMD_SATA |
502a710f | 36 | #define CONFIG_VIDEO |
0f83b365 MV |
37 | |
38 | /* | |
39 | * Memory configurations | |
40 | */ | |
41 | #define CONFIG_NR_DRAM_BANKS 2 | |
42 | #define PHYS_SDRAM_1 CSD0_BASE_ADDR | |
97334c66 | 43 | #define PHYS_SDRAM_1_SIZE (gd->bd->bi_dram[0].size) |
0f83b365 | 44 | #define PHYS_SDRAM_2 CSD1_BASE_ADDR |
97334c66 MV |
45 | #define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size) |
46 | #define PHYS_SDRAM_SIZE (gd->ram_size) | |
0f83b365 MV |
47 | #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) |
48 | #define CONFIG_SYS_MEMTEST_START 0x70000000 | |
2f844e76 | 49 | #define CONFIG_SYS_MEMTEST_END 0x8ff00000 |
0f83b365 MV |
50 | |
51 | #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) | |
52 | #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) | |
53 | #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) | |
54 | ||
55 | #define CONFIG_SYS_INIT_SP_OFFSET \ | |
56 | (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) | |
57 | #define CONFIG_SYS_INIT_SP_ADDR \ | |
58 | (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) | |
59 | ||
60 | #define CONFIG_SYS_TEXT_BASE 0x71000000 | |
61 | ||
62 | /* | |
63 | * U-Boot general configurations | |
64 | */ | |
65 | #define CONFIG_SYS_LONGHELP | |
0f83b365 MV |
66 | #define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */ |
67 | #define CONFIG_SYS_PBSIZE \ | |
68 | (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) | |
69 | /* Print buffer size */ | |
70 | #define CONFIG_SYS_MAXARGS 32 /* Max number of command args */ | |
71 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE | |
72 | /* Boot argument buffer size */ | |
73 | #define CONFIG_VERSION_VARIABLE /* U-BOOT version */ | |
74 | #define CONFIG_AUTO_COMPLETE /* Command auto complete */ | |
75 | #define CONFIG_CMDLINE_EDITING /* Command history etc */ | |
0f83b365 MV |
76 | |
77 | /* | |
78 | * Serial Driver | |
79 | */ | |
80 | #define CONFIG_MXC_UART | |
81 | #define CONFIG_MXC_UART_BASE UART2_BASE | |
82 | #define CONFIG_CONS_INDEX 1 | |
83 | #define CONFIG_BAUDRATE 115200 | |
84 | ||
85 | /* | |
86 | * MMC Driver | |
87 | */ | |
88 | #ifdef CONFIG_CMD_MMC | |
89 | #define CONFIG_MMC | |
90 | #define CONFIG_GENERIC_MMC | |
91 | #define CONFIG_FSL_ESDHC | |
92 | #define CONFIG_SYS_FSL_ESDHC_ADDR 0 | |
93 | #define CONFIG_SYS_FSL_ESDHC_NUM 1 | |
94 | #endif | |
95 | ||
96 | /* | |
97 | * NAND | |
98 | */ | |
99 | #define CONFIG_ENV_SIZE (16 * 1024) | |
100 | #ifdef CONFIG_CMD_NAND | |
101 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 | |
102 | #define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR_AXI | |
103 | #define CONFIG_NAND_MXC | |
104 | #define CONFIG_MXC_NAND_REGS_BASE NFC_BASE_ADDR_AXI | |
105 | #define CONFIG_MXC_NAND_IP_REGS_BASE NFC_BASE_ADDR | |
106 | #define CONFIG_SYS_NAND_LARGEPAGE | |
107 | #define CONFIG_MXC_NAND_HWECC | |
108 | #define CONFIG_SYS_NAND_USE_FLASH_BBT | |
109 | ||
110 | /* Environment is in NAND */ | |
111 | #define CONFIG_ENV_IS_IN_NAND | |
112 | #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE | |
113 | #define CONFIG_ENV_SECT_SIZE (128 * 1024) | |
fc23b530 MV |
114 | #define CONFIG_ENV_RANGE (4 * CONFIG_ENV_SECT_SIZE) |
115 | #define CONFIG_ENV_OFFSET (8 * CONFIG_ENV_SECT_SIZE) /* 1 MiB */ | |
0f83b365 MV |
116 | #define CONFIG_ENV_OFFSET_REDUND \ |
117 | (CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE) | |
118 | ||
119 | #define CONFIG_CMD_UBI | |
120 | #define CONFIG_CMD_UBIFS | |
121 | #define CONFIG_CMD_MTDPARTS | |
122 | #define CONFIG_RBTREE | |
123 | #define CONFIG_LZO | |
124 | #define CONFIG_MTD_DEVICE | |
125 | #define CONFIG_MTD_PARTITIONS | |
8331273c | 126 | #define MTDIDS_DEFAULT "nand0=mxc_nand" |
0f83b365 | 127 | #define MTDPARTS_DEFAULT \ |
8331273c | 128 | "mtdparts=mxc_nand:" \ |
fc23b530 MV |
129 | "1024k(u-boot)," \ |
130 | "512k(env1)," \ | |
131 | "512k(env2)," \ | |
132 | "14m(boot)," \ | |
133 | "240m(data)," \ | |
134 | "-@2048k(UBI)" | |
0f83b365 MV |
135 | #else |
136 | #define CONFIG_ENV_IS_NOWHERE | |
137 | #endif | |
138 | ||
139 | /* | |
140 | * Ethernet on SOC (FEC) | |
141 | */ | |
142 | #ifdef CONFIG_CMD_NET | |
143 | #define CONFIG_FEC_MXC | |
144 | #define IMX_FEC_BASE FEC_BASE_ADDR | |
145 | #define CONFIG_FEC_MXC_PHYADDR 0x0 | |
146 | #define CONFIG_MII | |
147 | #define CONFIG_DISCOVER_PHY | |
148 | #define CONFIG_FEC_XCV_TYPE RMII | |
149 | #define CONFIG_PHYLIB | |
150 | #define CONFIG_PHY_MICREL | |
85d8a5fc | 151 | #define CONFIG_ETHPRIME "FEC0" |
0f83b365 MV |
152 | #endif |
153 | ||
154 | /* | |
155 | * I2C | |
156 | */ | |
157 | #ifdef CONFIG_CMD_I2C | |
b089d039 | 158 | #define CONFIG_SYS_I2C |
159 | #define CONFIG_SYS_I2C_MXC | |
03544c66 AA |
160 | #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ |
161 | #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ | |
f8cb101e | 162 | #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ |
25fe0572 | 163 | #define CONFIG_SYS_RTC_BUS_NUM 1 /* I2C2 */ |
0f83b365 MV |
164 | #endif |
165 | ||
166 | /* | |
167 | * RTC | |
168 | */ | |
169 | #ifdef CONFIG_CMD_DATE | |
170 | #define CONFIG_RTC_M41T62 | |
171 | #define CONFIG_SYS_I2C_RTC_ADDR 0x68 | |
172 | #define CONFIG_SYS_M41T11_BASE_YEAR 2000 | |
173 | #endif | |
174 | ||
175 | /* | |
176 | * USB | |
177 | */ | |
178 | #ifdef CONFIG_CMD_USB | |
179 | #define CONFIG_USB_EHCI | |
180 | #define CONFIG_USB_EHCI_MX5 | |
181 | #define CONFIG_USB_STORAGE | |
182 | #define CONFIG_USB_HOST_ETHER | |
183 | #define CONFIG_USB_ETHER_ASIX | |
a743415f | 184 | #define CONFIG_USB_ETHER_MCS7830 |
0f83b365 MV |
185 | #define CONFIG_USB_ETHER_SMSC95XX |
186 | #define CONFIG_MXC_USB_PORT 1 | |
187 | #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) | |
188 | #define CONFIG_MXC_USB_FLAGS 0 | |
189 | #endif | |
190 | ||
191 | /* | |
192 | * SATA | |
193 | */ | |
194 | #ifdef CONFIG_CMD_SATA | |
195 | #define CONFIG_DWC_AHSATA | |
196 | #define CONFIG_SYS_SATA_MAX_DEVICE 1 | |
197 | #define CONFIG_DWC_AHSATA_PORT_ID 0 | |
198 | #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_BASE_ADDR | |
199 | #define CONFIG_LBA48 | |
200 | #define CONFIG_LIBATA | |
201 | #endif | |
202 | ||
502a710f MV |
203 | /* |
204 | * LCD | |
205 | */ | |
206 | #ifdef CONFIG_VIDEO | |
207 | #define CONFIG_VIDEO_IPUV3 | |
208 | #define CONFIG_CFB_CONSOLE | |
209 | #define CONFIG_VGA_AS_SINGLE_DEVICE | |
210 | #define CONFIG_SYS_CONSOLE_IS_IN_ENV | |
211 | #define CONFIG_VIDEO_BMP_RLE8 | |
62d3c2d6 | 212 | #define CONFIG_VIDEO_BMP_GZIP |
502a710f | 213 | #define CONFIG_SPLASH_SCREEN |
62d3c2d6 MV |
214 | #define CONFIG_SPLASHIMAGE_GUARD |
215 | #define CONFIG_SPLASH_SCREEN_ALIGN | |
502a710f MV |
216 | #define CONFIG_BMP_16BPP |
217 | #define CONFIG_VIDEO_LOGO | |
62d3c2d6 MV |
218 | #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (2 << 20) |
219 | #define CONFIG_IPUV3_CLK 200000000 | |
502a710f MV |
220 | #endif |
221 | ||
0f83b365 MV |
222 | /* |
223 | * Boot Linux | |
224 | */ | |
225 | #define CONFIG_CMDLINE_TAG | |
226 | #define CONFIG_INITRD_TAG | |
227 | #define CONFIG_REVISION_TAG | |
228 | #define CONFIG_SETUP_MEMORY_TAGS | |
229 | #define CONFIG_BOOTDELAY 3 | |
85d8a5fc | 230 | #define CONFIG_BOOTFILE "fitImage" |
0f83b365 MV |
231 | #define CONFIG_BOOTARGS "console=ttymxc1,115200" |
232 | #define CONFIG_LOADADDR 0x70800000 | |
85d8a5fc | 233 | #define CONFIG_BOOTCOMMAND "run mmc_mmc" |
0f83b365 | 234 | #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR |
0f83b365 MV |
235 | |
236 | /* | |
237 | * NAND SPL | |
238 | */ | |
0f83b365 MV |
239 | #define CONFIG_SPL_FRAMEWORK |
240 | #define CONFIG_SPL_TARGET "u-boot-with-nand-spl.imx" | |
241 | #define CONFIG_SPL_BOARD_INIT | |
242 | #define CONFIG_SPL_TEXT_BASE 0x70008000 | |
243 | #define CONFIG_SPL_PAD_TO 0x8000 | |
244 | #define CONFIG_SPL_STACK 0x70004000 | |
245 | #define CONFIG_SPL_GPIO_SUPPORT | |
246 | #define CONFIG_SPL_LIBCOMMON_SUPPORT | |
247 | #define CONFIG_SPL_LIBGENERIC_SUPPORT | |
248 | #define CONFIG_SPL_NAND_SUPPORT | |
249 | #define CONFIG_SPL_SERIAL_SUPPORT | |
250 | ||
251 | #define CONFIG_SYS_NAND_U_BOOT_OFFS CONFIG_SPL_PAD_TO | |
252 | #define CONFIG_SYS_NAND_PAGE_SIZE 2048 | |
253 | #define CONFIG_SYS_NAND_OOBSIZE 64 | |
254 | #define CONFIG_SYS_NAND_PAGE_COUNT 64 | |
255 | #define CONFIG_SYS_NAND_SIZE (256 * 1024 * 1024) | |
256 | #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 | |
257 | ||
85d8a5fc LR |
258 | /* |
259 | * Extra Environments | |
260 | */ | |
261 | #define CONFIG_PREBOOT "run try_bootscript" | |
262 | #define CONFIG_HOSTNAME m53evk | |
263 | ||
264 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
265 | "consdev=ttymxc1\0" \ | |
266 | "baudrate=115200\0" \ | |
267 | "bootscript=boot.scr\0" \ | |
268 | "bootdev=/dev/mmcblk0p1\0" \ | |
269 | "rootdev=/dev/mmcblk0p2\0" \ | |
270 | "netdev=eth0\0" \ | |
271 | "rootpath=/opt/eldk-5.5/armv7a-hf/rootfs-qte-sdk\0" \ | |
272 | "kernel_addr_r=0x72000000\0" \ | |
273 | "addcons=" \ | |
274 | "setenv bootargs ${bootargs} " \ | |
275 | "console=${consdev},${baudrate}\0" \ | |
276 | "addip=" \ | |
277 | "setenv bootargs ${bootargs} " \ | |
278 | "ip=${ipaddr}:${serverip}:${gatewayip}:" \ | |
279 | "${netmask}:${hostname}:${netdev}:off\0" \ | |
280 | "addmisc=" \ | |
281 | "setenv bootargs ${bootargs} ${miscargs}\0" \ | |
282 | "adddfltmtd=" \ | |
283 | "if test \"x${mtdparts}\" == \"x\" ; then " \ | |
284 | "mtdparts default ; " \ | |
285 | "fi\0" \ | |
286 | "addmtd=" \ | |
287 | "run adddfltmtd ; " \ | |
288 | "setenv bootargs ${bootargs} ${mtdparts}\0" \ | |
289 | "addargs=run addcons addmtd addmisc\0" \ | |
290 | "mmcload=" \ | |
291 | "mmc rescan ; " \ | |
febae49a | 292 | "load mmc 0:1 ${kernel_addr_r} ${bootfile}\0" \ |
85d8a5fc LR |
293 | "ubiload=" \ |
294 | "ubi part UBI ; ubifsmount ubi0:rootfs ; " \ | |
295 | "ubifsload ${kernel_addr_r} /boot/${bootfile}\0" \ | |
296 | "netload=" \ | |
297 | "tftp ${kernel_addr_r} ${hostname}/${bootfile}\0" \ | |
298 | "miscargs=nohlt panic=1\0" \ | |
299 | "mmcargs=setenv bootargs root=${rootdev} rw rootwait\0" \ | |
300 | "ubiargs=" \ | |
301 | "setenv bootargs ubi.mtd=5 " \ | |
302 | "root=ubi0:rootfs rootfstype=ubifs\0" \ | |
303 | "nfsargs=" \ | |
304 | "setenv bootargs root=/dev/nfs rw " \ | |
305 | "nfsroot=${serverip}:${rootpath},v3,tcp\0" \ | |
306 | "mmc_mmc=" \ | |
307 | "run mmcload mmcargs addargs ; " \ | |
308 | "bootm ${kernel_addr_r}\0" \ | |
309 | "mmc_ubi=" \ | |
310 | "run mmcload ubiargs addargs ; " \ | |
311 | "bootm ${kernel_addr_r}\0" \ | |
312 | "mmc_nfs=" \ | |
313 | "run mmcload nfsargs addip addargs ; " \ | |
314 | "bootm ${kernel_addr_r}\0" \ | |
315 | "ubi_mmc=" \ | |
316 | "run ubiload mmcargs addargs ; " \ | |
317 | "bootm ${kernel_addr_r}\0" \ | |
318 | "ubi_ubi=" \ | |
319 | "run ubiload ubiargs addargs ; " \ | |
320 | "bootm ${kernel_addr_r}\0" \ | |
321 | "ubi_nfs=" \ | |
322 | "run ubiload nfsargs addip addargs ; " \ | |
323 | "bootm ${kernel_addr_r}\0" \ | |
324 | "net_mmc=" \ | |
325 | "run netload mmcargs addargs ; " \ | |
326 | "bootm ${kernel_addr_r}\0" \ | |
327 | "net_ubi=" \ | |
328 | "run netload ubiargs addargs ; " \ | |
329 | "bootm ${kernel_addr_r}\0" \ | |
330 | "net_nfs=" \ | |
331 | "run netload nfsargs addip addargs ; " \ | |
332 | "bootm ${kernel_addr_r}\0" \ | |
333 | "try_bootscript=" \ | |
334 | "mmc rescan;" \ | |
14b256e5 | 335 | "if test -e mmc 0:1 ${bootscript} ; then " \ |
febae49a | 336 | "if load mmc 0:1 ${kernel_addr_r} ${bootscript};" \ |
252499e6 MV |
337 | "then ; " \ |
338 | "echo Running bootscript... ; " \ | |
339 | "source ${kernel_addr_r} ; " \ | |
14b256e5 | 340 | "fi ; " \ |
85d8a5fc LR |
341 | "fi\0" |
342 | ||
0f83b365 | 343 | #endif /* __M53EVK_CONFIG_H__ */ |