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1/*
2 * Configuation settings for the Hitachi Solution Engine 7722
3 *
4 * Copyright (C) 2007 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
5 *
6 * See file CREDITS for list of people who contributed to this
7 * project.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 * MA 02111-1307 USA
23 */
24
25#ifndef __MS7722SE_H
26#define __MS7722SE_H
27
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28#define CONFIG_SH 1
29#define CONFIG_SH4 1
30#define CONFIG_CPU_SH7722 1
31#define CONFIG_MS7722SE 1
32
33#define CONFIG_CMD_FLASH
34#define CONFIG_CMD_NET
35#define CONFIG_CMD_PING
36#define CONFIG_CMD_DFL
37#define CONFIG_CMD_SDRAM
38#define CONFIG_CMD_ENV
39
40#define CONFIG_BAUDRATE 115200
41#define CONFIG_BOOTDELAY 3
53677ef1 42#define CONFIG_BOOTARGS "console=ttySC0,115200 root=1f01"
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43
44#define CONFIG_VERSION_VARIABLE
45#undef CONFIG_SHOW_BOOT_PROGRESS
46
47/* SMC9111 */
48#define CONFIG_DRIVER_SMC91111
49#define CONFIG_SMC91111_BASE (0xB8000000)
50
51/* MEMORY */
52#define MS7722SE_SDRAM_BASE (0x8C000000)
53#define MS7722SE_FLASH_BASE_1 (0xA0000000)
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54#define MS7722SE_FLASH_BANK_SIZE (8*1024 * 1024)
55
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56#define CONFIG_SYS_LONGHELP /* undef to save memory */
57#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
58#define CONFIG_SYS_CBSIZE 256 /* Buffer size for input from the Console */
59#define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */
60#define CONFIG_SYS_MAXARGS 16 /* max args accepted for monitor commands */
61#define CONFIG_SYS_BARGSIZE 512 /* Buffer size for Boot Arguments passed to kernel */
62#define CONFIG_SYS_BAUDRATE_TABLE { 115200 } /* List of legal baudrate settings for this board */
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63
64/* SCIF */
6c58a030 65#define CONFIG_SCIF_CONSOLE 1
6c0bbdcc 66#define CONFIG_CONS_SCIF0 1
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67#undef CONFIG_SYS_CONSOLE_INFO_QUIET /* Suppress display of console information at boot */
68#undef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
69#undef CONFIG_SYS_CONSOLE_ENV_OVERWRITE
6c0bbdcc 70
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71#define CONFIG_SYS_MEMTEST_START (MS7722SE_SDRAM_BASE)
72#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024))
6c0bbdcc 73
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74#undef CONFIG_SYS_ALT_MEMTEST /* Enable alternate, more extensive, memory test */
75#undef CONFIG_SYS_MEMTEST_SCRATCH /* Scratch address used by the alternate memory test */
6c0bbdcc 76
6d0f6bcf 77#undef CONFIG_SYS_LOADS_BAUD_CHANGE /* Enable temporary baudrate change while serial download */
6c0bbdcc 78
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79#define CONFIG_SYS_SDRAM_BASE (MS7722SE_SDRAM_BASE)
80#define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024) /* maybe more, but if so u-boot doesn't know about it... */
6c0bbdcc 81
6d0f6bcf 82#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 4 * 1024 * 1024) /* default load address for scripts ?!? */
6c0bbdcc 83
6d0f6bcf 84#define CONFIG_SYS_MONITOR_BASE (MS7722SE_FLASH_BASE_1) /* Address of u-boot image
53677ef1 85 in Flash (NOT run time address in SDRAM) ?!? */
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86#define CONFIG_SYS_MONITOR_LEN (128 * 1024) /* */
87#define CONFIG_SYS_MALLOC_LEN (256 * 1024) /* Size of DRAM reserved for malloc() use */
88#define CONFIG_SYS_GBL_DATA_SIZE (256) /* size in bytes reserved for initial data */
89#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
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90
91/* FLASH */
6d0f6bcf 92#define CONFIG_SYS_FLASH_CFI
00b1883a 93#define CONFIG_FLASH_CFI_DRIVER
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94#undef CONFIG_SYS_FLASH_QUIET_TEST
95#define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
6c0bbdcc 96
6d0f6bcf 97#define CONFIG_SYS_FLASH_BASE (MS7722SE_FLASH_BASE_1) /* Physical start address of Flash memory */
6c0bbdcc 98
6d0f6bcf 99#define CONFIG_SYS_MAX_FLASH_SECT 150 /* Max number of sectors on each
53677ef1 100 Flash chip */
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101
102/* if you use all NOR Flash , you change dip-switch. Please see MS7722SE01 Manual. */
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103#define CONFIG_SYS_MAX_FLASH_BANKS 2
104#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE + (0 * MS7722SE_FLASH_BANK_SIZE), \
105 CONFIG_SYS_FLASH_BASE + (1 * MS7722SE_FLASH_BANK_SIZE), \
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106 }
107
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108#define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000) /* Timeout for Flash erase operations (in ms) */
109#define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000) /* Timeout for Flash write operations (in ms) */
110#define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000) /* Timeout for Flash set sector lock bit operations (in ms) */
111#define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000) /* Timeout for Flash clear lock bit operations (in ms) */
6c0bbdcc 112
6d0f6bcf 113#undef CONFIG_SYS_FLASH_PROTECTION /* Use hardware flash sectors protection instead of U-Boot software protection */
6c0bbdcc 114
6d0f6bcf 115#undef CONFIG_SYS_DIRECT_FLASH_TFTP
6c0bbdcc 116
5a1aceb0 117#define CONFIG_ENV_IS_IN_FLASH
6c0bbdcc 118#define CONFIG_ENV_OVERWRITE 1
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119#define CONFIG_ENV_SECT_SIZE (8 * 1024)
120#define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE)
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121#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + (1 * CONFIG_ENV_SECT_SIZE))
122#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE) /* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */
0e8d1586 123#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE)
6d0f6bcf 124#define CONFIG_ENV_ADDR_REDUND (CONFIG_SYS_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE))
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125
126/* Board Clock */
127#define CONFIG_SYS_CLK_FREQ 33333333
61fb15c5 128#define TMU_CLK_DIVIDER (4) /* 4 (default), 16, 64, 256 or 1024 */
6d0f6bcf 129#define CONFIG_SYS_HZ (CONFIG_SYS_CLK_FREQ / TMU_CLK_DIVIDER)
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130
131#endif /* __MS7722SE_H */