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29f75a5c FE |
1 | /* |
2 | * (C) Copyright 2011 Freescale Semiconductor, Inc. | |
3 | * Author: Fabio Estevam <fabio.estevam@freescale.com> | |
4 | * | |
5 | * Based on m28evk.h: | |
6 | * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com> | |
7 | * on behalf of DENX Software Engineering GmbH | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or | |
10 | * modify it under the terms of the GNU General Public License as | |
11 | * published by the Free Software Foundation; either version 2 of | |
12 | * the License, or (at your option) any later version. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | */ | |
606de8b6 OS |
19 | #ifndef __MX28EVK_CONFIG_H__ |
20 | #define __MX28EVK_CONFIG_H__ | |
29f75a5c | 21 | |
40f1daa0 | 22 | /* SoC configurations */ |
29f75a5c | 23 | #define CONFIG_MX28 /* i.MX28 SoC */ |
e229d445 | 24 | |
29f75a5c FE |
25 | #define CONFIG_MXS_GPIO /* GPIO control */ |
26 | #define CONFIG_SYS_HZ 1000 /* Ticks per second */ | |
27 | ||
28 | #define CONFIG_MACH_TYPE MACH_TYPE_MX28EVK | |
29 | ||
e229d445 OS |
30 | #include <asm/arch/regs-base.h> |
31 | ||
29f75a5c | 32 | #define CONFIG_SYS_NO_FLASH |
29f75a5c | 33 | #define CONFIG_BOARD_EARLY_INIT_F |
29f75a5c FE |
34 | #define CONFIG_ARCH_MISC_INIT |
35 | ||
40f1daa0 | 36 | /* SPL */ |
29f75a5c FE |
37 | #define CONFIG_SPL |
38 | #define CONFIG_SPL_NO_CPU_SUPPORT_CODE | |
3a0398d7 OS |
39 | #define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/mxs" |
40 | #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" | |
29f75a5c FE |
41 | #define CONFIG_SPL_LIBCOMMON_SUPPORT |
42 | #define CONFIG_SPL_LIBGENERIC_SUPPORT | |
f8c4a86b | 43 | #define CONFIG_SPL_GPIO_SUPPORT |
29f75a5c | 44 | |
40f1daa0 | 45 | /* U-Boot Commands */ |
29f75a5c FE |
46 | #include <config_cmd_default.h> |
47 | #define CONFIG_DISPLAY_CPUINFO | |
48 | #define CONFIG_DOS_PARTITION | |
29f75a5c FE |
49 | |
50 | #define CONFIG_CMD_CACHE | |
9588d942 | 51 | #define CONFIG_CMD_DATE |
29f75a5c | 52 | #define CONFIG_CMD_DHCP |
3b4efee9 | 53 | #define CONFIG_CMD_FAT |
29f75a5c FE |
54 | #define CONFIG_CMD_GPIO |
55 | #define CONFIG_CMD_MII | |
56 | #define CONFIG_CMD_MMC | |
57 | #define CONFIG_CMD_NET | |
58 | #define CONFIG_CMD_NFS | |
59 | #define CONFIG_CMD_PING | |
7577a4b3 | 60 | #define CONFIG_CMD_SETEXPR |
ed97abed MF |
61 | #define CONFIG_CMD_SF |
62 | #define CONFIG_CMD_SPI | |
598aa2bb | 63 | #define CONFIG_CMD_USB |
34990e12 | 64 | #define CONFIG_CMD_BOOTZ |
ab461be6 | 65 | #define CONFIG_CMD_NAND |
8b360c06 | 66 | #define CONFIG_CMD_NAND_TRIMFFS |
68661db2 | 67 | #define CONFIG_VIDEO |
29f75a5c | 68 | |
40f1daa0 | 69 | /* Memory configurations */ |
29f75a5c FE |
70 | #define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */ |
71 | #define PHYS_SDRAM_1 0x40000000 /* Base address */ | |
72 | #define PHYS_SDRAM_1_SIZE 0x40000000 /* Max 1 GB RAM */ | |
29f75a5c FE |
73 | #define CONFIG_SYS_MALLOC_LEN 0x00400000 /* 4 MB for malloc */ |
74 | #define CONFIG_SYS_MEMTEST_START 0x40000000 /* Memtest start adr */ | |
75 | #define CONFIG_SYS_MEMTEST_END 0x40400000 /* 4 MB RAM test */ | |
76 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 | |
77 | /* Point initial SP in SRAM so SPL can use it too. */ | |
78 | ||
9ed5dfa8 | 79 | #define CONFIG_SYS_INIT_RAM_ADDR 0x00000000 |
29f75a5c FE |
80 | #define CONFIG_SYS_INIT_RAM_SIZE (128 * 1024) |
81 | ||
82 | #define CONFIG_SYS_INIT_SP_OFFSET \ | |
83 | (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) | |
84 | #define CONFIG_SYS_INIT_SP_ADDR \ | |
85 | (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) | |
86 | ||
87 | /* | |
88 | * We need to sacrifice first 4 bytes of RAM here to avoid triggering some | |
89 | * strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot | |
90 | * binary. In case there was more of this mess, 0x100 bytes are skipped. | |
91 | */ | |
92 | #define CONFIG_SYS_TEXT_BASE 0x40000100 | |
93 | ||
94 | #define CONFIG_ENV_OVERWRITE | |
40f1daa0 | 95 | /* U-Boot general configurations */ |
29f75a5c FE |
96 | #define CONFIG_SYS_LONGHELP |
97 | #define CONFIG_SYS_PROMPT "MX28EVK U-Boot > " | |
98 | #define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */ | |
99 | #define CONFIG_SYS_PBSIZE \ | |
100 | (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) | |
101 | /* Print buffer size */ | |
102 | #define CONFIG_SYS_MAXARGS 32 /* Max number of command args */ | |
103 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE | |
104 | /* Boot argument buffer size */ | |
105 | #define CONFIG_VERSION_VARIABLE /* U-BOOT version */ | |
106 | #define CONFIG_AUTO_COMPLETE /* Command auto complete */ | |
107 | #define CONFIG_CMDLINE_EDITING /* Command history etc */ | |
108 | #define CONFIG_SYS_HUSH_PARSER | |
29f75a5c | 109 | |
40f1daa0 | 110 | /* Serial Driver */ |
29f75a5c FE |
111 | #define CONFIG_PL011_SERIAL |
112 | #define CONFIG_PL011_CLOCK 24000000 | |
113 | #define CONFIG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE } | |
114 | #define CONFIG_CONS_INDEX 0 | |
115 | #define CONFIG_BAUDRATE 115200 /* Default baud rate */ | |
29f75a5c | 116 | |
40f1daa0 | 117 | /* DMA */ |
1102d8d7 AG |
118 | #define CONFIG_APBH_DMA |
119 | ||
40f1daa0 | 120 | /* MMC Driver */ |
ed97abed MF |
121 | #ifdef CONFIG_ENV_IS_IN_MMC |
122 | #define CONFIG_ENV_OFFSET (256 * 1024) | |
123 | #define CONFIG_ENV_SIZE (16 * 1024) | |
124 | #define CONFIG_SYS_MMC_ENV_DEV 0 | |
125 | #endif | |
29f75a5c FE |
126 | #define CONFIG_CMD_SAVEENV |
127 | #ifdef CONFIG_CMD_MMC | |
128 | #define CONFIG_MMC | |
129 | #define CONFIG_GENERIC_MMC | |
6dc71c8d | 130 | #define CONFIG_BOUNCE_BUFFER |
29f75a5c FE |
131 | #define CONFIG_MXS_MMC |
132 | #endif | |
133 | ||
40f1daa0 | 134 | /* NAND Driver */ |
ab461be6 | 135 | #define CONFIG_ENV_SIZE (16 * 1024) |
ecb7be29 LH |
136 | #ifdef CONFIG_CMD_NAND |
137 | #define CONFIG_NAND_MXS | |
138 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 | |
139 | #define CONFIG_SYS_NAND_BASE 0x60000000 | |
140 | #define CONFIG_SYS_NAND_5_ADDR_CYCLE | |
ab461be6 FE |
141 | |
142 | /* Environment is in NAND */ | |
da85c9c8 | 143 | #ifdef CONFIG_ENV_IS_IN_NAND |
ab461be6 FE |
144 | #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE |
145 | #define CONFIG_ENV_SECT_SIZE (128 * 1024) | |
146 | #define CONFIG_ENV_RANGE (512 * 1024) | |
ab461be6 | 147 | #define CONFIG_ENV_OFFSET 0x300000 |
ab461be6 FE |
148 | #define CONFIG_ENV_OFFSET_REDUND \ |
149 | (CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE) | |
da85c9c8 | 150 | #endif |
ab461be6 FE |
151 | |
152 | #define CONFIG_CMD_UBI | |
153 | #define CONFIG_CMD_UBIFS | |
154 | #define CONFIG_CMD_MTDPARTS | |
155 | #define CONFIG_RBTREE | |
156 | #define CONFIG_LZO | |
157 | #define CONFIG_MTD_DEVICE | |
158 | #define CONFIG_MTD_PARTITIONS | |
159 | #define MTDIDS_DEFAULT "nand0=gpmi-nand" | |
160 | #define MTDPARTS_DEFAULT \ | |
161 | "mtdparts=gpmi-nand:" \ | |
162 | "3m(bootloader)ro," \ | |
163 | "512k(environment)," \ | |
164 | "512k(redundant-environment)," \ | |
165 | "4m(kernel)," \ | |
166 | "128k(fdt)," \ | |
167 | "8m(ramdisk)," \ | |
168 | "-(filesystem)" | |
ecb7be29 LH |
169 | #endif |
170 | ||
40f1daa0 | 171 | /* Ethernet on SOC (FEC) */ |
29f75a5c FE |
172 | #ifdef CONFIG_CMD_NET |
173 | #define CONFIG_NET_MULTI | |
174 | #define CONFIG_ETHPRIME "FEC0" | |
175 | #define CONFIG_FEC_MXC | |
29f75a5c | 176 | #define CONFIG_MII |
29f75a5c FE |
177 | #define CONFIG_FEC_XCV_TYPE RMII |
178 | #define CONFIG_MX28_FEC_MAC_IN_OCOTP | |
179 | #endif | |
180 | ||
40f1daa0 | 181 | /* RTC */ |
9588d942 MF |
182 | #ifdef CONFIG_CMD_DATE |
183 | #define CONFIG_RTC_MXS | |
184 | #endif | |
185 | ||
40f1daa0 | 186 | /* USB */ |
598aa2bb MF |
187 | #ifdef CONFIG_CMD_USB |
188 | #define CONFIG_USB_EHCI | |
189 | #define CONFIG_USB_EHCI_MXS | |
afa87210 MV |
190 | #define CONFIG_EHCI_MXS_PORT1 |
191 | #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 | |
598aa2bb MF |
192 | #define CONFIG_EHCI_IS_TDI |
193 | #define CONFIG_USB_STORAGE | |
91dd7ca6 FE |
194 | #define CONFIG_USB_HOST_ETHER |
195 | #define CONFIG_USB_ETHER_ASIX | |
196 | #define CONFIG_USB_ETHER_SMSC95XX | |
598aa2bb MF |
197 | #endif |
198 | ||
175a7d27 FE |
199 | /* I2C */ |
200 | #ifdef CONFIG_CMD_I2C | |
201 | #define CONFIG_I2C_MXS | |
202 | #define CONFIG_HARD_I2C | |
203 | #define CONFIG_SYS_I2C_SPEED 400000 | |
204 | #endif | |
205 | ||
40f1daa0 | 206 | /* SPI */ |
ed97abed MF |
207 | #ifdef CONFIG_CMD_SPI |
208 | #define CONFIG_HARD_SPI | |
209 | #define CONFIG_MXS_SPI | |
210 | #define CONFIG_SPI_HALF_DUPLEX | |
211 | #define CONFIG_DEFAULT_SPI_BUS 2 | |
212 | #define CONFIG_DEFAULT_SPI_MODE SPI_MODE_0 | |
213 | ||
214 | /* SPI Flash */ | |
215 | #ifdef CONFIG_CMD_SF | |
216 | #define CONFIG_SPI_FLASH | |
1fc3bbd1 FE |
217 | #define CONFIG_SF_DEFAULT_BUS 2 |
218 | #define CONFIG_SF_DEFAULT_CS 0 | |
ed97abed MF |
219 | /* this may vary and depends on the installed chip */ |
220 | #define CONFIG_SPI_FLASH_SST | |
221 | #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 | |
222 | #define CONFIG_SF_DEFAULT_SPEED 24000000 | |
223 | ||
224 | /* (redundant) environemnt in SPI flash */ | |
ed97abed MF |
225 | #ifdef CONFIG_ENV_IS_IN_SPI_FLASH |
226 | #define CONFIG_SYS_REDUNDAND_ENVIRONMENT | |
227 | #define CONFIG_ENV_SIZE 0x1000 /* 4KB */ | |
228 | #define CONFIG_ENV_OFFSET 0x40000 /* 256K */ | |
229 | #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) | |
230 | #define CONFIG_ENV_SECT_SIZE 0x1000 | |
231 | #define CONFIG_ENV_SPI_CS 0 | |
232 | #define CONFIG_ENV_SPI_BUS 2 | |
233 | #define CONFIG_ENV_SPI_MAX_HZ 24000000 | |
234 | #define CONFIG_ENV_SPI_MODE SPI_MODE_0 | |
235 | #endif | |
236 | #endif | |
237 | #endif | |
238 | ||
68661db2 FE |
239 | /* Framebuffer support */ |
240 | #ifdef CONFIG_VIDEO | |
241 | #define CONFIG_CFB_CONSOLE | |
242 | #define CONFIG_VIDEO_MXS | |
243 | #define CONFIG_VIDEO_LOGO | |
244 | #define CONFIG_VIDEO_SW_CURSOR | |
245 | #define CONFIG_VGA_AS_SINGLE_DEVICE | |
246 | #define CONFIG_SYS_CONSOLE_IS_IN_ENV | |
247 | #define CONFIG_SPLASH_SCREEN | |
248 | #define CONFIG_CMD_BMP | |
249 | #define CONFIG_BMP_16BPP | |
250 | #define CONFIG_VIDEO_BMP_RLE8 | |
251 | #define CONFIG_VIDEO_BMP_GZIP | |
252 | #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (512 << 10) | |
253 | #endif | |
254 | ||
40f1daa0 | 255 | /* Boot Linux */ |
29f75a5c FE |
256 | #define CONFIG_CMDLINE_TAG |
257 | #define CONFIG_SETUP_MEMORY_TAGS | |
27856943 | 258 | #define CONFIG_BOOTDELAY 1 |
29f75a5c | 259 | #define CONFIG_BOOTFILE "uImage" |
29f75a5c FE |
260 | #define CONFIG_LOADADDR 0x42000000 |
261 | #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR | |
e310016b | 262 | #define CONFIG_OF_LIBFDT |
29f75a5c | 263 | |
40f1daa0 | 264 | /* Extra Environments */ |
29f75a5c | 265 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
f994dc5e OS |
266 | "update_nand_full_filename=u-boot.nand\0" \ |
267 | "update_nand_firmware_filename=u-boot.sb\0" \ | |
268 | "update_sd_firmware_filename=u-boot.sd\0" \ | |
269 | "update_nand_firmware_maxsz=0x100000\0" \ | |
270 | "update_nand_stride=0x40\0" /* MX28 datasheet ch. 12.12 */ \ | |
271 | "update_nand_count=0x4\0" /* MX28 datasheet ch. 12.12 */ \ | |
272 | "update_nand_get_fcb_size=" /* Get size of FCB blocks */ \ | |
273 | "nand device 0 ; " \ | |
274 | "nand info ; " \ | |
275 | "setexpr fcb_sz ${update_nand_stride} * ${update_nand_count};" \ | |
276 | "setexpr update_nand_fcb ${fcb_sz} * ${nand_writesize}\0" \ | |
277 | "update_nand_full=" /* Update FCB, DBBT and FW */ \ | |
278 | "if tftp ${update_nand_full_filename} ; then " \ | |
279 | "run update_nand_get_fcb_size ; " \ | |
280 | "nand scrub -y 0x0 ${filesize} ; " \ | |
71779d5b | 281 | "nand write.raw ${loadaddr} 0x0 ${fcb_sz} ; " \ |
f994dc5e OS |
282 | "setexpr update_off ${loadaddr} + ${update_nand_fcb} ; " \ |
283 | "setexpr update_sz ${filesize} - ${update_nand_fcb} ; " \ | |
284 | "nand write ${update_off} ${update_nand_fcb} ${update_sz} ; " \ | |
285 | "fi\0" \ | |
286 | "update_nand_firmware=" /* Update only firmware */ \ | |
287 | "if tftp ${update_nand_firmware_filename} ; then " \ | |
288 | "run update_nand_get_fcb_size ; " \ | |
289 | "setexpr fcb_sz ${update_nand_fcb} * 2 ; " /* FCB + DBBT */ \ | |
290 | "setexpr fw_sz ${update_nand_firmware_maxsz} * 2 ; " \ | |
291 | "setexpr fw_off ${fcb_sz} + ${update_nand_firmware_maxsz};" \ | |
292 | "nand erase ${fcb_sz} ${fw_sz} ; " \ | |
293 | "nand write ${loadaddr} ${fcb_sz} ${filesize} ; " \ | |
294 | "nand write ${loadaddr} ${fw_off} ${filesize} ; " \ | |
295 | "fi\0" \ | |
296 | "update_sd_firmware=" /* Update the SD firmware partition */ \ | |
297 | "if mmc rescan ; then " \ | |
298 | "if tftp ${update_sd_firmware_filename} ; then " \ | |
299 | "setexpr fw_sz ${filesize} / 0x200 ; " /* SD block size */ \ | |
300 | "setexpr fw_sz ${fw_sz} + 1 ; " \ | |
301 | "mmc write ${loadaddr} 0x800 ${fw_sz} ; " \ | |
302 | "fi ; " \ | |
303 | "fi\0" \ | |
304 | "script=boot.scr\0" \ | |
305 | "uimage=uImage\0" \ | |
306 | "console_fsl=ttyAM0\0" \ | |
307 | "console_mainline=ttyAMA0\0" \ | |
4c6b2350 OS |
308 | "fdt_file=imx28-evk.dtb\0" \ |
309 | "fdt_addr=0x41000000\0" \ | |
310 | "boot_fdt=try\0" \ | |
311 | "ip_dyn=yes\0" \ | |
f994dc5e OS |
312 | "mmcdev=0\0" \ |
313 | "mmcpart=2\0" \ | |
3c41e901 | 314 | "mmcroot=/dev/mmcblk0p3 rw rootwait\0" \ |
f994dc5e | 315 | "mmcargs=setenv bootargs console=${console_mainline},${baudrate} " \ |
3c41e901 | 316 | "root=${mmcroot}\0" \ |
f994dc5e OS |
317 | "loadbootscript=" \ |
318 | "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ | |
319 | "bootscript=echo Running bootscript from mmc ...; " \ | |
320 | "source\0" \ | |
321 | "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \ | |
4c6b2350 | 322 | "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ |
f994dc5e | 323 | "mmcboot=echo Booting from mmc ...; " \ |
4c6b2350 OS |
324 | "run mmcargs; " \ |
325 | "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ | |
326 | "if run loadfdt; then " \ | |
327 | "bootm ${loadaddr} - ${fdt_addr}; " \ | |
328 | "else " \ | |
329 | "if test ${boot_fdt} = try; then " \ | |
330 | "bootm; " \ | |
331 | "else " \ | |
332 | "echo WARN: Cannot load the DT; " \ | |
333 | "fi; " \ | |
334 | "fi; " \ | |
335 | "else " \ | |
336 | "bootm; " \ | |
337 | "fi;\0" \ | |
f994dc5e | 338 | "netargs=setenv bootargs console=${console_mainline},${baudrate} " \ |
29f75a5c | 339 | "root=/dev/nfs " \ |
f994dc5e OS |
340 | "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ |
341 | "netboot=echo Booting from net ...; " \ | |
342 | "run netargs; " \ | |
4c6b2350 OS |
343 | "if test ${ip_dyn} = yes; then " \ |
344 | "setenv get_cmd dhcp; " \ | |
345 | "else " \ | |
346 | "setenv get_cmd tftp; " \ | |
347 | "fi; " \ | |
348 | "${get_cmd} ${uimage}; " \ | |
349 | "if test ${boot_fdt} = yes; then " \ | |
350 | "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ | |
351 | "bootm ${loadaddr} - ${fdt_addr}; " \ | |
352 | "else " \ | |
353 | "if test ${boot_fdt} = try; then " \ | |
354 | "bootm; " \ | |
355 | "else " \ | |
356 | "echo WARN: Cannot load the DT; " \ | |
357 | "fi;" \ | |
358 | "fi; " \ | |
359 | "else " \ | |
360 | "bootm; " \ | |
361 | "fi;\0" | |
f994dc5e OS |
362 | |
363 | #define CONFIG_BOOTCOMMAND \ | |
66968110 | 364 | "mmc dev ${mmcdev}; if mmc rescan; then " \ |
f994dc5e OS |
365 | "if run loadbootscript; then " \ |
366 | "run bootscript; " \ | |
367 | "else " \ | |
368 | "if run loaduimage; then " \ | |
369 | "run mmcboot; " \ | |
370 | "else run netboot; " \ | |
371 | "fi; " \ | |
372 | "fi; " \ | |
373 | "else run netboot; fi" | |
29f75a5c | 374 | |
606de8b6 | 375 | #endif /* __MX28EVK_CONFIG_H__ */ |