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eae4988b SB |
1 | /* |
2 | * (C) Copyright 2010, Stefano Babic <sbabic@denx.de> | |
3 | * | |
4 | * (C) Copyright 2008-2010 Freescale Semiconductor, Inc. | |
5 | * | |
6 | * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de> | |
7 | * | |
8 | * Configuration for the MX35pdk Freescale board. | |
9 | * | |
3765b3e7 | 10 | * SPDX-License-Identifier: GPL-2.0+ |
eae4988b SB |
11 | */ |
12 | ||
13 | #ifndef __CONFIG_H | |
14 | #define __CONFIG_H | |
15 | ||
16 | #include <asm/arch/imx-regs.h> | |
17 | ||
18 | /* High Level Configuration Options */ | |
19 | #define CONFIG_ARM1136 /* This is an arm1136 CPU core */ | |
20 | #define CONFIG_MX35 | |
eae4988b SB |
21 | |
22 | #define CONFIG_DISPLAY_CPUINFO | |
eae4988b SB |
23 | |
24 | /* Set TEXT at the beginning of the NOR flash */ | |
25 | #define CONFIG_SYS_TEXT_BASE 0xA0000000 | |
26 | ||
eae4988b | 27 | #define CONFIG_BOARD_EARLY_INIT_F |
9660e442 | 28 | #define CONFIG_BOARD_LATE_INIT |
eae4988b SB |
29 | |
30 | #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ | |
31 | #define CONFIG_REVISION_TAG | |
32 | #define CONFIG_SETUP_MEMORY_TAGS | |
33 | #define CONFIG_INITRD_TAG | |
34 | ||
35 | /* | |
36 | * Size of malloc() pool | |
37 | */ | |
38 | #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024) | |
39 | ||
40 | /* | |
41 | * Hardware drivers | |
42 | */ | |
b089d039 | 43 | #define CONFIG_SYS_I2C |
44 | #define CONFIG_SYS_I2C_MXC | |
45 | #define CONFIG_SYS_SPD_BUS_NUM 0 /* I2C1 */ | |
eae4988b | 46 | #define CONFIG_MXC_SPI |
a4adedd4 | 47 | #define CONFIG_MXC_GPIO |
eae4988b SB |
48 | |
49 | ||
50 | /* | |
51 | * PMIC Configs | |
52 | */ | |
be3b51aa ŁM |
53 | #define CONFIG_POWER |
54 | #define CONFIG_POWER_I2C | |
55 | #define CONFIG_POWER_FSL | |
4cfc6c4f | 56 | #define CONFIG_PMIC_FSL_MC13892 |
eae4988b | 57 | #define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x08 |
d28d6a96 | 58 | #define CONFIG_RTC_MC13XXX |
eae4988b SB |
59 | |
60 | /* | |
61 | * MFD MC9SDZ60 | |
62 | */ | |
63 | #define CONFIG_FSL_MC9SDZ60 | |
64 | #define CONFIG_SYS_FSL_MC9SDZ60_I2C_ADDR 0x69 | |
65 | ||
66 | /* | |
67 | * UART (console) | |
68 | */ | |
69 | #define CONFIG_MXC_UART | |
40f6fffe | 70 | #define CONFIG_MXC_UART_BASE UART1_BASE |
eae4988b SB |
71 | |
72 | /* allow to overwrite serial and ethaddr */ | |
73 | #define CONFIG_ENV_OVERWRITE | |
74 | #define CONFIG_CONS_INDEX 1 | |
75 | #define CONFIG_BAUDRATE 115200 | |
eae4988b SB |
76 | |
77 | /* | |
78 | * Command definition | |
79 | */ | |
80 | ||
81 | #include <config_cmd_default.h> | |
82 | ||
8dd15b43 | 83 | #define CONFIG_OF_LIBFDT |
ee303c96 | 84 | #define CONFIG_CMD_BOOTZ |
eae4988b SB |
85 | #define CONFIG_CMD_PING |
86 | #define CONFIG_CMD_DHCP | |
87 | #define CONFIG_BOOTP_SUBNETMASK | |
88 | #define CONFIG_BOOTP_GATEWAY | |
89 | #define CONFIG_BOOTP_DNS | |
90 | ||
91 | #define CONFIG_CMD_NAND | |
0792a36e | 92 | #define CONFIG_CMD_CACHE |
eae4988b SB |
93 | |
94 | #define CONFIG_CMD_I2C | |
95 | #define CONFIG_CMD_SPI | |
96 | #define CONFIG_CMD_MII | |
97 | #define CONFIG_CMD_NET | |
98 | #define CONFIG_NET_RETRY_COUNT 100 | |
d28d6a96 | 99 | #define CONFIG_CMD_DATE |
eae4988b | 100 | |
961a7628 BT |
101 | #define CONFIG_CMD_USB |
102 | #define CONFIG_USB_STORAGE | |
3292539e SB |
103 | #define CONFIG_CMD_MMC |
104 | #define CONFIG_DOS_PARTITION | |
105 | #define CONFIG_EFI_PARTITION | |
106 | #define CONFIG_CMD_EXT2 | |
107 | #define CONFIG_CMD_FAT | |
108 | ||
ec7503bb | 109 | #define CONFIG_BOOTDELAY 1 |
eae4988b SB |
110 | |
111 | #define CONFIG_LOADADDR 0x80800000 /* loadaddr env var */ | |
112 | ||
113 | /* | |
114 | * Ethernet on the debug board (SMC911) | |
115 | */ | |
116 | #define CONFIG_SMC911X | |
117 | #define CONFIG_SMC911X_16_BIT 1 | |
118 | #define CONFIG_SMC911X_BASE CS5_BASE_ADDR | |
119 | ||
120 | #define CONFIG_HAS_ETH1 | |
eae4988b SB |
121 | #define CONFIG_ETHPRIME |
122 | ||
123 | /* | |
124 | * Ethernet on SOC (FEC) | |
125 | */ | |
126 | #define CONFIG_FEC_MXC | |
127 | #define IMX_FEC_BASE FEC_BASE_ADDR | |
128 | #define CONFIG_FEC_MXC_PHYADDR 0x1F | |
129 | ||
130 | #define CONFIG_MII | |
eae4988b SB |
131 | |
132 | #define CONFIG_ARP_TIMEOUT 200UL | |
133 | ||
134 | /* | |
135 | * Miscellaneous configurable options | |
136 | */ | |
137 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ | |
138 | #define CONFIG_SYS_PROMPT "MX35 U-Boot > " | |
139 | #define CONFIG_CMDLINE_EDITING | |
140 | #define CONFIG_SYS_HUSH_PARSER /* Use the HUSH parser */ | |
eae4988b SB |
141 | |
142 | #define CONFIG_AUTO_COMPLETE | |
143 | #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ | |
144 | /* Print Buffer Size */ | |
145 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) | |
146 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ | |
147 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ | |
148 | ||
149 | #define CONFIG_SYS_MEMTEST_START 0 /* memtest works on */ | |
150 | #define CONFIG_SYS_MEMTEST_END 0x10000 | |
151 | ||
152 | #undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ | |
153 | ||
154 | #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR | |
155 | ||
eae4988b SB |
156 | /* |
157 | * Physical Memory Map | |
158 | */ | |
6b5acfc1 | 159 | #define CONFIG_NR_DRAM_BANKS 2 |
eae4988b SB |
160 | #define PHYS_SDRAM_1 CSD0_BASE_ADDR |
161 | #define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024) | |
6b5acfc1 SB |
162 | #define PHYS_SDRAM_2 CSD1_BASE_ADDR |
163 | #define PHYS_SDRAM_2_SIZE (128 * 1024 * 1024) | |
eae4988b SB |
164 | |
165 | #define CONFIG_SYS_SDRAM_BASE CSD0_BASE_ADDR | |
166 | #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR + 0x10000) | |
167 | #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE / 2) | |
168 | #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ | |
169 | GENERATED_GBL_DATA_SIZE) | |
170 | #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ | |
171 | CONFIG_SYS_GBL_DATA_OFFSET) | |
172 | ||
173 | /* | |
174 | * MTD Command for mtdparts | |
175 | */ | |
176 | #define CONFIG_CMD_MTDPARTS | |
177 | #define CONFIG_MTD_DEVICE | |
178 | #define CONFIG_FLASH_CFI_MTD | |
179 | #define CONFIG_MTD_PARTITIONS | |
180 | #define MTDIDS_DEFAULT "nand0=mxc_nand,nor0=physmap-flash.0" | |
181 | #define MTDPARTS_DEFAULT "mtdparts=mxc_nand:1m(boot),5m(linux)," \ | |
182 | "96m(root),8m(cfg),1938m(user);" \ | |
183 | "physmap-flash.0:512k(b),4m(k),30m(u),28m(r)" | |
184 | ||
185 | /* | |
186 | * FLASH and environment organization | |
187 | */ | |
188 | #define CONFIG_SYS_FLASH_BASE CS0_BASE_ADDR | |
189 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ | |
190 | #define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */ | |
191 | /* Monitor at beginning of flash */ | |
192 | #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE | |
193 | #define CONFIG_SYS_MONITOR_LEN (512 * 1024) | |
194 | ||
195 | #define CONFIG_ENV_SECT_SIZE (128 * 1024) | |
196 | #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE | |
197 | ||
198 | /* Address and size of Redundant Environment Sector */ | |
199 | #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) | |
200 | #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE | |
201 | ||
202 | #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + \ | |
203 | CONFIG_SYS_MONITOR_LEN) | |
204 | ||
205 | #define CONFIG_ENV_IS_IN_FLASH | |
206 | ||
207 | #if defined(CONFIG_FSL_ENV_IN_NAND) | |
208 | #define CONFIG_ENV_IS_IN_NAND | |
209 | #define CONFIG_ENV_OFFSET (1024 * 1024) | |
210 | #endif | |
211 | ||
212 | /* | |
213 | * CFI FLASH driver setup | |
214 | */ | |
215 | #define CONFIG_SYS_FLASH_CFI /* Flash memory is CFI compliant */ | |
216 | #define CONFIG_FLASH_CFI_DRIVER | |
217 | ||
218 | /* A non-standard buffered write algorithm */ | |
219 | #define CONFIG_FLASH_SPANSION_S29WS_N | |
220 | #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* faster */ | |
221 | #define CONFIG_SYS_FLASH_PROTECTION /* Use hardware sector protection */ | |
222 | ||
223 | /* | |
224 | * NAND FLASH driver setup | |
225 | */ | |
226 | #define CONFIG_NAND_MXC | |
eae4988b SB |
227 | #define CONFIG_MXC_NAND_REGS_BASE (NFC_BASE_ADDR) |
228 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 | |
229 | #define CONFIG_SYS_NAND_BASE (NFC_BASE_ADDR) | |
230 | #define CONFIG_MXC_NAND_HWECC | |
231 | #define CONFIG_SYS_NAND_LARGEPAGE | |
232 | ||
961a7628 BT |
233 | /* EHCI driver */ |
234 | #define CONFIG_USB_EHCI | |
235 | #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1 | |
236 | #define CONFIG_EHCI_IS_TDI | |
237 | #define CONFIG_EHCI_HCD_INIT_AFTER_RESET | |
238 | #define CONFIG_USB_EHCI_MXC | |
239 | #define CONFIG_MXC_USB_PORT 0 | |
240 | #define CONFIG_MXC_USB_FLAGS (MXC_EHCI_INTERFACE_DIFF_UNI | \ | |
241 | MXC_EHCI_POWER_PINS_ENABLED | \ | |
242 | MXC_EHCI_OC_PIN_ACTIVE_LOW) | |
243 | #define CONFIG_MXC_USB_PORTSC (MXC_EHCI_UTMI_16BIT | MXC_EHCI_MODE_UTMI) | |
244 | ||
3292539e SB |
245 | /* mmc driver */ |
246 | #define CONFIG_MMC | |
247 | #define CONFIG_GENERIC_MMC | |
248 | #define CONFIG_FSL_ESDHC | |
249 | #define CONFIG_SYS_FSL_ESDHC_ADDR 0 | |
250 | #define CONFIG_SYS_FSL_ESDHC_NUM 1 | |
251 | ||
eae4988b SB |
252 | /* |
253 | * Default environment and default scripts | |
254 | * to update uboot and load kernel | |
255 | */ | |
eae4988b SB |
256 | |
257 | #define CONFIG_HOSTNAME "mx35pdk" | |
258 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
259 | "netdev=eth1\0" \ | |
260 | "ethprime=smc911x\0" \ | |
261 | "nfsargs=setenv bootargs root=/dev/nfs rw " \ | |
262 | "nfsroot=${serverip}:${rootpath}\0" \ | |
263 | "ramargs=setenv bootargs root=/dev/ram rw\0" \ | |
264 | "addip_sta=setenv bootargs ${bootargs} " \ | |
265 | "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ | |
266 | ":${hostname}:${netdev}:off panic=1\0" \ | |
267 | "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \ | |
268 | "addip=if test -n ${ipdyn};then run addip_dyn;" \ | |
93ea89f0 | 269 | "else run addip_sta;fi\0" \ |
eae4988b SB |
270 | "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \ |
271 | "addtty=setenv bootargs ${bootargs}" \ | |
272 | " console=ttymxc0,${baudrate}\0" \ | |
273 | "addmisc=setenv bootargs ${bootargs} ${misc}\0" \ | |
274 | "loadaddr=80800000\0" \ | |
275 | "kernel_addr_r=80800000\0" \ | |
93ea89f0 MV |
276 | "hostname=" __stringify(CONFIG_HOSTNAME) "\0" \ |
277 | "bootfile=" __stringify(CONFIG_HOSTNAME) "/uImage\0" \ | |
278 | "ramdisk_file=" __stringify(CONFIG_HOSTNAME) "/uRamdisk\0" \ | |
eae4988b SB |
279 | "flash_self=run ramargs addip addtty addmtd addmisc;" \ |
280 | "bootm ${kernel_addr} ${ramdisk_addr}\0" \ | |
281 | "flash_nfs=run nfsargs addip addtty addmtd addmisc;" \ | |
282 | "bootm ${kernel_addr}\0" \ | |
283 | "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \ | |
284 | "run nfsargs addip addtty addmtd addmisc;" \ | |
285 | "bootm ${kernel_addr_r}\0" \ | |
286 | "net_self_load=tftp ${kernel_addr_r} ${bootfile};" \ | |
287 | "tftp ${ramdisk_addr_r} ${ramdisk_file};\0" \ | |
93ea89f0 | 288 | "u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.bin\0" \ |
eae4988b | 289 | "load=tftp ${loadaddr} ${u-boot}\0" \ |
93ea89f0 | 290 | "uboot_addr=" __stringify(CONFIG_SYS_MONITOR_BASE) "\0" \ |
3292539e SB |
291 | "update=protect off ${uboot_addr} +80000;" \ |
292 | "erase ${uboot_addr} +80000;" \ | |
eae4988b SB |
293 | "cp.b ${loadaddr} ${uboot_addr} ${filesize}\0" \ |
294 | "upd=if run load;then echo Updating u-boot;if run update;" \ | |
295 | "then echo U-Boot updated;" \ | |
296 | "else echo Error updating u-boot !;" \ | |
297 | "echo Board without bootloader !!;" \ | |
298 | "fi;" \ | |
299 | "else echo U-Boot not downloaded..exiting;fi\0" \ | |
300 | "bootcmd=run net_nfs\0" | |
301 | ||
302 | #endif /* __CONFIG_H */ |