[people/ms/u-boot.git] / include / configs / mx53ard.h

/*
 * Copyright (C) 2011 Freescale Semiconductor, Inc.
 *
 * Configuration settings for the MX53ARD Freescale board.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __CONFIG_H
#define __CONFIG_H

#define CONFIG_MACH_TYPE	MACH_TYPE_MX53_ARD

#include <asm/arch/imx-regs.h>

#define CONFIG_CMDLINE_TAG			/* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_REVISION_TAG

#define CONFIG_SYS_FSL_CLK

/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 2 * 1024 * 1024)

#define CONFIG_MXC_GPIO

#define CONFIG_SYS_MAX_NAND_DEVICE	1
#define CONFIG_SYS_NAND_BASE		NFC_BASE_ADDR_AXI
#define CONFIG_NAND_MXC
#define CONFIG_MXC_NAND_REGS_BASE	NFC_BASE_ADDR_AXI
#define CONFIG_MXC_NAND_IP_REGS_BASE	NFC_BASE_ADDR
#define CONFIG_SYS_NAND_LARGEPAGE
#define CONFIG_MXC_NAND_HWECC
#define CONFIG_SYS_NAND_USE_FLASH_BBT
#define CONFIG_CMD_NAND

#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE	UART1_BASE

/* I2C Configs */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */

/* MMC Configs */
#define CONFIG_FSL_ESDHC
#define CONFIG_SYS_FSL_ESDHC_ADDR	0
#define CONFIG_SYS_FSL_ESDHC_NUM	2

/* Eth Configs */
#define CONFIG_HAS_ETH1
#define CONFIG_MII

/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_CONS_INDEX		1

/* Command definition */

#define CONFIG_ETHPRIME		"smc911x"

/*Support LAN9217*/
#define CONFIG_SMC911X
#define CONFIG_SMC911X_16_BIT
#define CONFIG_SMC911X_BASE CS1_BASE_ADDR

#define CONFIG_LOADADDR		0x72000000	/* loadaddr env var */
#define CONFIG_SYS_TEXT_BASE    0x77800000

#define CONFIG_EXTRA_ENV_SETTINGS \
	"script=boot.scr\0" \
	"uimage=zImage\0" \
	"console=ttymxc0\0" \
	"fdt_high=0xffffffff\0" \
	"initrd_high=0xffffffff\0" \
	"fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
	"fdt_addr=0x78000000\0" \
	"boot_fdt=try\0" \
	"ip_dyn=yes\0" \
	"mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
	"mmcpart=1\0" \
	"mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
	"update_sd_firmware_filename=u-boot.imx\0" \
	"update_sd_firmware=" \
		"if test ${ip_dyn} = yes; then " \
			"setenv get_cmd dhcp; " \
		"else " \
			"setenv get_cmd tftp; " \
		"fi; " \
		"if mmc dev ${mmcdev}; then "	\
			"if ${get_cmd} ${update_sd_firmware_filename}; then " \
				"setexpr fw_sz ${filesize} / 0x200; " \
				"setexpr fw_sz ${fw_sz} + 1; "	\
				"mmc write ${loadaddr} 0x2 ${fw_sz}; " \
			"fi; "	\
		"fi\0" \
	"mmcargs=setenv bootargs console=${console},${baudrate} " \
		"root=${mmcroot}\0" \
	"loadbootscript=" \
		"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
	"bootscript=echo Running bootscript from mmc ...; " \
		"source\0" \
	"loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
	"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
	"mmcboot=echo Booting from mmc ...; " \
		"run mmcargs; " \
		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
			"if run loadfdt; then " \
				"bootz ${loadaddr} - ${fdt_addr}; " \
			"else " \
				"if test ${boot_fdt} = try; then " \
					"bootz; " \
				"else " \
					"echo WARN: Cannot load the DT; " \
				"fi; " \
			"fi; " \
		"else " \
			"bootz; " \
		"fi;\0" \
	"netargs=setenv bootargs console=${console},${baudrate} " \
		"root=/dev/nfs " \
	"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
		"netboot=echo Booting from net ...; " \
		"run netargs; " \
		"if test ${ip_dyn} = yes; then " \
			"setenv get_cmd dhcp; " \
		"else " \
			"setenv get_cmd tftp; " \
		"fi; " \
		"${get_cmd} ${uimage}; " \
		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
			"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
				"bootz ${loadaddr} - ${fdt_addr}; " \
			"else " \
				"if test ${boot_fdt} = try; then " \
					"bootz; " \
				"else " \
					"echo WARN: Cannot load the DT; " \
				"fi; " \
			"fi; " \
		"else " \
			"bootz; " \
		"fi;\0"

#define CONFIG_BOOTCOMMAND \
	   "mmc dev ${mmcdev}; if mmc rescan; then " \
		   "if run loadbootscript; then " \
			   "run bootscript; " \
		   "else " \
			   "if run loaduimage; then " \
				   "run mmcboot; " \
			   "else run netboot; " \
			   "fi; " \
		   "fi; " \
	   "else run netboot; fi"

#define CONFIG_ARP_TIMEOUT	200UL

/* Miscellaneous configurable options */
#define CONFIG_SYS_LONGHELP		/* undef to save memory */
#define CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_CBSIZE		256	/* Console I/O Buffer Size */

/* Print Buffer Size */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
#define CONFIG_SYS_MAXARGS	16	/* max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */

#define CONFIG_SYS_MEMTEST_START       0x70000000
#define CONFIG_SYS_MEMTEST_END         0x70010000

#define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR

#define CONFIG_CMDLINE_EDITING

/* Physical Memory Map */
#define CONFIG_NR_DRAM_BANKS	2
#define PHYS_SDRAM_1		CSD0_BASE_ADDR
#define PHYS_SDRAM_1_SIZE	(512 * 1024 * 1024)
#define PHYS_SDRAM_2		CSD1_BASE_ADDR
#define PHYS_SDRAM_2_SIZE	(512 * 1024 * 1024)
#define PHYS_SDRAM_SIZE         (PHYS_SDRAM_1_SIZE + PHYS_SDRAM_2_SIZE)

#define CONFIG_SYS_SDRAM_BASE		(PHYS_SDRAM_1)
#define CONFIG_SYS_INIT_RAM_ADDR	(IRAM_BASE_ADDR)
#define CONFIG_SYS_INIT_RAM_SIZE	(IRAM_SIZE)

#define CONFIG_SYS_INIT_SP_OFFSET \
	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR \
	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)

/* environment organization */
#define CONFIG_ENV_OFFSET      (6 * 64 * 1024)
#define CONFIG_ENV_SIZE        (8 * 1024)
#define CONFIG_SYS_MMC_ENV_DEV	0

#define MX53ARD_CS1GCR1		(CSEN | DSZ(2))
#define MX53ARD_CS1RCR1		(RCSN(2) | OEN (1) | RWSC(22))
#define MX53ARD_CS1RCR2		RBEN(2)
#define MX53ARD_CS1WCR1		(WCSN(2) | WEN(2) | WBEN(2) | WWSC(22))

#endif				/* __CONFIG_H */
Commit	Line	Data
47c3e074 FE	1	/*
	2	* Copyright (C) 2011 Freescale Semiconductor, Inc.
	3	*
	4	* Configuration settings for the MX53ARD Freescale board.
	5	*
3765b3e7	6	* SPDX-License-Identifier: GPL-2.0+
47c3e074 FE	7	*/
	8
	9	#ifndef __CONFIG_H
	10	#define __CONFIG_H
	11
7c2eabab FE	12	#define CONFIG_MACH_TYPE MACH_TYPE_MX53_ARD
7c2eabab FE	13
47c3e074 FE	14	#include <asm/arch/imx-regs.h>
	15
	16	#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
47c3e074 FE	17	#define CONFIG_SETUP_MEMORY_TAGS
47c3e074 FE	18	#define CONFIG_INITRD_TAG
fd622f23	19	#define CONFIG_REVISION_TAG
47c3e074	20
18fb0e3c	21	#define CONFIG_SYS_FSL_CLK
4677b1b6	22
47c3e074 FE	23	/* Size of malloc() pool */
	24	#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
	25
47c3e074 FE	26	#define CONFIG_MXC_GPIO
47c3e074 FE	27
68fbc0e6 BT	28	#define CONFIG_SYS_MAX_NAND_DEVICE 1
	29	#define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR_AXI
	30	#define CONFIG_NAND_MXC
	31	#define CONFIG_MXC_NAND_REGS_BASE NFC_BASE_ADDR_AXI
	32	#define CONFIG_MXC_NAND_IP_REGS_BASE NFC_BASE_ADDR
	33	#define CONFIG_SYS_NAND_LARGEPAGE
	34	#define CONFIG_MXC_NAND_HWECC
	35	#define CONFIG_SYS_NAND_USE_FLASH_BBT
	36	#define CONFIG_CMD_NAND
	37
47c3e074	38	#define CONFIG_MXC_UART
40f6fffe	39	#define CONFIG_MXC_UART_BASE UART1_BASE
47c3e074 FE	40
47c3e074 FE	41	/* I2C Configs */
b089d039	42	#define CONFIG_SYS_I2C
b089d039	43	#define CONFIG_SYS_I2C_MXC
03544c66 AA	44	#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
03544c66 AA	45	#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
f8cb101e	46	#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
47c3e074 FE	47
	48	/* MMC Configs */
	49	#define CONFIG_FSL_ESDHC
	50	#define CONFIG_SYS_FSL_ESDHC_ADDR 0
	51	#define CONFIG_SYS_FSL_ESDHC_NUM 2
	52
47c3e074 FE	53	/* Eth Configs */
47c3e074 FE	54	#define CONFIG_HAS_ETH1
47c3e074	55	#define CONFIG_MII
47c3e074	56
47c3e074 FE	57	/* allow to overwrite serial and ethaddr */
	58	#define CONFIG_ENV_OVERWRITE
	59	#define CONFIG_CONS_INDEX 1
47c3e074 FE	60
47c3e074 FE	61	/* Command definition */
47c3e074	62
28b119e9	63	#define CONFIG_ETHPRIME "smc911x"
47c3e074 FE	64
	65	/Support LAN9217/
	66	#define CONFIG_SMC911X
	67	#define CONFIG_SMC911X_16_BIT
	68	#define CONFIG_SMC911X_BASE CS1_BASE_ADDR
	69
547e31d2	70	#define CONFIG_LOADADDR 0x72000000 /* loadaddr env var */
47c3e074 FE	71	#define CONFIG_SYS_TEXT_BASE 0x77800000
	72
	73	#define CONFIG_EXTRA_ENV_SETTINGS \
	74	"script=boot.scr\0" \
3c525ecf	75	"uimage=zImage\0" \
547e31d2 OS	76	"console=ttymxc0\0" \
	77	"fdt_high=0xffffffff\0" \
	78	"initrd_high=0xffffffff\0" \
	79	"fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
3c525ecf	80	"fdt_addr=0x78000000\0" \
547e31d2 OS	81	"boot_fdt=try\0" \
	82	"ip_dyn=yes\0" \
	83	"mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
a3f170cd OS	84	"mmcpart=1\0" \
a3f170cd OS	85	"mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
547e31d2 OS	86	"update_sd_firmware_filename=u-boot.imx\0" \
	87	"update_sd_firmware=" \
	88	"if test ${ip_dyn} = yes; then " \
	89	"setenv get_cmd dhcp; " \
	90	"else " \
	91	"setenv get_cmd tftp; " \
	92	"fi; " \
	93	"if mmc dev ${mmcdev}; then " \
	94	"if ${get_cmd} ${update_sd_firmware_filename}; then " \
	95	"setexpr fw_sz ${filesize} / 0x200; " \
	96	"setexpr fw_sz ${fw_sz} + 1; " \
	97	"mmc write ${loadaddr} 0x2 ${fw_sz}; " \
	98	"fi; " \
	99	"fi\0" \
	100	"mmcargs=setenv bootargs console=${console},${baudrate} " \
	101	"root=${mmcroot}\0" \
47c3e074 FE	102	"loadbootscript=" \
	103	"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
	104	"bootscript=echo Running bootscript from mmc ...; " \
	105	"source\0" \
	106	"loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
547e31d2	107	"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
47c3e074 FE	108	"mmcboot=echo Booting from mmc ...; " \
47c3e074 FE	109	"run mmcargs; " \
547e31d2 OS	110	"if test ${boot_fdt} = yes \|\| test ${boot_fdt} = try; then " \
547e31d2 OS	111	"if run loadfdt; then " \
3c525ecf	112	"bootz ${loadaddr} - ${fdt_addr}; " \
547e31d2 OS	113	"else " \
547e31d2 OS	114	"if test ${boot_fdt} = try; then " \
3c525ecf	115	"bootz; " \
547e31d2 OS	116	"else " \
	117	"echo WARN: Cannot load the DT; " \
	118	"fi; " \
	119	"fi; " \
	120	"else " \
3c525ecf	121	"bootz; " \
547e31d2 OS	122	"fi;\0" \
547e31d2 OS	123	"netargs=setenv bootargs console=${console},${baudrate} " \
47c3e074	124	"root=/dev/nfs " \
547e31d2 OS	125	"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
547e31d2 OS	126	"netboot=echo Booting from net ...; " \
47c3e074	127	"run netargs; " \
547e31d2 OS	128	"if test ${ip_dyn} = yes; then " \
547e31d2 OS	129	"setenv get_cmd dhcp; " \
47c3e074	130	"else " \
547e31d2	131	"setenv get_cmd tftp; " \
47c3e074	132	"fi; " \
547e31d2 OS	133	"${get_cmd} ${uimage}; " \
	134	"if test ${boot_fdt} = yes \|\| test ${boot_fdt} = try; then " \
	135	"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
3c525ecf	136	"bootz ${loadaddr} - ${fdt_addr}; " \
547e31d2 OS	137	"else " \
547e31d2 OS	138	"if test ${boot_fdt} = try; then " \
3c525ecf	139	"bootz; " \
547e31d2 OS	140	"else " \
	141	"echo WARN: Cannot load the DT; " \
	142	"fi; " \
	143	"fi; " \
	144	"else " \
3c525ecf	145	"bootz; " \
547e31d2 OS	146	"fi;\0"
	147
	148	#define CONFIG_BOOTCOMMAND \
	149	"mmc dev ${mmcdev}; if mmc rescan; then " \
	150	"if run loadbootscript; then " \
	151	"run bootscript; " \
	152	"else " \
	153	"if run loaduimage; then " \
	154	"run mmcboot; " \
	155	"else run netboot; " \
	156	"fi; " \
	157	"fi; " \
	158	"else run netboot; fi"
	159
47c3e074 FE	160	#define CONFIG_ARP_TIMEOUT 200UL
	161
	162	/* Miscellaneous configurable options */
	163	#define CONFIG_SYS_LONGHELP /* undef to save memory */
47c3e074 FE	164	#define CONFIG_AUTO_COMPLETE
	165	#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
	166
	167	/* Print Buffer Size */
	168	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
	169	#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
	170	#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
	171
	172	#define CONFIG_SYS_MEMTEST_START 0x70000000
	173	#define CONFIG_SYS_MEMTEST_END 0x70010000
	174
	175	#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
	176
47c3e074 FE	177	#define CONFIG_CMDLINE_EDITING
47c3e074 FE	178
47c3e074 FE	179	/* Physical Memory Map */
	180	#define CONFIG_NR_DRAM_BANKS 2
	181	#define PHYS_SDRAM_1 CSD0_BASE_ADDR
	182	#define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024)
	183	#define PHYS_SDRAM_2 CSD1_BASE_ADDR
	184	#define PHYS_SDRAM_2_SIZE (512 * 1024 * 1024)
	185	#define PHYS_SDRAM_SIZE (PHYS_SDRAM_1_SIZE + PHYS_SDRAM_2_SIZE)
	186
	187	#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
	188	#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
	189	#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
	190
	191	#define CONFIG_SYS_INIT_SP_OFFSET \
	192	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
	193	#define CONFIG_SYS_INIT_SP_ADDR \
	194	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
	195
e856bdcf	196	/* environment organization */
47c3e074 FE	197	#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
47c3e074 FE	198	#define CONFIG_ENV_SIZE (8 * 1024)
47c3e074 FE	199	#define CONFIG_SYS_MMC_ENV_DEV 0
47c3e074 FE	200
47c3e074 FE	201	#define MX53ARD_CS1GCR1 (CSEN \| DSZ(2))
	202	#define MX53ARD_CS1RCR1 (RCSN(2) \| OEN (1) \| RWSC(22))
	203	#define MX53ARD_CS1RCR2 RBEN(2)
	204	#define MX53ARD_CS1WCR1 (WCSN(2) \| WEN(2) \| WBEN(2) \| WWSC(22))
	205
	206	#endif /* __CONFIG_H */