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47c3e074 FE |
1 | /* |
2 | * Copyright (C) 2011 Freescale Semiconductor, Inc. | |
3 | * | |
4 | * Configuration settings for the MX53ARD Freescale board. | |
5 | * | |
3765b3e7 | 6 | * SPDX-License-Identifier: GPL-2.0+ |
47c3e074 FE |
7 | */ |
8 | ||
9 | #ifndef __CONFIG_H | |
10 | #define __CONFIG_H | |
11 | ||
12 | #define CONFIG_MX53 | |
13 | ||
47c3e074 FE |
14 | #define CONFIG_DISPLAY_CPUINFO |
15 | #define CONFIG_DISPLAY_BOARDINFO | |
16 | ||
7c2eabab FE |
17 | #define CONFIG_MACH_TYPE MACH_TYPE_MX53_ARD |
18 | ||
47c3e074 FE |
19 | #include <asm/arch/imx-regs.h> |
20 | ||
21 | #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ | |
47c3e074 FE |
22 | #define CONFIG_SETUP_MEMORY_TAGS |
23 | #define CONFIG_INITRD_TAG | |
fd622f23 | 24 | #define CONFIG_REVISION_TAG |
47c3e074 | 25 | |
18fb0e3c | 26 | #define CONFIG_SYS_FSL_CLK |
4677b1b6 | 27 | |
47c3e074 FE |
28 | /* Size of malloc() pool */ |
29 | #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024) | |
30 | ||
31 | #define CONFIG_BOARD_EARLY_INIT_F | |
32 | #define CONFIG_MXC_GPIO | |
33 | ||
3c525ecf FE |
34 | #define CONFIG_CMD_BOOTZ |
35 | ||
68fbc0e6 BT |
36 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 |
37 | #define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR_AXI | |
38 | #define CONFIG_NAND_MXC | |
39 | #define CONFIG_MXC_NAND_REGS_BASE NFC_BASE_ADDR_AXI | |
40 | #define CONFIG_MXC_NAND_IP_REGS_BASE NFC_BASE_ADDR | |
41 | #define CONFIG_SYS_NAND_LARGEPAGE | |
42 | #define CONFIG_MXC_NAND_HWECC | |
43 | #define CONFIG_SYS_NAND_USE_FLASH_BBT | |
44 | #define CONFIG_CMD_NAND | |
45 | ||
47c3e074 | 46 | #define CONFIG_MXC_UART |
40f6fffe | 47 | #define CONFIG_MXC_UART_BASE UART1_BASE |
47c3e074 FE |
48 | |
49 | /* I2C Configs */ | |
50 | #define CONFIG_CMD_I2C | |
b089d039 | 51 | #define CONFIG_SYS_I2C |
52 | #define CONFIG_SYS_I2C_MXC | |
03544c66 AA |
53 | #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ |
54 | #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ | |
f8cb101e | 55 | #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ |
47c3e074 FE |
56 | |
57 | /* MMC Configs */ | |
58 | #define CONFIG_FSL_ESDHC | |
59 | #define CONFIG_SYS_FSL_ESDHC_ADDR 0 | |
60 | #define CONFIG_SYS_FSL_ESDHC_NUM 2 | |
61 | ||
62 | #define CONFIG_MMC | |
63 | #define CONFIG_CMD_MMC | |
64 | #define CONFIG_GENERIC_MMC | |
65 | #define CONFIG_CMD_FAT | |
66 | #define CONFIG_DOS_PARTITION | |
67 | ||
68 | /* Eth Configs */ | |
69 | #define CONFIG_HAS_ETH1 | |
47c3e074 | 70 | #define CONFIG_MII |
47c3e074 FE |
71 | |
72 | #define CONFIG_CMD_PING | |
73 | #define CONFIG_CMD_DHCP | |
74 | #define CONFIG_CMD_MII | |
47c3e074 FE |
75 | |
76 | /* allow to overwrite serial and ethaddr */ | |
77 | #define CONFIG_ENV_OVERWRITE | |
78 | #define CONFIG_CONS_INDEX 1 | |
79 | #define CONFIG_BAUDRATE 115200 | |
47c3e074 FE |
80 | |
81 | /* Command definition */ | |
47c3e074 FE |
82 | #define CONFIG_BOOTDELAY 3 |
83 | ||
28b119e9 | 84 | #define CONFIG_ETHPRIME "smc911x" |
47c3e074 FE |
85 | |
86 | /*Support LAN9217*/ | |
87 | #define CONFIG_SMC911X | |
88 | #define CONFIG_SMC911X_16_BIT | |
89 | #define CONFIG_SMC911X_BASE CS1_BASE_ADDR | |
90 | ||
547e31d2 | 91 | #define CONFIG_LOADADDR 0x72000000 /* loadaddr env var */ |
47c3e074 FE |
92 | #define CONFIG_SYS_TEXT_BASE 0x77800000 |
93 | ||
547e31d2 OS |
94 | #define CONFIG_DEFAULT_FDT_FILE "imx53-ard.dtb" |
95 | ||
47c3e074 FE |
96 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
97 | "script=boot.scr\0" \ | |
3c525ecf | 98 | "uimage=zImage\0" \ |
547e31d2 OS |
99 | "console=ttymxc0\0" \ |
100 | "fdt_high=0xffffffff\0" \ | |
101 | "initrd_high=0xffffffff\0" \ | |
102 | "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \ | |
3c525ecf | 103 | "fdt_addr=0x78000000\0" \ |
547e31d2 OS |
104 | "boot_fdt=try\0" \ |
105 | "ip_dyn=yes\0" \ | |
106 | "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ | |
a3f170cd OS |
107 | "mmcpart=1\0" \ |
108 | "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \ | |
547e31d2 OS |
109 | "update_sd_firmware_filename=u-boot.imx\0" \ |
110 | "update_sd_firmware=" \ | |
111 | "if test ${ip_dyn} = yes; then " \ | |
112 | "setenv get_cmd dhcp; " \ | |
113 | "else " \ | |
114 | "setenv get_cmd tftp; " \ | |
115 | "fi; " \ | |
116 | "if mmc dev ${mmcdev}; then " \ | |
117 | "if ${get_cmd} ${update_sd_firmware_filename}; then " \ | |
118 | "setexpr fw_sz ${filesize} / 0x200; " \ | |
119 | "setexpr fw_sz ${fw_sz} + 1; " \ | |
120 | "mmc write ${loadaddr} 0x2 ${fw_sz}; " \ | |
121 | "fi; " \ | |
122 | "fi\0" \ | |
123 | "mmcargs=setenv bootargs console=${console},${baudrate} " \ | |
124 | "root=${mmcroot}\0" \ | |
47c3e074 FE |
125 | "loadbootscript=" \ |
126 | "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ | |
127 | "bootscript=echo Running bootscript from mmc ...; " \ | |
128 | "source\0" \ | |
129 | "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \ | |
547e31d2 | 130 | "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ |
47c3e074 FE |
131 | "mmcboot=echo Booting from mmc ...; " \ |
132 | "run mmcargs; " \ | |
547e31d2 OS |
133 | "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ |
134 | "if run loadfdt; then " \ | |
3c525ecf | 135 | "bootz ${loadaddr} - ${fdt_addr}; " \ |
547e31d2 OS |
136 | "else " \ |
137 | "if test ${boot_fdt} = try; then " \ | |
3c525ecf | 138 | "bootz; " \ |
547e31d2 OS |
139 | "else " \ |
140 | "echo WARN: Cannot load the DT; " \ | |
141 | "fi; " \ | |
142 | "fi; " \ | |
143 | "else " \ | |
3c525ecf | 144 | "bootz; " \ |
547e31d2 OS |
145 | "fi;\0" \ |
146 | "netargs=setenv bootargs console=${console},${baudrate} " \ | |
47c3e074 | 147 | "root=/dev/nfs " \ |
547e31d2 OS |
148 | "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ |
149 | "netboot=echo Booting from net ...; " \ | |
47c3e074 | 150 | "run netargs; " \ |
547e31d2 OS |
151 | "if test ${ip_dyn} = yes; then " \ |
152 | "setenv get_cmd dhcp; " \ | |
47c3e074 | 153 | "else " \ |
547e31d2 | 154 | "setenv get_cmd tftp; " \ |
47c3e074 | 155 | "fi; " \ |
547e31d2 OS |
156 | "${get_cmd} ${uimage}; " \ |
157 | "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ | |
158 | "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ | |
3c525ecf | 159 | "bootz ${loadaddr} - ${fdt_addr}; " \ |
547e31d2 OS |
160 | "else " \ |
161 | "if test ${boot_fdt} = try; then " \ | |
3c525ecf | 162 | "bootz; " \ |
547e31d2 OS |
163 | "else " \ |
164 | "echo WARN: Cannot load the DT; " \ | |
165 | "fi; " \ | |
166 | "fi; " \ | |
167 | "else " \ | |
3c525ecf | 168 | "bootz; " \ |
547e31d2 OS |
169 | "fi;\0" |
170 | ||
171 | #define CONFIG_BOOTCOMMAND \ | |
172 | "mmc dev ${mmcdev}; if mmc rescan; then " \ | |
173 | "if run loadbootscript; then " \ | |
174 | "run bootscript; " \ | |
175 | "else " \ | |
176 | "if run loaduimage; then " \ | |
177 | "run mmcboot; " \ | |
178 | "else run netboot; " \ | |
179 | "fi; " \ | |
180 | "fi; " \ | |
181 | "else run netboot; fi" | |
182 | ||
47c3e074 FE |
183 | #define CONFIG_ARP_TIMEOUT 200UL |
184 | ||
185 | /* Miscellaneous configurable options */ | |
186 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ | |
47c3e074 FE |
187 | #define CONFIG_AUTO_COMPLETE |
188 | #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ | |
189 | ||
190 | /* Print Buffer Size */ | |
191 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) | |
192 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ | |
193 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ | |
194 | ||
195 | #define CONFIG_SYS_MEMTEST_START 0x70000000 | |
196 | #define CONFIG_SYS_MEMTEST_END 0x70010000 | |
197 | ||
198 | #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR | |
199 | ||
47c3e074 FE |
200 | #define CONFIG_CMDLINE_EDITING |
201 | ||
47c3e074 FE |
202 | /* Physical Memory Map */ |
203 | #define CONFIG_NR_DRAM_BANKS 2 | |
204 | #define PHYS_SDRAM_1 CSD0_BASE_ADDR | |
205 | #define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024) | |
206 | #define PHYS_SDRAM_2 CSD1_BASE_ADDR | |
207 | #define PHYS_SDRAM_2_SIZE (512 * 1024 * 1024) | |
208 | #define PHYS_SDRAM_SIZE (PHYS_SDRAM_1_SIZE + PHYS_SDRAM_2_SIZE) | |
209 | ||
210 | #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) | |
211 | #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) | |
212 | #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) | |
213 | ||
214 | #define CONFIG_SYS_INIT_SP_OFFSET \ | |
215 | (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) | |
216 | #define CONFIG_SYS_INIT_SP_ADDR \ | |
217 | (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) | |
218 | ||
219 | /* FLASH and environment organization */ | |
220 | #define CONFIG_SYS_NO_FLASH | |
221 | ||
222 | #define CONFIG_ENV_OFFSET (6 * 64 * 1024) | |
223 | #define CONFIG_ENV_SIZE (8 * 1024) | |
224 | #define CONFIG_ENV_IS_IN_MMC | |
225 | #define CONFIG_SYS_MMC_ENV_DEV 0 | |
226 | ||
47c3e074 FE |
227 | |
228 | #define MX53ARD_CS1GCR1 (CSEN | DSZ(2)) | |
229 | #define MX53ARD_CS1RCR1 (RCSN(2) | OEN (1) | RWSC(22)) | |
230 | #define MX53ARD_CS1RCR2 RBEN(2) | |
231 | #define MX53ARD_CS1WCR1 (WCSN(2) | WEN(2) | WBEN(2) | WWSC(22)) | |
232 | ||
233 | #endif /* __CONFIG_H */ |