[people/ms/u-boot.git] / include / configs / mx6sxsabresd.h

/*
 * Copyright 2014 Freescale Semiconductor, Inc.
 *
 * Configuration settings for the Freescale i.MX6SX Sabresd board.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */


#ifndef __CONFIG_H
#define __CONFIG_H

#include "mx6_common.h"

#ifdef CONFIG_SPL
#define CONFIG_SPL_LIBCOMMON_SUPPORT
#define CONFIG_SPL_MMC_SUPPORT
#include "imx6_spl.h"
#endif

/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN		(3 * SZ_1M)

#define CONFIG_BOARD_EARLY_INIT_F

#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE		UART1_BASE

#define CONFIG_EXTRA_ENV_SETTINGS \
	"script=boot.scr\0" \
	"image=zImage\0" \
	"console=ttymxc0\0" \
	"fdt_high=0xffffffff\0" \
	"initrd_high=0xffffffff\0" \
	"fdt_file=imx6sx-sdb.dtb\0" \
	"fdt_addr=0x88000000\0" \
	"boot_fdt=try\0" \
	"ip_dyn=yes\0" \
	"mmcdev=2\0" \
	"mmcpart=1\0" \
	"mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
	"mmcargs=setenv bootargs console=${console},${baudrate} " \
		"root=${mmcroot}\0" \
	"loadbootscript=" \
		"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
	"bootscript=echo Running bootscript from mmc ...; " \
		"source\0" \
	"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
	"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
	"mmcboot=echo Booting from mmc ...; " \
		"run mmcargs; " \
		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
			"if run loadfdt; then " \
				"bootz ${loadaddr} - ${fdt_addr}; " \
			"else " \
				"if test ${boot_fdt} = try; then " \
					"bootz; " \
				"else " \
					"echo WARN: Cannot load the DT; " \
				"fi; " \
			"fi; " \
		"else " \
			"bootz; " \
		"fi;\0" \
	"netargs=setenv bootargs console=${console},${baudrate} " \
		"root=/dev/nfs " \
	"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
		"netboot=echo Booting from net ...; " \
		"run netargs; " \
		"if test ${ip_dyn} = yes; then " \
			"setenv get_cmd dhcp; " \
		"else " \
			"setenv get_cmd tftp; " \
		"fi; " \
		"${get_cmd} ${image}; " \
		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
			"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
				"bootz ${loadaddr} - ${fdt_addr}; " \
			"else " \
				"if test ${boot_fdt} = try; then " \
					"bootz; " \
				"else " \
					"echo WARN: Cannot load the DT; " \
				"fi; " \
			"fi; " \
		"else " \
			"bootz; " \
		"fi;\0"

#define CONFIG_BOOTCOMMAND \
	   "mmc dev ${mmcdev};" \
	   "mmc dev ${mmcdev}; if mmc rescan; then " \
		   "if run loadbootscript; then " \
			   "run bootscript; " \
		   "else " \
			   "if run loadimage; then " \
				   "run mmcboot; " \
			   "else run netboot; " \
			   "fi; " \
		   "fi; " \
	   "else run netboot; fi"

/* Miscellaneous configurable options */
#define CONFIG_SYS_MEMTEST_START	0x80000000
#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + 0x10000)

#define CONFIG_STACKSIZE		SZ_128K

/* Physical Memory Map */
#define CONFIG_NR_DRAM_BANKS		1
#define PHYS_SDRAM			MMDC0_ARB_BASE_ADDR
#define PHYS_SDRAM_SIZE			SZ_1G

#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM
#define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE

#define CONFIG_SYS_INIT_SP_OFFSET \
	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR \
	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)

/* MMC Configuration */
#define CONFIG_SYS_FSL_ESDHC_ADDR	USDHC4_BASE_ADDR

/* I2C Configs */
#define CONFIG_CMD_I2C
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
#define CONFIG_SYS_I2C_SPEED		  100000

/* PMIC */
#define CONFIG_POWER
#define CONFIG_POWER_I2C
#define CONFIG_POWER_PFUZE100
#define CONFIG_POWER_PFUZE100_I2C_ADDR	0x08

/* Network */
#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_MII
#define CONFIG_FEC_MXC
#define CONFIG_MII

#define IMX_FEC_BASE			ENET_BASE_ADDR
#define CONFIG_FEC_MXC_PHYADDR          0x1

#define CONFIG_FEC_XCV_TYPE             RGMII
#define CONFIG_ETHPRIME                 "FEC"

#define CONFIG_PHYLIB
#define CONFIG_PHY_ATHEROS


#define CONFIG_CMD_USB
#ifdef CONFIG_CMD_USB
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_MX6
#define CONFIG_USB_STORAGE
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
#define CONFIG_USB_HOST_ETHER
#define CONFIG_USB_ETHER_ASIX
#define CONFIG_MXC_USB_PORTSC  (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CONFIG_MXC_USB_FLAGS   0
#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
#endif

#define CONFIG_CMD_PCI
#ifdef CONFIG_CMD_PCI
#define CONFIG_PCI
#define CONFIG_PCI_PNP
#define CONFIG_PCI_SCAN_SHOW
#define CONFIG_PCIE_IMX
#define CONFIG_PCIE_IMX_PERST_GPIO	IMX_GPIO_NR(2, 0)
#define CONFIG_PCIE_IMX_POWER_GPIO	IMX_GPIO_NR(2, 1)
#endif

#define CONFIG_IMX_THERMAL

#define CONFIG_CMD_TIME

#define CONFIG_FSL_QSPI

#ifdef CONFIG_FSL_QSPI
#define CONFIG_CMD_SF
#define CONFIG_SPI_FLASH_SPANSION
#define CONFIG_SPI_FLASH_STMICRO
#define CONFIG_SYS_FSL_QSPI_LE
#define CONFIG_SYS_FSL_QSPI_AHB
#ifdef CONFIG_MX6SX_SABRESD_REVA
#define FSL_QSPI_FLASH_SIZE		SZ_16M
#else
#define FSL_QSPI_FLASH_SIZE		SZ_32M
#endif
#define FSL_QSPI_FLASH_NUM		2
#endif

#define CONFIG_ENV_OFFSET		(8 * SZ_64K)
#define CONFIG_ENV_SIZE			SZ_8K
#define CONFIG_ENV_IS_IN_MMC

#define CONFIG_SYS_FSL_USDHC_NUM	3
#if defined(CONFIG_ENV_IS_IN_MMC)
#define CONFIG_SYS_MMC_ENV_DEV		2  /*USDHC4*/
#endif

#endif				/* __CONFIG_H */
Commit	Line	Data
14a16131 FE	1	/*
	2	* Copyright 2014 Freescale Semiconductor, Inc.
	3	*
	4	* Configuration settings for the Freescale i.MX6SX Sabresd board.
	5	*
	6	* SPDX-License-Identifier: GPL-2.0+
	7	*/
	8
	9
	10	#ifndef __CONFIG_H
	11	#define __CONFIG_H
	12
14a16131 FE	13	#include "mx6_common.h"
14a16131 FE	14
71abf19b PF	15	#ifdef CONFIG_SPL
	16	#define CONFIG_SPL_LIBCOMMON_SUPPORT
	17	#define CONFIG_SPL_MMC_SUPPORT
	18	#include "imx6_spl.h"
	19	#endif
	20
14a16131 FE	21	/* Size of malloc() pool */
	22	#define CONFIG_SYS_MALLOC_LEN (3 * SZ_1M)
	23
	24	#define CONFIG_BOARD_EARLY_INIT_F
14a16131 FE	25
	26	#define CONFIG_MXC_UART
	27	#define CONFIG_MXC_UART_BASE UART1_BASE
	28
14a16131 FE	29	#define CONFIG_EXTRA_ENV_SETTINGS \
	30	"script=boot.scr\0" \
	31	"image=zImage\0" \
	32	"console=ttymxc0\0" \
	33	"fdt_high=0xffffffff\0" \
	34	"initrd_high=0xffffffff\0" \
	35	"fdt_file=imx6sx-sdb.dtb\0" \
	36	"fdt_addr=0x88000000\0" \
	37	"boot_fdt=try\0" \
	38	"ip_dyn=yes\0" \
d0fbca2a	39	"mmcdev=2\0" \
14a16131 FE	40	"mmcpart=1\0" \
	41	"mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
	42	"mmcargs=setenv bootargs console=${console},${baudrate} " \
	43	"root=${mmcroot}\0" \
	44	"loadbootscript=" \
	45	"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
	46	"bootscript=echo Running bootscript from mmc ...; " \
	47	"source\0" \
	48	"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
	49	"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
	50	"mmcboot=echo Booting from mmc ...; " \
	51	"run mmcargs; " \
	52	"if test ${boot_fdt} = yes \|\| test ${boot_fdt} = try; then " \
	53	"if run loadfdt; then " \
	54	"bootz ${loadaddr} - ${fdt_addr}; " \
	55	"else " \
	56	"if test ${boot_fdt} = try; then " \
	57	"bootz; " \
	58	"else " \
	59	"echo WARN: Cannot load the DT; " \
	60	"fi; " \
	61	"fi; " \
	62	"else " \
	63	"bootz; " \
	64	"fi;\0" \
	65	"netargs=setenv bootargs console=${console},${baudrate} " \
	66	"root=/dev/nfs " \
	67	"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
	68	"netboot=echo Booting from net ...; " \
	69	"run netargs; " \
	70	"if test ${ip_dyn} = yes; then " \
	71	"setenv get_cmd dhcp; " \
	72	"else " \
	73	"setenv get_cmd tftp; " \
	74	"fi; " \
	75	"${get_cmd} ${image}; " \
	76	"if test ${boot_fdt} = yes \|\| test ${boot_fdt} = try; then " \
	77	"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
	78	"bootz ${loadaddr} - ${fdt_addr}; " \
	79	"else " \
	80	"if test ${boot_fdt} = try; then " \
	81	"bootz; " \
	82	"else " \
	83	"echo WARN: Cannot load the DT; " \
	84	"fi; " \
	85	"fi; " \
	86	"else " \
	87	"bootz; " \
	88	"fi;\0"
	89
	90	#define CONFIG_BOOTCOMMAND \
	91	"mmc dev ${mmcdev};" \
	92	"mmc dev ${mmcdev}; if mmc rescan; then " \
	93	"if run loadbootscript; then " \
	94	"run bootscript; " \
	95	"else " \
	96	"if run loadimage; then " \
	97	"run mmcboot; " \
	98	"else run netboot; " \
	99	"fi; " \
	100	"fi; " \
	101	"else run netboot; fi"
	102
	103	/* Miscellaneous configurable options */
14a16131 FE	104	#define CONFIG_SYS_MEMTEST_START 0x80000000
	105	#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x10000)
	106
14a16131 FE	107	#define CONFIG_STACKSIZE SZ_128K
	108
	109	/* Physical Memory Map */
	110	#define CONFIG_NR_DRAM_BANKS 1
	111	#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
	112	#define PHYS_SDRAM_SIZE SZ_1G
	113
	114	#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
	115	#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
	116	#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
	117
	118	#define CONFIG_SYS_INIT_SP_OFFSET \
	119	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
	120	#define CONFIG_SYS_INIT_SP_ADDR \
	121	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
	122
	123	/* MMC Configuration */
152adee1	124	#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC4_BASE_ADDR
14a16131	125
fa8cf317 FE	126	/* I2C Configs */
	127	#define CONFIG_CMD_I2C
	128	#define CONFIG_SYS_I2C
	129	#define CONFIG_SYS_I2C_MXC
03544c66 AA	130	#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
03544c66 AA	131	#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
f8cb101e	132	#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
fa8cf317 FE	133	#define CONFIG_SYS_I2C_SPEED 100000
	134
	135	/* PMIC */
	136	#define CONFIG_POWER
	137	#define CONFIG_POWER_I2C
	138	#define CONFIG_POWER_PFUZE100
	139	#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
	140
d145878d FE	141	/* Network */
	142	#define CONFIG_CMD_PING
	143	#define CONFIG_CMD_DHCP
	144	#define CONFIG_CMD_MII
d145878d FE	145	#define CONFIG_FEC_MXC
	146	#define CONFIG_MII
	147
	148	#define IMX_FEC_BASE ENET_BASE_ADDR
	149	#define CONFIG_FEC_MXC_PHYADDR 0x1
	150
	151	#define CONFIG_FEC_XCV_TYPE RGMII
	152	#define CONFIG_ETHPRIME "FEC"
	153
	154	#define CONFIG_PHYLIB
	155	#define CONFIG_PHY_ATHEROS
	156
a511a3e0 PF	157
	158	#define CONFIG_CMD_USB
	159	#ifdef CONFIG_CMD_USB
	160	#define CONFIG_USB_EHCI
	161	#define CONFIG_USB_EHCI_MX6
	162	#define CONFIG_USB_STORAGE
	163	#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
	164	#define CONFIG_USB_HOST_ETHER
	165	#define CONFIG_USB_ETHER_ASIX
	166	#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI \| PORT_PTS_PTW)
	167	#define CONFIG_MXC_USB_FLAGS 0
	168	#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
	169	#endif
	170
c860eed1 FE	171	#define CONFIG_CMD_PCI
	172	#ifdef CONFIG_CMD_PCI
	173	#define CONFIG_PCI
	174	#define CONFIG_PCI_PNP
	175	#define CONFIG_PCI_SCAN_SHOW
	176	#define CONFIG_PCIE_IMX
fb6f86c4 FE	177	#define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(2, 0)
fb6f86c4 FE	178	#define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(2, 1)
c860eed1 FE	179	#endif
c860eed1 FE	180
1368f993	181	#define CONFIG_IMX_THERMAL
4b16fd22	182
adc0fabf PF	183	#define CONFIG_CMD_TIME
adc0fabf PF	184
fad7d735 PF	185	#define CONFIG_FSL_QSPI
	186
	187	#ifdef CONFIG_FSL_QSPI
	188	#define CONFIG_CMD_SF
fad7d735 PF	189	#define CONFIG_SPI_FLASH_SPANSION
	190	#define CONFIG_SPI_FLASH_STMICRO
	191	#define CONFIG_SYS_FSL_QSPI_LE
adc0fabf	192	#define CONFIG_SYS_FSL_QSPI_AHB
d87cbecc	193	#ifdef CONFIG_MX6SX_SABRESD_REVA
fad7d735	194	#define FSL_QSPI_FLASH_SIZE SZ_16M
d87cbecc PF	195	#else
	196	#define FSL_QSPI_FLASH_SIZE SZ_32M
	197	#endif
fad7d735 PF	198	#define FSL_QSPI_FLASH_NUM 2
	199	#endif
	200
0da040bf	201	#define CONFIG_ENV_OFFSET (8 * SZ_64K)
14a16131 FE	202	#define CONFIG_ENV_SIZE SZ_8K
14a16131 FE	203	#define CONFIG_ENV_IS_IN_MMC
14a16131	204
d0fbca2a YL	205	#define CONFIG_SYS_FSL_USDHC_NUM 3
	206	#if defined(CONFIG_ENV_IS_IN_MMC)
	207	#define CONFIG_SYS_MMC_ENV_DEV 2 /USDHC4/
	208	#endif
	209
14a16131	210	#endif /* __CONFIG_H */