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86887f8e PB |
1 | /* |
2 | * (C) Copyright 2011 Logic Product Development <www.logicpd.com> | |
3 | * Peter Barada <peter.barada@logicpd.com> | |
4 | * | |
5 | * Configuration settings for the Logic OMAP35x/DM37x SOM LV/Torpedo | |
6 | * reference boards. | |
7 | * | |
3765b3e7 | 8 | * SPDX-License-Identifier: GPL-2.0+ |
86887f8e PB |
9 | */ |
10 | ||
11 | #ifndef __CONFIG_H | |
12 | #define __CONFIG_H | |
13 | ||
49c7303f | 14 | /* High Level Configuration Options */ |
86887f8e | 15 | |
7b77b1f6 | 16 | #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ |
86887f8e | 17 | |
49c7303f AF |
18 | #include <configs/ti_omap3_common.h> |
19 | ||
15fde737 AF |
20 | #ifdef CONFIG_SPL_BUILD |
21 | /* | |
22 | * Disable MMC DM for SPL build and can be re-enabled after adding | |
23 | * DM support in SPL | |
24 | */ | |
25 | #undef CONFIG_DM_MMC | |
4125bbce | 26 | #undef CONFIG_DM_MMC_OPS |
15fde737 AF |
27 | #undef OMAP_HSMMC_USE_GPIO |
28 | ||
29 | /* select serial console configuration for SPL */ | |
30 | #undef CONFIG_CONS_INDEX | |
31 | #define CONFIG_CONS_INDEX 1 | |
32 | #define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1 | |
33 | #endif | |
34 | ||
35 | ||
fa2f81b0 TR |
36 | /* |
37 | * We are only ever GP parts and will utilize all of the "downloaded image" | |
38 | * area in SRAM which starts at 0x40200000 and ends at 0x4020FFFF (64KB) in | |
39 | * order to allow for BCH8 to fit in. | |
40 | */ | |
f92dfc87 | 41 | #undef CONFIG_SPL_TEXT_BASE |
15fde737 | 42 | #define CONFIG_SPL_FRAMEWORK |
fa2f81b0 | 43 | #define CONFIG_SPL_TEXT_BASE 0x40200000 |
f92dfc87 | 44 | |
86887f8e | 45 | #define CONFIG_MISC_INIT_R /* misc_init_r dumps the die id */ |
49c7303f | 46 | #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ |
86887f8e PB |
47 | #define CONFIG_SETUP_MEMORY_TAGS |
48 | #define CONFIG_INITRD_TAG | |
49 | #define CONFIG_REVISION_TAG | |
50 | ||
49c7303f | 51 | /* Hardware drivers */ |
86887f8e | 52 | |
49c7303f AF |
53 | #define CONFIG_USB_OMAP3 |
54 | ||
86887f8e | 55 | /* commands to include */ |
49c7303f | 56 | #define CONFIG_CMD_NAND |
86887f8e | 57 | #define CONFIG_CMD_NAND_LOCK_UNLOCK /* nand (un)lock commands */ |
86887f8e | 58 | |
49c7303f | 59 | /* I2C */ |
6789e84e | 60 | #define CONFIG_SYS_I2C_OMAP34XX |
49c7303f | 61 | #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM AT24C64 */ |
86887f8e | 62 | |
588e41d2 | 63 | /* USB */ |
588e41d2 AF |
64 | #define CONFIG_USB_MUSB_OMAP2PLUS |
65 | #define CONFIG_USB_MUSB_PIO_ONLY | |
588e41d2 AF |
66 | #define CONFIG_USB_ETHER |
67 | #define CONFIG_USB_ETHER_RNDIS | |
588e41d2 AF |
68 | #define CONFIG_USB_FUNCTION_FASTBOOT |
69 | #define CONFIG_CMD_FASTBOOT | |
70 | #define CONFIG_ANDROID_BOOT_IMAGE | |
71 | #define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR | |
72 | #define CONFIG_FASTBOOT_BUF_SIZE 0x07000000 | |
588e41d2 | 73 | |
49c7303f AF |
74 | /* TWL4030 */ |
75 | #define CONFIG_TWL4030_PWM | |
588e41d2 | 76 | #define CONFIG_TWL4030_USB |
7b77b1f6 | 77 | |
49c7303f AF |
78 | /* Board NAND Info. */ |
79 | #ifdef CONFIG_NAND | |
86887f8e | 80 | #define CONFIG_NAND_OMAP_GPMC |
7b77b1f6 | 81 | |
49c7303f AF |
82 | #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ |
83 | /* to access nand */ | |
84 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */ | |
85 | /* NAND devices */ | |
55f1b39f | 86 | #define CONFIG_SYS_NAND_BUSWIDTH_16BIT |
49c7303f AF |
87 | #define CONFIG_SYS_NAND_5_ADDR_CYCLE |
88 | #define CONFIG_SYS_NAND_PAGE_COUNT 64 | |
89 | #define CONFIG_SYS_NAND_PAGE_SIZE 2048 | |
90 | #define CONFIG_SYS_NAND_OOBSIZE 64 | |
91 | #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) | |
92 | #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS | |
93 | #define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, \ | |
94 | 13, 14, 16, 17, 18, 19, 20, 21, 22, \ | |
95 | 23, 24, 25, 26, 27, 28, 30, 31, 32, \ | |
96 | 33, 34, 35, 36, 37, 38, 39, 40, 41, \ | |
97 | 42, 44, 45, 46, 47, 48, 49, 50, 51, \ | |
98 | 52, 53, 54, 55, 56} | |
99 | ||
100 | #define CONFIG_SYS_NAND_ECCSIZE 512 | |
101 | #define CONFIG_SYS_NAND_ECCBYTES 13 | |
102 | #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW_DETECTION_SW | |
103 | #define CONFIG_BCH | |
104 | #define CONFIG_SYS_NAND_MAX_OOBFREE 2 | |
105 | #define CONFIG_SYS_NAND_MAX_ECCPOS 56 | |
106 | #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 | |
107 | #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ | |
108 | #define CONFIG_MTD_PARTITIONS /* required for UBI partition support */ | |
109 | #define MTDIDS_DEFAULT "nand0=omap2-nand.0" | |
12262340 AF |
110 | #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:"\ |
111 | "512k(MLO),"\ | |
112 | "1792k(u-boot),"\ | |
113 | "128k(spl-os)," \ | |
114 | "128k(u-boot-env),"\ | |
115 | "6m(kernel),-(fs)" | |
49c7303f | 116 | #endif |
86887f8e PB |
117 | |
118 | /* Environment information */ | |
86887f8e | 119 | |
86887f8e | 120 | #define CONFIG_PREBOOT \ |
86887f8e | 121 | "setenv preboot;" \ |
49c7303f | 122 | "nand unlock;" \ |
86887f8e PB |
123 | "saveenv;" |
124 | ||
86887f8e | 125 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
bb5854c4 | 126 | DEFAULT_LINUX_BOOT_ENV \ |
86887f8e PB |
127 | "mtdids=" MTDIDS_DEFAULT "\0" \ |
128 | "mtdparts=" MTDPARTS_DEFAULT "\0" \ | |
129 | "mmcdev=0\0" \ | |
49c7303f AF |
130 | "mmcroot=/dev/mmcblk0p2 rw\0" \ |
131 | "mmcrootfstype=ext4 rootwait\0" \ | |
a094c921 AF |
132 | "nandroot=ubi0:rootfs rw ubi.mtd=fs noinitrd\0" \ |
133 | "nandrootfstype=ubifs rootwait\0" \ | |
66968110 | 134 | "autoboot=mmc dev ${mmcdev}; if mmc rescan; then " \ |
86887f8e PB |
135 | "if run loadbootscript; then " \ |
136 | "run bootscript; " \ | |
137 | "else " \ | |
138 | "run defaultboot;" \ | |
139 | "fi; " \ | |
140 | "else run defaultboot; fi\0" \ | |
141 | "defaultboot=run mmcramboot\0" \ | |
142 | "consoledevice=ttyO0\0" \ | |
86887f8e PB |
143 | "setconsole=setenv console ${consoledevice},${baudrate}n8\0" \ |
144 | "dump_bootargs=echo 'Bootargs: '; echo $bootargs\0" \ | |
145 | "rotation=0\0" \ | |
146 | "vrfb_arg=if itest ${rotation} -ne 0; then " \ | |
147 | "setenv bootargs ${bootargs} omapfb.vrfb=y " \ | |
148 | "omapfb.rotate=${rotation}; " \ | |
149 | "fi\0" \ | |
49c7303f | 150 | "optargs=ignore_loglevel early_printk no_console_suspend\0" \ |
476e16e8 AF |
151 | "common_bootargs=run setconsole; setenv bootargs " \ |
152 | "${bootargs} "\ | |
153 | "console=${console} " \ | |
154 | "${mtdparts} "\ | |
155 | "${optargs}; " \ | |
86887f8e | 156 | "run vrfb_arg\0" \ |
bb5854c4 | 157 | "loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr\0" \ |
86887f8e PB |
158 | "bootscript=echo 'Running bootscript from mmc ...'; " \ |
159 | "source ${loadaddr}\0" \ | |
476e16e8 AF |
160 | "loadimage=mmc rescan; " \ |
161 | "load mmc ${mmcdev} ${loadaddr} ${bootfile}\0" \ | |
86887f8e | 162 | "ramdisksize=64000\0" \ |
86887f8e | 163 | "ramdiskimage=rootfs.ext2.gz.uboot\0" \ |
49c7303f | 164 | "loadramdisk=mmc rescan; " \ |
bb5854c4 | 165 | "load mmc ${mmcdev} ${rdaddr} ${ramdiskimage}\0" \ |
476e16e8 | 166 | "ramargs=setenv bootargs "\ |
86887f8e | 167 | "root=/dev/ram rw ramdisk_size=${ramdisksize}\0" \ |
476e16e8 AF |
168 | "mmcargs=setenv bootargs "\ |
169 | "root=${mmcroot} rootfstype=${mmcrootfstype}\0" \ | |
170 | "nandargs=setenv bootargs "\ | |
a094c921 AF |
171 | "root=${nandroot} " \ |
172 | "rootfstype=${nandrootfstype}\0" \ | |
476e16e8 AF |
173 | "nfsargs=setenv serverip ${tftpserver}; " \ |
174 | "setenv bootargs root=/dev/nfs " \ | |
760d1afd AF |
175 | "nfsroot=${nfsrootpath} " \ |
176 | "ip=${ipaddr}:${tftpserver}:${gatewayip}:${netmask}::eth0:off\0" \ | |
177 | "nfsrootpath=/opt/nfs-exports/omap\0" \ | |
178 | "autoload=no\0" \ | |
bb5854c4 AF |
179 | "loadfdt=mmc rescan; " \ |
180 | "load mmc ${mmcdev} ${fdtaddr} ${fdtimage}\0" \ | |
476e16e8 | 181 | "mmcbootcommon=echo Booting with DT from mmc${mmcdev} ...; " \ |
49c7303f AF |
182 | "run mmcargs; " \ |
183 | "run common_bootargs; " \ | |
184 | "run dump_bootargs; " \ | |
476e16e8 AF |
185 | "run loadimage; " \ |
186 | "run loadfdt;\0 " \ | |
187 | "mmcbootz=setenv bootfile zImage; " \ | |
188 | "run mmcbootcommon; "\ | |
49c7303f | 189 | "bootz ${loadaddr} - ${fdtaddr}\0" \ |
476e16e8 AF |
190 | "mmcboot=setenv bootfile uImage; "\ |
191 | "run mmcbootcommon; "\ | |
192 | "bootm ${loadaddr} - ${fdtaddr}\0" \ | |
193 | "mmcrambootcommon=echo 'Booting kernel from MMC w/ramdisk...'; " \ | |
86887f8e PB |
194 | "run ramargs; " \ |
195 | "run common_bootargs; " \ | |
196 | "run dump_bootargs; " \ | |
476e16e8 | 197 | "run loadimage; " \ |
bb5854c4 | 198 | "run loadfdt; " \ |
476e16e8 AF |
199 | "run loadramdisk\0" \ |
200 | "mmcramboot=setenv bootfile uImage; " \ | |
201 | "run mmcrambootcommon; " \ | |
202 | "bootm ${loadaddr} ${rdaddr} ${fdtimage}\0" \ | |
203 | "mmcrambootz=setenv bootfile zImage; " \ | |
204 | "run mmcrambootcommon; " \ | |
205 | "bootz ${loadaddr} ${rdaddr} ${fdtimage}\0" \ | |
49c7303f AF |
206 | "tftpboot=echo 'Booting kernel/ramdisk rootfs from tftp...'; " \ |
207 | "run ramargs; " \ | |
208 | "run common_bootargs; " \ | |
209 | "run dump_bootargs; " \ | |
760d1afd | 210 | "tftpboot ${loadaddr} ${zimage}; " \ |
bb5854c4 AF |
211 | "tftpboot ${rdaddr} ${ramdiskimage}; " \ |
212 | "bootm ${loadaddr} ${rdaddr}\0" \ | |
760d1afd AF |
213 | "tftpbootz=echo 'Booting kernel NFS rootfs...'; " \ |
214 | "dhcp;" \ | |
215 | "run nfsargs;" \ | |
216 | "run common_bootargs;" \ | |
217 | "run dump_bootargs;" \ | |
218 | "tftpboot $loadaddr zImage;" \ | |
476e16e8 AF |
219 | "bootz $loadaddr\0" \ |
220 | "nandbootcommon=echo 'Booting kernel from NAND...';" \ | |
221 | "nand unlock;" \ | |
222 | "run nandargs;" \ | |
223 | "run common_bootargs;" \ | |
224 | "run dump_bootargs;" \ | |
225 | "nand read ${loadaddr} kernel;" \ | |
226 | "nand read ${fdtaddr} spl-os;\0" \ | |
227 | "nandbootz=run nandbootcommon; "\ | |
228 | "bootz ${loadaddr} - ${fdtaddr}\0"\ | |
229 | "nandboot=run nandbootcommon; "\ | |
230 | "bootm ${loadaddr} - ${fdtaddr}\0"\ | |
86887f8e PB |
231 | |
232 | #define CONFIG_BOOTCOMMAND \ | |
233 | "run autoboot" | |
234 | ||
49c7303f | 235 | /* Miscellaneous configurable options */ |
7b77b1f6 | 236 | |
86887f8e PB |
237 | /* memtest works on */ |
238 | #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) | |
239 | #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ | |
240 | 0x01F00000) /* 31MB */ | |
241 | ||
49c7303f | 242 | /* FLASH and environment organization */ |
86887f8e PB |
243 | |
244 | /* **** PISMO SUPPORT *** */ | |
86887f8e | 245 | #if defined(CONFIG_CMD_NAND) |
222a3113 | 246 | #define CONFIG_SYS_FLASH_BASE NAND_BASE |
86887f8e PB |
247 | #endif |
248 | ||
249 | /* Monitor at start of flash */ | |
250 | #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE | |
251 | ||
49c7303f AF |
252 | #define CONFIG_ENV_IS_IN_NAND 1 |
253 | #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ | |
86887f8e PB |
254 | #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */ |
255 | ||
86887f8e | 256 | #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ |
49c7303f AF |
257 | #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET |
258 | #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET | |
86887f8e | 259 | |
49c7303f | 260 | /* SMSC922x Ethernet */ |
86887f8e | 261 | #if defined(CONFIG_CMD_NET) |
86887f8e | 262 | #define CONFIG_SMC911X |
1e1acc76 | 263 | #define CONFIG_SMC911X_32_BIT |
86887f8e | 264 | #define CONFIG_SMC911X_BASE 0x08000000 |
86887f8e PB |
265 | #endif /* (CONFIG_CMD_NET) */ |
266 | ||
49c7303f AF |
267 | /* Defines for SPL */ |
268 | ||
269 | #define CONFIG_SPL_OMAP3_ID_NAND | |
270 | ||
271 | /* NAND: SPL falcon mode configs */ | |
272 | #ifdef CONFIG_SPL_OS_BOOT | |
273 | #define CONFIG_CMD_SPL_NAND_OFS 0x240000 | |
274 | #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000 | |
275 | #define CONFIG_CMD_SPL_WRITE_SIZE 0x2000 | |
276 | #endif | |
277 | ||
86887f8e | 278 | #endif /* __CONFIG_H */ |