]> git.ipfire.org Git - people/ms/u-boot.git/blame - include/configs/pb1x00.h
common: Add DISPLAY_BOARDINFO
[people/ms/u-boot.git] / include / configs / pb1x00.h
CommitLineData
265817c7
WD
1/*
2 * (C) Copyright 2003
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
1a459660 5 * SPDX-License-Identifier: GPL-2.0+
265817c7
WD
6 */
7
8/*
9 * This file contains the configuration parameters for the dbau1x00 board.
10 */
11
12#ifndef __CONFIG_H
13#define __CONFIG_H
14
265817c7 15#define CONFIG_PB1X00 1
8bde63eb 16#define CONFIG_SOC_AU1X00 1 /* alchemy series cpu */
265817c7
WD
17
18#ifdef CONFIG_PB1000
8bde63eb 19#define CONFIG_SOC_AU1000 1
265817c7
WD
20#else
21#ifdef CONFIG_PB1100
8bde63eb 22#define CONFIG_SOC_AU1100 1
265817c7
WD
23#else
24#ifdef CONFIG_PB1500
8bde63eb 25#define CONFIG_SOC_AU1500 1
265817c7
WD
26#else
27#error "No valid board set"
28#endif
29#endif
30#endif
31
265817c7
WD
32
33#define CONFIG_BAUDRATE 115200
34
265817c7
WD
35#define CONFIG_TIMESTAMP /* Print image info with timestamp */
36#undef CONFIG_BOOTARGS
37
38#define CONFIG_EXTRA_ENV_SETTINGS \
fe126d8b
WD
39 "addmisc=setenv bootargs ${bootargs} " \
40 "console=ttyS0,${baudrate} " \
265817c7
WD
41 "panic=1\0" \
42 "bootfile=/vmlinux.img\0" \
fe126d8b 43 "load=tftp 80500000 ${u-boot}\0" \
265817c7
WD
44 ""
45/* Boot from NFS root */
fe126d8b 46#define CONFIG_BOOTCOMMAND "bootp; setenv bootargs root=/dev/nfs rw nfsroot=${serverip}:${rootpath} ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off; bootm"
265817c7
WD
47
48/*
49 * Miscellaneous configurable options
50 */
6d0f6bcf 51#define CONFIG_SYS_LONGHELP /* undef to save memory */
6d0f6bcf
JCPV
52#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
53#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
54#define CONFIG_SYS_MAXARGS 16 /* max number of command args*/
265817c7 55
6d0f6bcf 56#define CONFIG_SYS_MALLOC_LEN 128*1024
265817c7 57
6d0f6bcf 58#define CONFIG_SYS_BOOTPARAMS_LEN 128*1024
265817c7 59
6d0f6bcf 60#define CONFIG_SYS_MIPS_TIMER_FREQ 396000000
a55d4817 61
6d0f6bcf 62#define CONFIG_SYS_SDRAM_BASE 0x80000000 /* Cached addr */
265817c7 63
6d0f6bcf 64#define CONFIG_SYS_LOAD_ADDR 0x81000000 /* default load address */
265817c7 65
6d0f6bcf
JCPV
66#define CONFIG_SYS_MEMTEST_START 0x80100000
67#undef CONFIG_SYS_MEMTEST_START
68#define CONFIG_SYS_MEMTEST_START 0x80200000
69#define CONFIG_SYS_MEMTEST_END 0x83800000
265817c7
WD
70
71/*-----------------------------------------------------------------------
72 * FLASH and environment organization
73 */
6d0f6bcf
JCPV
74#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of memory banks */
75#define CONFIG_SYS_MAX_FLASH_SECT (128) /* max number of sectors on one chip */
265817c7
WD
76
77#define PHYS_FLASH_1 0xbec00000 /* Flash Bank #1 */
78#define PHYS_FLASH_2 0xbfc00000 /* Flash Bank #2 */
79
14d0a02a 80#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
6d0f6bcf 81#define CONFIG_SYS_MONITOR_LEN (192 << 10)
265817c7 82
6d0f6bcf 83#define CONFIG_SYS_INIT_SP_OFFSET 0x4000000
265817c7
WD
84
85/* We boot from this flash, selected with dip switch */
6d0f6bcf 86#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_2
265817c7
WD
87
88/* timeout values are in ticks */
6d0f6bcf
JCPV
89#define CONFIG_SYS_FLASH_ERASE_TOUT (2 * CONFIG_SYS_HZ) /* Timeout for Flash Erase */
90#define CONFIG_SYS_FLASH_WRITE_TOUT (2 * CONFIG_SYS_HZ) /* Timeout for Flash Write */
265817c7 91
93f6d725 92#define CONFIG_ENV_IS_NOWHERE 1
265817c7
WD
93
94/* Address and size of Primary Environment Sector */
0e8d1586
JCPV
95#define CONFIG_ENV_ADDR 0xB0030000
96#define CONFIG_ENV_SIZE 0x10000
265817c7
WD
97
98#define CONFIG_FLASH_16BIT
99
100#define CONFIG_NR_DRAM_BANKS 2
101
265817c7
WD
102#define CONFIG_MEMSIZE_IN_BYTES
103
265817c7
WD
104/*---USB -------------------------------------------*/
105#if 0
106#define CONFIG_USB_OHCI
265817c7 107#define CONFIG_DOS_PARTITION
265817c7
WD
108#endif
109
110/*---ATA PCMCIA ------------------------------------*/
111#if 0
6d0f6bcf
JCPV
112#define CONFIG_SYS_PCMCIA_MEM_SIZE 0x4000000 /* Offset to slot 1 FIXME!!! */
113#define CONFIG_SYS_PCMCIA_MEM_ADDR 0x20000000
265817c7
WD
114#define CONFIG_PCMCIA_SLOT_A
115
116#define CONFIG_ATAPI 1
117#define CONFIG_MAC_PARTITION 1
118
119/* We run CF in "true ide" mode or a harddrive via pcmcia */
120#define CONFIG_IDE_PCMCIA 1
121
122/* We only support one slot for now */
6d0f6bcf
JCPV
123#define CONFIG_SYS_IDE_MAXBUS 1 /* max. 1 IDE bus */
124#define CONFIG_SYS_IDE_MAXDEVICE 1 /* max. 1 drive per IDE bus */
265817c7
WD
125
126#undef CONFIG_IDE_LED /* LED for ide not supported */
127#undef CONFIG_IDE_RESET /* reset for ide not supported */
128
6d0f6bcf 129#define CONFIG_SYS_ATA_IDE0_OFFSET 0x0000
265817c7 130
6d0f6bcf 131#define CONFIG_SYS_ATA_BASE_ADDR CONFIG_SYS_PCMCIA_MEM_ADDR
265817c7
WD
132
133/* Offset for data I/O */
6d0f6bcf 134#define CONFIG_SYS_ATA_DATA_OFFSET 8
265817c7
WD
135
136/* Offset for normal register accesses */
6d0f6bcf 137#define CONFIG_SYS_ATA_REG_OFFSET 0
265817c7
WD
138
139/* Offset for alternate registers */
6d0f6bcf 140#define CONFIG_SYS_ATA_ALT_OFFSET 0x0100
265817c7
WD
141
142#endif
265817c7 143
079a136c
JL
144/*
145 * BOOTP options
146 */
147#define CONFIG_BOOTP_BOOTFILESIZE
148#define CONFIG_BOOTP_BOOTPATH
149#define CONFIG_BOOTP_GATEWAY
150#define CONFIG_BOOTP_HOSTNAME
151
26a34560
JL
152/*
153 * Command line configuration.
154 */
26a34560 155
26a34560 156#undef CONFIG_CMD_IDE
26a34560 157#undef CONFIG_CMD_BEDBUG
265817c7
WD
158
159#endif /* __CONFIG_H */