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1/*
2 * (C) Copyright 2003
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
1a459660 5 * SPDX-License-Identifier: GPL-2.0+
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6 */
7
8/*
9 * This file contains the configuration parameters for the dbau1x00 board.
10 */
11
12#ifndef __CONFIG_H
13#define __CONFIG_H
14
265817c7 15#define CONFIG_PB1X00 1
8bde63eb 16#define CONFIG_SOC_AU1X00 1 /* alchemy series cpu */
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17
18#ifdef CONFIG_PB1000
8bde63eb 19#define CONFIG_SOC_AU1000 1
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20#else
21#ifdef CONFIG_PB1100
8bde63eb 22#define CONFIG_SOC_AU1100 1
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23#else
24#ifdef CONFIG_PB1500
8bde63eb 25#define CONFIG_SOC_AU1500 1
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26#else
27#error "No valid board set"
28#endif
29#endif
30#endif
31
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32#define CONFIG_TIMESTAMP /* Print image info with timestamp */
33#undef CONFIG_BOOTARGS
34
35#define CONFIG_EXTRA_ENV_SETTINGS \
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36 "addmisc=setenv bootargs ${bootargs} " \
37 "console=ttyS0,${baudrate} " \
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38 "panic=1\0" \
39 "bootfile=/vmlinux.img\0" \
fe126d8b 40 "load=tftp 80500000 ${u-boot}\0" \
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41 ""
42/* Boot from NFS root */
fe126d8b 43#define CONFIG_BOOTCOMMAND "bootp; setenv bootargs root=/dev/nfs rw nfsroot=${serverip}:${rootpath} ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off; bootm"
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44
45/*
46 * Miscellaneous configurable options
47 */
6d0f6bcf 48#define CONFIG_SYS_LONGHELP /* undef to save memory */
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49#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
50#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
51#define CONFIG_SYS_MAXARGS 16 /* max number of command args*/
265817c7 52
6d0f6bcf 53#define CONFIG_SYS_MALLOC_LEN 128*1024
265817c7 54
6d0f6bcf 55#define CONFIG_SYS_BOOTPARAMS_LEN 128*1024
265817c7 56
6d0f6bcf 57#define CONFIG_SYS_MIPS_TIMER_FREQ 396000000
a55d4817 58
6d0f6bcf 59#define CONFIG_SYS_SDRAM_BASE 0x80000000 /* Cached addr */
265817c7 60
6d0f6bcf 61#define CONFIG_SYS_LOAD_ADDR 0x81000000 /* default load address */
265817c7 62
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63#define CONFIG_SYS_MEMTEST_START 0x80100000
64#undef CONFIG_SYS_MEMTEST_START
65#define CONFIG_SYS_MEMTEST_START 0x80200000
66#define CONFIG_SYS_MEMTEST_END 0x83800000
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67
68/*-----------------------------------------------------------------------
69 * FLASH and environment organization
70 */
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71#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of memory banks */
72#define CONFIG_SYS_MAX_FLASH_SECT (128) /* max number of sectors on one chip */
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73
74#define PHYS_FLASH_1 0xbec00000 /* Flash Bank #1 */
75#define PHYS_FLASH_2 0xbfc00000 /* Flash Bank #2 */
76
14d0a02a 77#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
6d0f6bcf 78#define CONFIG_SYS_MONITOR_LEN (192 << 10)
265817c7 79
6d0f6bcf 80#define CONFIG_SYS_INIT_SP_OFFSET 0x4000000
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81
82/* We boot from this flash, selected with dip switch */
6d0f6bcf 83#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_2
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84
85/* timeout values are in ticks */
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86#define CONFIG_SYS_FLASH_ERASE_TOUT (2 * CONFIG_SYS_HZ) /* Timeout for Flash Erase */
87#define CONFIG_SYS_FLASH_WRITE_TOUT (2 * CONFIG_SYS_HZ) /* Timeout for Flash Write */
265817c7 88
93f6d725 89#define CONFIG_ENV_IS_NOWHERE 1
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90
91/* Address and size of Primary Environment Sector */
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92#define CONFIG_ENV_ADDR 0xB0030000
93#define CONFIG_ENV_SIZE 0x10000
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94
95#define CONFIG_FLASH_16BIT
96
97#define CONFIG_NR_DRAM_BANKS 2
98
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99#define CONFIG_MEMSIZE_IN_BYTES
100
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101/*---USB -------------------------------------------*/
102#if 0
103#define CONFIG_USB_OHCI
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104#endif
105
106/*---ATA PCMCIA ------------------------------------*/
107#if 0
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108#define CONFIG_SYS_PCMCIA_MEM_SIZE 0x4000000 /* Offset to slot 1 FIXME!!! */
109#define CONFIG_SYS_PCMCIA_MEM_ADDR 0x20000000
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110#define CONFIG_PCMCIA_SLOT_A
111
112#define CONFIG_ATAPI 1
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113
114/* We run CF in "true ide" mode or a harddrive via pcmcia */
115#define CONFIG_IDE_PCMCIA 1
116
117/* We only support one slot for now */
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118#define CONFIG_SYS_IDE_MAXBUS 1 /* max. 1 IDE bus */
119#define CONFIG_SYS_IDE_MAXDEVICE 1 /* max. 1 drive per IDE bus */
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120
121#undef CONFIG_IDE_LED /* LED for ide not supported */
122#undef CONFIG_IDE_RESET /* reset for ide not supported */
123
6d0f6bcf 124#define CONFIG_SYS_ATA_IDE0_OFFSET 0x0000
265817c7 125
6d0f6bcf 126#define CONFIG_SYS_ATA_BASE_ADDR CONFIG_SYS_PCMCIA_MEM_ADDR
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127
128/* Offset for data I/O */
6d0f6bcf 129#define CONFIG_SYS_ATA_DATA_OFFSET 8
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130
131/* Offset for normal register accesses */
6d0f6bcf 132#define CONFIG_SYS_ATA_REG_OFFSET 0
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133
134/* Offset for alternate registers */
6d0f6bcf 135#define CONFIG_SYS_ATA_ALT_OFFSET 0x0100
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136
137#endif
265817c7 138
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139/*
140 * BOOTP options
141 */
142#define CONFIG_BOOTP_BOOTFILESIZE
143#define CONFIG_BOOTP_BOOTPATH
144#define CONFIG_BOOTP_GATEWAY
145#define CONFIG_BOOTP_HOSTNAME
146
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147/*
148 * Command line configuration.
149 */
26a34560 150
26a34560 151#undef CONFIG_CMD_IDE
26a34560 152#undef CONFIG_CMD_BEDBUG
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153
154#endif /* __CONFIG_H */