include/configs/pb1x00.h

   1 /*
   2  * (C) Copyright 2003
   3  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   4  *
   5  * SPDX-License-Identifier:     GPL-2.0+
   6  */
   7
   8 /*
   9  * This file contains the configuration parameters for the dbau1x00 board.
  10  */
  11
  12 #ifndef __CONFIG_H
  13 #define __CONFIG_H
  14
  15 #define CONFIG_PB1X00           1
  16 #define CONFIG_SOC_AU1X00       1  /* alchemy series cpu */
  17
  18 #ifdef CONFIG_PB1000
  19 #define CONFIG_SOC_AU1000       1
  20 #else
  21 #ifdef CONFIG_PB1100
  22 #define CONFIG_SOC_AU1100       1
  23 #else
  24 #ifdef CONFIG_PB1500
  25 #define CONFIG_SOC_AU1500       1
  26 #else
  27 #error "No valid board set"
  28 #endif
  29 #endif
  30 #endif
  31
  32 #define CONFIG_TIMESTAMP                /* Print image info with timestamp */
  33 #undef  CONFIG_BOOTARGS
  34
  35 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
  36         "addmisc=setenv bootargs ${bootargs} "                          \
  37                 "console=ttyS0,${baudrate} "                            \
  38                 "panic=1\0"                                             \
  39         "bootfile=/vmlinux.img\0"                               \
  40         "load=tftp 80500000 ${u-boot}\0"                                \
  41         ""
  42 /* Boot from NFS root */
  43 #define CONFIG_BOOTCOMMAND      "bootp; setenv bootargs root=/dev/nfs rw nfsroot=${serverip}:${rootpath} ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off; bootm"
  44
  45 /*
  46  * Miscellaneous configurable options
  47  */
  48 #define CONFIG_SYS_LONGHELP                             /* undef to save memory      */
  49 #define CONFIG_SYS_CBSIZE               256             /* Console I/O Buffer Size   */
  50 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)  /* Print Buffer Size */
  51 #define CONFIG_SYS_MAXARGS              16              /* max number of command args*/
  52
  53 #define CONFIG_SYS_MALLOC_LEN           128*1024
  54
  55 #define CONFIG_SYS_BOOTPARAMS_LEN       128*1024
  56
  57 #define CONFIG_SYS_MIPS_TIMER_FREQ      396000000
  58
  59 #define CONFIG_SYS_SDRAM_BASE           0x80000000     /* Cached addr */
  60
  61 #define CONFIG_SYS_LOAD_ADDR            0x81000000     /* default load address  */
  62
  63 #define CONFIG_SYS_MEMTEST_START        0x80100000
  64 #undef CONFIG_SYS_MEMTEST_START
  65 #define CONFIG_SYS_MEMTEST_START       0x80200000
  66 #define CONFIG_SYS_MEMTEST_END          0x83800000
  67
  68 /*-----------------------------------------------------------------------
  69  * FLASH and environment organization
  70  */
  71 #define CONFIG_SYS_MAX_FLASH_BANKS      2       /* max number of memory banks */
  72 #define CONFIG_SYS_MAX_FLASH_SECT       (128)   /* max number of sectors on one chip */
  73
  74 #define PHYS_FLASH_1            0xbec00000 /* Flash Bank #1 */
  75 #define PHYS_FLASH_2            0xbfc00000 /* Flash Bank #2 */
  76
  77 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
  78 #define CONFIG_SYS_MONITOR_LEN          (192 << 10)
  79
  80 #define CONFIG_SYS_INIT_SP_OFFSET       0x4000000
  81
  82 /* We boot from this flash, selected with dip switch */
  83 #define CONFIG_SYS_FLASH_BASE           PHYS_FLASH_2
  84
  85 /* timeout values are in ticks */
  86 #define CONFIG_SYS_FLASH_ERASE_TOUT     (2 * CONFIG_SYS_HZ) /* Timeout for Flash Erase */
  87 #define CONFIG_SYS_FLASH_WRITE_TOUT     (2 * CONFIG_SYS_HZ) /* Timeout for Flash Write */
  88
  89 #define CONFIG_ENV_IS_NOWHERE   1
  90
  91 /* Address and size of Primary Environment Sector       */
  92 #define CONFIG_ENV_ADDR         0xB0030000
  93 #define CONFIG_ENV_SIZE         0x10000
  94
  95 #define CONFIG_FLASH_16BIT
  96
  97 #define CONFIG_NR_DRAM_BANKS    2
  98
  99 #define CONFIG_MEMSIZE_IN_BYTES
 100
 101 /*---USB -------------------------------------------*/
 102 #if 0
 103 #define CONFIG_USB_OHCI
 104 #endif
 105
 106 /*---ATA PCMCIA ------------------------------------*/
 107 #if 0
 108 #define CONFIG_SYS_PCMCIA_MEM_SIZE 0x4000000 /* Offset to slot 1 FIXME!!! */
 109 #define CONFIG_SYS_PCMCIA_MEM_ADDR 0x20000000
 110 #define CONFIG_PCMCIA_SLOT_A
 111
 112 #define CONFIG_ATAPI 1
 113
 114 /* We run CF in "true ide" mode or a harddrive via pcmcia */
 115 #define CONFIG_IDE_PCMCIA 1
 116
 117 /* We only support one slot for now */
 118 #define CONFIG_SYS_IDE_MAXBUS           1       /* max. 1 IDE bus               */
 119 #define CONFIG_SYS_IDE_MAXDEVICE        1       /* max. 1 drive per IDE bus     */
 120
 121 #undef  CONFIG_IDE_LED                  /* LED   for ide not supported  */
 122 #undef  CONFIG_IDE_RESET                /* reset for ide not supported  */
 123
 124 #define CONFIG_SYS_ATA_IDE0_OFFSET      0x0000
 125
 126 #define CONFIG_SYS_ATA_BASE_ADDR       CONFIG_SYS_PCMCIA_MEM_ADDR
 127
 128 /* Offset for data I/O                  */
 129 #define CONFIG_SYS_ATA_DATA_OFFSET     8
 130
 131 /* Offset for normal register accesses  */
 132 #define CONFIG_SYS_ATA_REG_OFFSET      0
 133
 134 /* Offset for alternate registers       */
 135 #define CONFIG_SYS_ATA_ALT_OFFSET      0x0100
 136
 137 #endif
 138
 139 /*
 140  * BOOTP options
 141  */
 142 #define CONFIG_BOOTP_BOOTFILESIZE
 143 #define CONFIG_BOOTP_BOOTPATH
 144 #define CONFIG_BOOTP_GATEWAY
 145 #define CONFIG_BOOTP_HOSTNAME
 146
 147 /*
 148  * Command line configuration.
 149  */
 150
 151 #undef CONFIG_CMD_IDE
 152 #undef CONFIG_CMD_BEDBUG
 153
 154 #endif  /* __CONFIG_H */