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17aa548c SG |
1 | /* |
2 | * (C) Copyright 2015 Google, Inc | |
3 | * | |
4 | * SPDX-License-Identifier: GPL-2.0+ | |
5 | */ | |
6 | ||
7 | #ifndef __CONFIG_RK3288_COMMON_H | |
8 | #define __CONFIG_RK3288_COMMON_H | |
9 | ||
10 | #include <asm/arch/hardware.h> | |
7f35bbb9 | 11 | #include "rockchip-common.h" |
17aa548c | 12 | |
5a4a90f6 | 13 | #define CONFIG_SKIP_LOWLEVEL_INIT_ONLY |
17aa548c | 14 | #define CONFIG_NR_DRAM_BANKS 1 |
17aa548c SG |
15 | #define CONFIG_SYS_MALLOC_LEN (32 << 20) |
16 | #define CONFIG_SYS_CBSIZE 1024 | |
17aa548c SG |
17 | |
18 | #define CONFIG_SYS_TIMER_RATE (24 * 1000 * 1000) | |
cc2244b8 | 19 | #define CONFIG_SYS_TIMER_BASE 0xff810020 /* TIMER7 */ |
20 | #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8) | |
17aa548c | 21 | |
17aa548c | 22 | #define CONFIG_SYS_NS16550_MEM32 |
17aa548c | 23 | |
ee14d29d | 24 | #ifdef CONFIG_SPL_ROCKCHIP_BACK_TO_BROM |
b47ea792 | 25 | /* Bootrom will load u-boot binary to 0x0 once return from SPL */ |
b47ea792 | 26 | #endif |
17aa548c SG |
27 | #define CONFIG_SYS_INIT_SP_ADDR 0x00100000 |
28 | #define CONFIG_SYS_LOAD_ADDR 0x00800800 | |
29 | #define CONFIG_SPL_STACK 0xff718000 | |
532cb7f5 JT |
30 | #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_TPL_BOOTROM_SUPPORT) |
31 | # define CONFIG_SPL_TEXT_BASE 0x0 | |
32 | #else | |
a33fee15 | 33 | # define CONFIG_SPL_TEXT_BASE 0xff704000 |
532cb7f5 | 34 | #endif |
17aa548c SG |
35 | |
36 | /* MMC/SD IP block */ | |
17aa548c SG |
37 | #define CONFIG_BOUNCE_BUFFER |
38 | ||
17aa548c | 39 | /* RAW SD card / eMMC locations. */ |
17aa548c SG |
40 | #define CONFIG_SYS_SPI_U_BOOT_OFFS (128 << 10) |
41 | ||
42 | /* FAT sd card locations. */ | |
43 | #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 | |
44 | #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" | |
45 | ||
17aa548c SG |
46 | #define CONFIG_SYS_SDRAM_BASE 0 |
47 | #define CONFIG_NR_DRAM_BANKS 1 | |
48 | #define SDRAM_BANK_SIZE (2UL << 30) | |
6d1970fa | 49 | #define SDRAM_MAX_SIZE 0xfe000000 |
17aa548c SG |
50 | |
51 | #define CONFIG_SPI_FLASH | |
52 | #define CONFIG_SPI | |
17aa548c SG |
53 | #define CONFIG_SF_DEFAULT_SPEED 20000000 |
54 | ||
1743d0ba | 55 | #ifndef CONFIG_SPL_BUILD |
266c8fad | 56 | /* usb otg */ |
266c8fad | 57 | |
b9f9339b | 58 | /* usb mass storage */ |
b9f9339b XZ |
59 | #define CONFIG_CMD_USB_MASS_STORAGE |
60 | ||
f57f35a8 | 61 | /* usb host support */ |
6460fc42 SS |
62 | #define ENV_MEM_LAYOUT_SETTINGS \ |
63 | "scriptaddr=0x00000000\0" \ | |
64 | "pxefile_addr_r=0x00100000\0" \ | |
65 | "fdt_addr_r=0x01f00000\0" \ | |
66 | "kernel_addr_r=0x02000000\0" \ | |
67 | "ramdisk_addr_r=0x04000000\0" | |
68 | ||
6460fc42 SS |
69 | #include <config_distro_bootcmd.h> |
70 | ||
60169826 | 71 | /* Linux fails to load the fdt if it's loaded above 256M on a Rock 2 board, so |
6460fc42 SS |
72 | * limit the fdt reallocation to that */ |
73 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
60169826 SP |
74 | "fdt_high=0x0fffffff\0" \ |
75 | "initrd_high=0x0fffffff\0" \ | |
6ead8bd7 | 76 | "partitions=" PARTS_DEFAULT \ |
6460fc42 | 77 | ENV_MEM_LAYOUT_SETTINGS \ |
27a1961d | 78 | ROCKCHIP_DEVICE_SETTINGS \ |
6460fc42 | 79 | BOOTENV |
17aa548c SG |
80 | #endif |
81 | ||
67171e13 JC |
82 | #define CONFIG_PREBOOT |
83 | ||
17aa548c | 84 | #endif |