[people/ms/u-boot.git] / include / configs / sama5d3xek.h

/*
 * Configuation settings for the SAMA5D3xEK board.
 *
 * Copyright (C) 2012 - 2013 Atmel
 *
 * based on at91sam9m10g45ek.h by:
 * Stelian Pop <stelian@popies.net>
 * Lead Tech Design <www.leadtechdesign.com>
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#ifndef __CONFIG_H
#define __CONFIG_H

#include <asm/hardware.h>

#define CONFIG_SYS_TEXT_BASE		0x26f00000

/* ARM asynchronous clock */
#define CONFIG_SYS_AT91_SLOW_CLOCK      32768
#define CONFIG_SYS_AT91_MAIN_CLOCK      12000000 /* from 12 MHz crystal */
#define CONFIG_SYS_HZ		        1000

#define CONFIG_AT91FAMILY
#define CONFIG_ARCH_CPU_INIT

#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_DISPLAY_CPUINFO

#define CONFIG_CMD_BOOTZ
#define CONFIG_OF_LIBFDT		/* Device Tree support */

/* general purpose I/O */
#define CONFIG_AT91_GPIO

/* serial console */
#define CONFIG_ATMEL_USART
#define CONFIG_USART_BASE		ATMEL_BASE_DBGU
#define	CONFIG_USART_ID			ATMEL_ID_DBGU

/*
 * This needs to be defined for the OHCI code to work but it is defined as
 * ATMEL_ID_UHPHS in the CPU specific header files.
 */
#define ATMEL_ID_UHP			ATMEL_ID_UHPHS

/*
 * Specify the clock enable bit in the PMC_SCER register.
 */
#define ATMEL_PMC_UHP			AT91SAM926x_PMC_UHP

/* LCD */
#define CONFIG_LCD
#define LCD_BPP				LCD_COLOR16
#define LCD_OUTPUT_BPP                  24
#define CONFIG_LCD_LOGO
#undef LCD_TEST_PATTERN
#define CONFIG_LCD_INFO
#define CONFIG_LCD_INFO_BELOW_LOGO
#define CONFIG_SYS_WHITE_ON_BLACK
#define CONFIG_ATMEL_HLCD
#define CONFIG_ATMEL_LCD_RGB565
#define CONFIG_SYS_CONSOLE_IS_IN_ENV

/* board specific (not enough SRAM) */
#define CONFIG_SAMA5D3_LCD_BASE		0x23E00000

#define CONFIG_BOOTDELAY		3

/*
 * BOOTP options
 */
#define CONFIG_BOOTP_BOOTFILESIZE
#define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME

/* No NOR flash */
#define CONFIG_SYS_NO_FLASH

/*
 * Command line configuration.
 */
#include <config_cmd_default.h>
#undef CONFIG_CMD_FPGA
#undef CONFIG_CMD_IMI
#undef CONFIG_CMD_LOADS
#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP

/* SDRAM */
#define CONFIG_NR_DRAM_BANKS		1
#define CONFIG_SYS_SDRAM_BASE           ATMEL_BASE_DDRCS
#define CONFIG_SYS_SDRAM_SIZE		0x20000000

#define CONFIG_SYS_INIT_SP_ADDR \
	(CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)

/* SerialFlash */
#define CONFIG_CMD_SF

#ifdef CONFIG_CMD_SF
#define CONFIG_ATMEL_SPI
#define CONFIG_SPI_FLASH
#define CONFIG_SPI_FLASH_ATMEL
#define CONFIG_SF_DEFAULT_SPEED		30000000
#endif

/* NAND flash */
#define CONFIG_CMD_NAND

#ifdef CONFIG_CMD_NAND
#define CONFIG_NAND_MAX_CHIPS		1
#define CONFIG_NAND_ATMEL
#define CONFIG_SYS_MAX_NAND_DEVICE	1
#define CONFIG_SYS_NAND_BASE		ATMEL_BASE_CS3
/* our ALE is AD21 */
#define CONFIG_SYS_NAND_MASK_ALE	(1 << 21)
/* our CLE is AD22 */
#define CONFIG_SYS_NAND_MASK_CLE	(1 << 22)
#define CONFIG_SYS_NAND_ONFI_DETECTION
/* PMECC & PMERRLOC */
#define CONFIG_ATMEL_NAND_HWECC
#define CONFIG_ATMEL_NAND_HW_PMECC
#define CONFIG_PMECC_CAP		4
#define CONFIG_PMECC_SECTOR_SIZE	512
#define CONFIG_PMECC_INDEX_TABLE_OFFSET	ATMEL_PMECC_INDEX_OFFSET_512
#define CONFIG_CMD_NAND_TRIMFFS
#endif

/* Ethernet Hardware */
#define CONFIG_MACB
#define CONFIG_RMII
#define CONFIG_NET_MULTI
#define CONFIG_NET_RETRY_COUNT		20
#define CONFIG_MACB_SEARCH_PHY

/* MMC */
#define CONFIG_CMD_MMC

#ifdef CONFIG_CMD_MMC
#define CONFIG_MMC
#define CONFIG_GENERIC_MMC
#define CONFIG_GENERIC_ATMEL_MCI
#define ATMEL_BASE_MMCI			ATMEL_BASE_MCI0
#endif

/* USB */
#define CONFIG_CMD_USB

#ifdef CONFIG_CMD_USB
#define CONFIG_USB_ATMEL
#define CONFIG_USB_OHCI_NEW
#define CONFIG_SYS_USB_OHCI_CPU_INIT
#define CONFIG_SYS_USB_OHCI_REGS_BASE		ATMEL_BASE_OHCI
#define CONFIG_SYS_USB_OHCI_SLOT_NAME		"sama5d3"
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	3
#define CONFIG_DOS_PARTITION
#define CONFIG_USB_STORAGE
#endif

#if defined(CONFIG_CMD_USB) || defined(CONFIG_CMD_MMC)
#define CONFIG_CMD_FAT
#endif

#define CONFIG_SYS_LOAD_ADDR			0x22000000 /* load address */

#ifdef CONFIG_SYS_USE_SERIALFLASH
/* bootstrap + u-boot + env + linux in serial flash */
#define CONFIG_ENV_IS_IN_SPI_FLASH
#define CONFIG_ENV_OFFSET       0x5000
#define CONFIG_ENV_SIZE         0x3000
#define CONFIG_ENV_SECT_SIZE    0x1000
#define CONFIG_BOOTCOMMAND      "sf probe 0; " \
				"sf read 0x22000000 0x42000 0x300000; " \
				"bootm 0x22000000"
#elif CONFIG_SYS_USE_NANDFLASH
/* bootstrap + u-boot + env in nandflash */
#define CONFIG_ENV_IS_IN_NAND
#define CONFIG_ENV_OFFSET		0xc0000
#define CONFIG_ENV_OFFSET_REDUND	0x100000
#define CONFIG_ENV_SIZE			0x20000
#define CONFIG_BOOTCOMMAND	"nand read 0x21000000 0x180000 0x80000;" \
				"nand read 0x22000000 0x200000 0x600000;" \
				"bootm 0x22000000 - 0x21000000"
#elif CONFIG_SYS_USE_MMC
/* bootstrap + u-boot + env in sd card */
#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_ENV_OFFSET	0x2000
#define CONFIG_ENV_SIZE		0x1000
#define CONFIG_BOOTCOMMAND	"fatload mmc 0:1 0x21000000 dtb; " \
				"fatload mmc 0:1 0x22000000 uImage; " \
				"bootm 0x22000000 - 0x21000000"
#define CONFIG_SYS_MMC_ENV_DEV	0
#else
#define CONIG_ENV_IS_NOWHERE
#endif

#ifdef CONFIG_SYS_USE_MMC
#define CONFIG_BOOTARGS							\
	"console=ttyS0,115200 earlyprintk "				\
	"root=/dev/mmcblk0p2 rw rootwait"
#else
#define CONFIG_BOOTARGS							\
	"console=ttyS0,115200 earlyprintk "				\
	"mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,"		\
	"256K(env),256k(evn_redundent),256k(spare),"			\
	"512k(dtb),6M(kernel)ro,-(rootfs) "				\
	"rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs"
#endif

#define CONFIG_BAUDRATE			115200

#define CONFIG_SYS_PROMPT		"U-Boot> "
#define CONFIG_SYS_CBSIZE		256
#define CONFIG_SYS_MAXARGS		16
#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
					sizeof(CONFIG_SYS_PROMPT) + 16)
#define CONFIG_SYS_LONGHELP
#define CONFIG_CMDLINE_EDITING
#define CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_HUSH_PARSER

/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN		(1024 * 1024)

#endif
Commit	Line	Data
3225f34e BS	1	/*
	2	* Configuation settings for the SAMA5D3xEK board.
	3	*
	4	* Copyright (C) 2012 - 2013 Atmel
	5	*
	6	* based on at91sam9m10g45ek.h by:
	7	* Stelian Pop <stelian@popies.net>
	8	* Lead Tech Design <www.leadtechdesign.com>
	9	*
	10	* See file CREDITS for list of people who contributed to this
	11	* project.
	12	*
	13	* This program is free software; you can redistribute it and/or
	14	* modify it under the terms of the GNU General Public License as
	15	* published by the Free Software Foundation; either version 2 of
	16	* the License, or (at your option) any later version.
	17	*
	18	* This program is distributed in the hope that it will be useful,
	19	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	20	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	21	* GNU General Public License for more details.
	22	*
	23	* You should have received a copy of the GNU General Public License
	24	* along with this program; if not, write to the Free Software
	25	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	26	* MA 02111-1307 USA
	27	*/
	28
	29	#ifndef __CONFIG_H
	30	#define __CONFIG_H
	31
	32	#include <asm/hardware.h>
	33
	34	#define CONFIG_SYS_TEXT_BASE 0x26f00000
	35
	36	/* ARM asynchronous clock */
	37	#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
	38	#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */
	39	#define CONFIG_SYS_HZ 1000
	40
	41	#define CONFIG_AT91FAMILY
	42	#define CONFIG_ARCH_CPU_INIT
	43
	44	#define CONFIG_SKIP_LOWLEVEL_INIT
	45	#define CONFIG_BOARD_EARLY_INIT_F
	46	#define CONFIG_DISPLAY_CPUINFO
	47
	48	#define CONFIG_CMD_BOOTZ
	49	#define CONFIG_OF_LIBFDT /* Device Tree support */
	50
	51	/* general purpose I/O */
	52	#define CONFIG_AT91_GPIO
	53
	54	/* serial console */
	55	#define CONFIG_ATMEL_USART
	56	#define CONFIG_USART_BASE ATMEL_BASE_DBGU
	57	#define CONFIG_USART_ID ATMEL_ID_DBGU
	58
	59	/*
	60	* This needs to be defined for the OHCI code to work but it is defined as
	61	* ATMEL_ID_UHPHS in the CPU specific header files.
	62	*/
	63	#define ATMEL_ID_UHP ATMEL_ID_UHPHS
	64
65	/*
66	* Specify the clock enable bit in the PMC_SCER register.
67	*/
68	#define ATMEL_PMC_UHP AT91SAM926x_PMC_UHP
69
70	/* LCD */
71	#define CONFIG_LCD
72	#define LCD_BPP LCD_COLOR16
73	#define LCD_OUTPUT_BPP 24
74	#define CONFIG_LCD_LOGO
75	#undef LCD_TEST_PATTERN
76	#define CONFIG_LCD_INFO
77	#define CONFIG_LCD_INFO_BELOW_LOGO
78	#define CONFIG_SYS_WHITE_ON_BLACK
79	#define CONFIG_ATMEL_HLCD
80	#define CONFIG_ATMEL_LCD_RGB565
81	#define CONFIG_SYS_CONSOLE_IS_IN_ENV
82
83	/* board specific (not enough SRAM) */
84	#define CONFIG_SAMA5D3_LCD_BASE 0x23E00000
85
86	#define CONFIG_BOOTDELAY 3
87
88	/*
89	* BOOTP options
90	*/
91	#define CONFIG_BOOTP_BOOTFILESIZE
92	#define CONFIG_BOOTP_BOOTPATH
93	#define CONFIG_BOOTP_GATEWAY
94	#define CONFIG_BOOTP_HOSTNAME
95
96	/* No NOR flash */
97	#define CONFIG_SYS_NO_FLASH
98
99	/*
100	* Command line configuration.
101	*/
102	#include <config_cmd_default.h>
103	#undef CONFIG_CMD_FPGA
104	#undef CONFIG_CMD_IMI
105	#undef CONFIG_CMD_LOADS
106	#define CONFIG_CMD_PING
107	#define CONFIG_CMD_DHCP
108
109	/* SDRAM */
110	#define CONFIG_NR_DRAM_BANKS 1
111	#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_DDRCS
112	#define CONFIG_SYS_SDRAM_SIZE 0x20000000
113
114	#define CONFIG_SYS_INIT_SP_ADDR \
115	(CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
116
117	/* SerialFlash */
118	#define CONFIG_CMD_SF
119
120	#ifdef CONFIG_CMD_SF
121	#define CONFIG_ATMEL_SPI
122	#define CONFIG_SPI_FLASH
123	#define CONFIG_SPI_FLASH_ATMEL
124	#define CONFIG_SF_DEFAULT_SPEED 30000000
125	#endif
126
127	/* NAND flash */
128	#define CONFIG_CMD_NAND
129
130	#ifdef CONFIG_CMD_NAND
131	#define CONFIG_NAND_MAX_CHIPS 1
132	#define CONFIG_NAND_ATMEL
133	#define CONFIG_SYS_MAX_NAND_DEVICE 1
134	#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
135	/* our ALE is AD21 */
136	#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
137	/* our CLE is AD22 */
138	#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
139	#define CONFIG_SYS_NAND_ONFI_DETECTION
140	/* PMECC & PMERRLOC */
141	#define CONFIG_ATMEL_NAND_HWECC
142	#define CONFIG_ATMEL_NAND_HW_PMECC
143	#define CONFIG_PMECC_CAP 4
144	#define CONFIG_PMECC_SECTOR_SIZE 512
145	#define CONFIG_PMECC_INDEX_TABLE_OFFSET ATMEL_PMECC_INDEX_OFFSET_512
146	#define CONFIG_CMD_NAND_TRIMFFS
147	#endif
148
149	/* Ethernet Hardware */
150	#define CONFIG_MACB
151	#define CONFIG_RMII
152	#define CONFIG_NET_MULTI
153	#define CONFIG_NET_RETRY_COUNT 20
154	#define CONFIG_MACB_SEARCH_PHY
155
156	/* MMC */
157	#define CONFIG_CMD_MMC
158
159	#ifdef CONFIG_CMD_MMC
160	#define CONFIG_MMC
161	#define CONFIG_GENERIC_MMC
162	#define CONFIG_GENERIC_ATMEL_MCI
163	#define ATMEL_BASE_MMCI ATMEL_BASE_MCI0
164	#endif
165
166	/* USB */
167	#define CONFIG_CMD_USB
168
169	#ifdef CONFIG_CMD_USB
170	#define CONFIG_USB_ATMEL
171	#define CONFIG_USB_OHCI_NEW
172	#define CONFIG_SYS_USB_OHCI_CPU_INIT
173	#define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI
174	#define CONFIG_SYS_USB_OHCI_SLOT_NAME "sama5d3"
175	#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 3
176	#define CONFIG_DOS_PARTITION
177	#define CONFIG_USB_STORAGE
178	#endif
179
180	#if defined(CONFIG_CMD_USB) \|\| defined(CONFIG_CMD_MMC)
181	#define CONFIG_CMD_FAT
182	#endif
183
184	#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
185
186	#ifdef CONFIG_SYS_USE_SERIALFLASH
187	/* bootstrap + u-boot + env + linux in serial flash */
188	#define CONFIG_ENV_IS_IN_SPI_FLASH
189	#define CONFIG_ENV_OFFSET 0x5000
190	#define CONFIG_ENV_SIZE 0x3000
191	#define CONFIG_ENV_SECT_SIZE 0x1000
192	#define CONFIG_BOOTCOMMAND "sf probe 0; " \
193	"sf read 0x22000000 0x42000 0x300000; " \
194	"bootm 0x22000000"
195	#elif CONFIG_SYS_USE_NANDFLASH
196	/* bootstrap + u-boot + env in nandflash */
197	#define CONFIG_ENV_IS_IN_NAND
198	#define CONFIG_ENV_OFFSET 0xc0000
199	#define CONFIG_ENV_OFFSET_REDUND 0x100000
200	#define CONFIG_ENV_SIZE 0x20000
201	#define CONFIG_BOOTCOMMAND "nand read 0x21000000 0x180000 0x80000;" \
202	"nand read 0x22000000 0x200000 0x600000;" \
203	"bootm 0x22000000 - 0x21000000"
204	#elif CONFIG_SYS_USE_MMC
205	/* bootstrap + u-boot + env in sd card */
206	#define CONFIG_ENV_IS_IN_MMC
207	#define CONFIG_ENV_OFFSET 0x2000
208	#define CONFIG_ENV_SIZE 0x1000
209	#define CONFIG_BOOTCOMMAND "fatload mmc 0:1 0x21000000 dtb; " \
210	"fatload mmc 0:1 0x22000000 uImage; " \
211	"bootm 0x22000000 - 0x21000000"
212	#define CONFIG_SYS_MMC_ENV_DEV 0
213	#else
214	#define CONIG_ENV_IS_NOWHERE
215	#endif
216
217	#ifdef CONFIG_SYS_USE_MMC
218	#define CONFIG_BOOTARGS \
219	"console=ttyS0,115200 earlyprintk " \
220	"root=/dev/mmcblk0p2 rw rootwait"
221	#else
222	#define CONFIG_BOOTARGS \
223	"console=ttyS0,115200 earlyprintk " \
224	"mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
225	"256K(env),256k(evn_redundent),256k(spare)," \
226	"512k(dtb),6M(kernel)ro,-(rootfs) " \
227	"rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs"
228	#endif
229
230	#define CONFIG_BAUDRATE 115200
231
232	#define CONFIG_SYS_PROMPT "U-Boot> "
233	#define CONFIG_SYS_CBSIZE 256
234	#define CONFIG_SYS_MAXARGS 16
235	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
236	sizeof(CONFIG_SYS_PROMPT) + 16)
237	#define CONFIG_SYS_LONGHELP
238	#define CONFIG_CMDLINE_EDITING
239	#define CONFIG_AUTO_COMPLETE
240	#define CONFIG_SYS_HUSH_PARSER
241
242	/* Size of malloc() pool */
243	#define CONFIG_SYS_MALLOC_LEN (1024 * 1024)
244
245	#endif