[people/ms/u-boot.git] / include / configs / sama5d3xek.h

/*
 * Configuation settings for the SAMA5D3xEK board.
 *
 * Copyright (C) 2012 - 2013 Atmel
 *
 * based on at91sam9m10g45ek.h by:
 * Stelian Pop <stelian@popies.net>
 * Lead Tech Design <www.leadtechdesign.com>
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __CONFIG_H
#define __CONFIG_H

#include <asm/hardware.h>

#define CONFIG_SYS_TEXT_BASE		0x26f00000

/* ARM asynchronous clock */
#define CONFIG_SYS_AT91_SLOW_CLOCK      32768
#define CONFIG_SYS_AT91_MAIN_CLOCK      12000000 /* from 12 MHz crystal */
#define CONFIG_SYS_HZ		        1000

#define CONFIG_AT91FAMILY
#define CONFIG_ARCH_CPU_INIT

#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_DISPLAY_CPUINFO

#define CONFIG_CMD_BOOTZ
#define CONFIG_OF_LIBFDT		/* Device Tree support */

/* general purpose I/O */
#define CONFIG_AT91_GPIO

/* serial console */
#define CONFIG_ATMEL_USART
#define CONFIG_USART_BASE		ATMEL_BASE_DBGU
#define	CONFIG_USART_ID			ATMEL_ID_DBGU

/*
 * This needs to be defined for the OHCI code to work but it is defined as
 * ATMEL_ID_UHPHS in the CPU specific header files.
 */
#define ATMEL_ID_UHP			ATMEL_ID_UHPHS

/*
 * Specify the clock enable bit in the PMC_SCER register.
 */
#define ATMEL_PMC_UHP			AT91SAM926x_PMC_UHP

/* LCD */
#define CONFIG_LCD
#define LCD_BPP				LCD_COLOR16
#define LCD_OUTPUT_BPP                  24
#define CONFIG_LCD_LOGO
#define CONFIG_LCD_INFO
#define CONFIG_LCD_INFO_BELOW_LOGO
#define CONFIG_SYS_WHITE_ON_BLACK
#define CONFIG_ATMEL_HLCD
#define CONFIG_ATMEL_LCD_RGB565
#define CONFIG_SYS_CONSOLE_IS_IN_ENV

/* board specific (not enough SRAM) */
#define CONFIG_SAMA5D3_LCD_BASE		0x23E00000

#define CONFIG_BOOTDELAY		3

/*
 * BOOTP options
 */
#define CONFIG_BOOTP_BOOTFILESIZE
#define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME

/* No NOR flash */
#define CONFIG_SYS_NO_FLASH

/*
 * Command line configuration.
 */
#include <config_cmd_default.h>
#undef CONFIG_CMD_FPGA
#undef CONFIG_CMD_IMI
#undef CONFIG_CMD_LOADS
#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP

/* SDRAM */
#define CONFIG_NR_DRAM_BANKS		1
#define CONFIG_SYS_SDRAM_BASE           ATMEL_BASE_DDRCS
#define CONFIG_SYS_SDRAM_SIZE		0x20000000

#define CONFIG_SYS_INIT_SP_ADDR \
	(CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)

/* SerialFlash */
#define CONFIG_CMD_SF

#ifdef CONFIG_CMD_SF
#define CONFIG_ATMEL_SPI
#define CONFIG_SPI_FLASH
#define CONFIG_SPI_FLASH_ATMEL
#define CONFIG_SF_DEFAULT_SPEED		30000000
#endif

/* NAND flash */
#define CONFIG_CMD_NAND

#ifdef CONFIG_CMD_NAND
#define CONFIG_NAND_ATMEL
#define CONFIG_SYS_MAX_NAND_DEVICE	1
#define CONFIG_SYS_NAND_BASE		ATMEL_BASE_CS3
/* our ALE is AD21 */
#define CONFIG_SYS_NAND_MASK_ALE	(1 << 21)
/* our CLE is AD22 */
#define CONFIG_SYS_NAND_MASK_CLE	(1 << 22)
#define CONFIG_SYS_NAND_ONFI_DETECTION
/* PMECC & PMERRLOC */
#define CONFIG_ATMEL_NAND_HWECC
#define CONFIG_ATMEL_NAND_HW_PMECC
#define CONFIG_PMECC_CAP		4
#define CONFIG_PMECC_SECTOR_SIZE	512
#define CONFIG_CMD_NAND_TRIMFFS
#endif

/* Ethernet Hardware */
#define CONFIG_MACB
#define CONFIG_RMII
#define CONFIG_NET_RETRY_COUNT		20
#define CONFIG_MACB_SEARCH_PHY
#define CONFIG_RGMII
#define CONFIG_CMD_MII
#define CONFIG_PHYLIB
#define CONFIG_PHY_MICREL
#define CONFIG_PHY_MICREL_KSZ9021

/* MMC */
#define CONFIG_CMD_MMC

#ifdef CONFIG_CMD_MMC
#define CONFIG_MMC
#define CONFIG_GENERIC_MMC
#define CONFIG_GENERIC_ATMEL_MCI
#define ATMEL_BASE_MMCI			ATMEL_BASE_MCI0
#endif

/* USB */
#define CONFIG_CMD_USB

#ifdef CONFIG_CMD_USB
#define CONFIG_USB_ATMEL
#define CONFIG_USB_OHCI_NEW
#define CONFIG_SYS_USB_OHCI_CPU_INIT
#define CONFIG_SYS_USB_OHCI_REGS_BASE		ATMEL_BASE_OHCI
#define CONFIG_SYS_USB_OHCI_SLOT_NAME		"sama5d3"
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	3
#define CONFIG_DOS_PARTITION
#define CONFIG_USB_STORAGE
#endif

/* USB device */
#define CONFIG_USB_GADGET
#define CONFIG_USB_GADGET_DUALSPEED
#define CONFIG_USB_GADGET_ATMEL_USBA
#define CONFIG_USB_ETHER
#define CONFIG_USB_ETH_RNDIS
#define CONFIG_USBNET_MANUFACTURER      "Atmel SAMA5D3xEK"

#if defined(CONFIG_CMD_USB) || defined(CONFIG_CMD_MMC)
#define CONFIG_CMD_FAT
#endif

#define CONFIG_SYS_LOAD_ADDR			0x22000000 /* load address */

#ifdef CONFIG_SYS_USE_SERIALFLASH
/* bootstrap + u-boot + env + linux in serial flash */
#define CONFIG_ENV_IS_IN_SPI_FLASH
#define CONFIG_ENV_OFFSET       0x5000
#define CONFIG_ENV_SIZE         0x3000
#define CONFIG_ENV_SECT_SIZE    0x1000
#define CONFIG_BOOTCOMMAND      "sf probe 0; " \
				"sf read 0x22000000 0x42000 0x300000; " \
				"bootm 0x22000000"
#elif CONFIG_SYS_USE_NANDFLASH
/* bootstrap + u-boot + env in nandflash */
#define CONFIG_ENV_IS_IN_NAND
#define CONFIG_ENV_OFFSET		0xc0000
#define CONFIG_ENV_OFFSET_REDUND	0x100000
#define CONFIG_ENV_SIZE			0x20000
#define CONFIG_BOOTCOMMAND	"nand read 0x21000000 0x180000 0x80000;" \
				"nand read 0x22000000 0x200000 0x600000;" \
				"bootm 0x22000000 - 0x21000000"
#elif CONFIG_SYS_USE_MMC
/* bootstrap + u-boot + env in sd card */
#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_ENV_OFFSET	0x2000
#define CONFIG_ENV_SIZE		0x1000
#define CONFIG_BOOTCOMMAND	"fatload mmc 0:1 0x21000000 dtb; " \
				"fatload mmc 0:1 0x22000000 uImage; " \
				"bootm 0x22000000 - 0x21000000"
#define CONFIG_SYS_MMC_ENV_DEV	0
#else
#define CONFIG_ENV_IS_NOWHERE
#endif

#ifdef CONFIG_SYS_USE_MMC
#define CONFIG_BOOTARGS							\
	"console=ttyS0,115200 earlyprintk "				\
	"root=/dev/mmcblk0p2 rw rootwait"
#else
#define CONFIG_BOOTARGS							\
	"console=ttyS0,115200 earlyprintk "				\
	"mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,"		\
	"256K(env),256k(evn_redundent),256k(spare),"			\
	"512k(dtb),6M(kernel)ro,-(rootfs) "				\
	"rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs"
#endif

#define CONFIG_BAUDRATE			115200

#define CONFIG_SYS_PROMPT		"U-Boot> "
#define CONFIG_SYS_CBSIZE		256
#define CONFIG_SYS_MAXARGS		16
#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
					sizeof(CONFIG_SYS_PROMPT) + 16)
#define CONFIG_SYS_LONGHELP
#define CONFIG_CMDLINE_EDITING
#define CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_HUSH_PARSER

/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN		(1024 * 1024)

#endif
Commit	Line	Data
3225f34e BS	1	/*
	2	* Configuation settings for the SAMA5D3xEK board.
	3	*
	4	* Copyright (C) 2012 - 2013 Atmel
	5	*
	6	* based on at91sam9m10g45ek.h by:
	7	* Stelian Pop <stelian@popies.net>
	8	* Lead Tech Design <www.leadtechdesign.com>
	9	*
1a459660	10	* SPDX-License-Identifier: GPL-2.0+
3225f34e BS	11	*/
	12
	13	#ifndef __CONFIG_H
	14	#define __CONFIG_H
	15
	16	#include <asm/hardware.h>
	17
	18	#define CONFIG_SYS_TEXT_BASE 0x26f00000
	19
	20	/* ARM asynchronous clock */
	21	#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
	22	#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */
	23	#define CONFIG_SYS_HZ 1000
	24
	25	#define CONFIG_AT91FAMILY
	26	#define CONFIG_ARCH_CPU_INIT
	27
	28	#define CONFIG_SKIP_LOWLEVEL_INIT
	29	#define CONFIG_BOARD_EARLY_INIT_F
	30	#define CONFIG_DISPLAY_CPUINFO
	31
	32	#define CONFIG_CMD_BOOTZ
	33	#define CONFIG_OF_LIBFDT /* Device Tree support */
	34
	35	/* general purpose I/O */
	36	#define CONFIG_AT91_GPIO
	37
	38	/* serial console */
	39	#define CONFIG_ATMEL_USART
	40	#define CONFIG_USART_BASE ATMEL_BASE_DBGU
	41	#define CONFIG_USART_ID ATMEL_ID_DBGU
	42
	43	/*
	44	* This needs to be defined for the OHCI code to work but it is defined as
	45	* ATMEL_ID_UHPHS in the CPU specific header files.
	46	*/
	47	#define ATMEL_ID_UHP ATMEL_ID_UHPHS
	48
	49	/*
	50	* Specify the clock enable bit in the PMC_SCER register.
	51	*/
	52	#define ATMEL_PMC_UHP AT91SAM926x_PMC_UHP
	53
	54	/* LCD */
	55	#define CONFIG_LCD
	56	#define LCD_BPP LCD_COLOR16
	57	#define LCD_OUTPUT_BPP 24
	58	#define CONFIG_LCD_LOGO
3225f34e BS	59	#define CONFIG_LCD_INFO
	60	#define CONFIG_LCD_INFO_BELOW_LOGO
	61	#define CONFIG_SYS_WHITE_ON_BLACK
	62	#define CONFIG_ATMEL_HLCD
	63	#define CONFIG_ATMEL_LCD_RGB565
	64	#define CONFIG_SYS_CONSOLE_IS_IN_ENV
	65
	66	/* board specific (not enough SRAM) */
	67	#define CONFIG_SAMA5D3_LCD_BASE 0x23E00000
	68
	69	#define CONFIG_BOOTDELAY 3
	70
	71	/*
	72	* BOOTP options
	73	*/
	74	#define CONFIG_BOOTP_BOOTFILESIZE
	75	#define CONFIG_BOOTP_BOOTPATH
	76	#define CONFIG_BOOTP_GATEWAY
	77	#define CONFIG_BOOTP_HOSTNAME
	78
	79	/* No NOR flash */
	80	#define CONFIG_SYS_NO_FLASH
	81
	82	/*
	83	* Command line configuration.
	84	*/
	85	#include <config_cmd_default.h>
	86	#undef CONFIG_CMD_FPGA
	87	#undef CONFIG_CMD_IMI
	88	#undef CONFIG_CMD_LOADS
	89	#define CONFIG_CMD_PING
	90	#define CONFIG_CMD_DHCP
	91
	92	/* SDRAM */
	93	#define CONFIG_NR_DRAM_BANKS 1
	94	#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_DDRCS
	95	#define CONFIG_SYS_SDRAM_SIZE 0x20000000
	96
	97	#define CONFIG_SYS_INIT_SP_ADDR \
	98	(CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
	99
	100	/* SerialFlash */
	101	#define CONFIG_CMD_SF
	102
	103	#ifdef CONFIG_CMD_SF
	104	#define CONFIG_ATMEL_SPI
	105	#define CONFIG_SPI_FLASH
	106	#define CONFIG_SPI_FLASH_ATMEL
	107	#define CONFIG_SF_DEFAULT_SPEED 30000000
	108	#endif
	109
	110	/* NAND flash */
	111	#define CONFIG_CMD_NAND
	112
	113	#ifdef CONFIG_CMD_NAND
3225f34e BS	114	#define CONFIG_NAND_ATMEL
	115	#define CONFIG_SYS_MAX_NAND_DEVICE 1
	116	#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
	117	/* our ALE is AD21 */
	118	#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
	119	/* our CLE is AD22 */
	120	#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
	121	#define CONFIG_SYS_NAND_ONFI_DETECTION
	122	/* PMECC & PMERRLOC */
	123	#define CONFIG_ATMEL_NAND_HWECC
	124	#define CONFIG_ATMEL_NAND_HW_PMECC
	125	#define CONFIG_PMECC_CAP 4
	126	#define CONFIG_PMECC_SECTOR_SIZE 512
3225f34e BS	127	#define CONFIG_CMD_NAND_TRIMFFS
	128	#endif
	129
	130	/* Ethernet Hardware */
	131	#define CONFIG_MACB
	132	#define CONFIG_RMII
3225f34e BS	133	#define CONFIG_NET_RETRY_COUNT 20
3225f34e BS	134	#define CONFIG_MACB_SEARCH_PHY
e08d6f3a BS	135	#define CONFIG_RGMII
	136	#define CONFIG_CMD_MII
	137	#define CONFIG_PHYLIB
	138	#define CONFIG_PHY_MICREL
	139	#define CONFIG_PHY_MICREL_KSZ9021
3225f34e BS	140
	141	/* MMC */
	142	#define CONFIG_CMD_MMC
	143
	144	#ifdef CONFIG_CMD_MMC
	145	#define CONFIG_MMC
	146	#define CONFIG_GENERIC_MMC
	147	#define CONFIG_GENERIC_ATMEL_MCI
	148	#define ATMEL_BASE_MMCI ATMEL_BASE_MCI0
	149	#endif
	150
	151	/* USB */
	152	#define CONFIG_CMD_USB
	153
	154	#ifdef CONFIG_CMD_USB
	155	#define CONFIG_USB_ATMEL
	156	#define CONFIG_USB_OHCI_NEW
	157	#define CONFIG_SYS_USB_OHCI_CPU_INIT
	158	#define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI
	159	#define CONFIG_SYS_USB_OHCI_SLOT_NAME "sama5d3"
	160	#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 3
	161	#define CONFIG_DOS_PARTITION
	162	#define CONFIG_USB_STORAGE
	163	#endif
	164
3668ce3c BS	165	/* USB device */
	166	#define CONFIG_USB_GADGET
	167	#define CONFIG_USB_GADGET_DUALSPEED
	168	#define CONFIG_USB_GADGET_ATMEL_USBA
	169	#define CONFIG_USB_ETHER
	170	#define CONFIG_USB_ETH_RNDIS
	171	#define CONFIG_USBNET_MANUFACTURER "Atmel SAMA5D3xEK"
	172
3225f34e BS	173	#if defined(CONFIG_CMD_USB) \|\| defined(CONFIG_CMD_MMC)
	174	#define CONFIG_CMD_FAT
	175	#endif
	176
	177	#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
	178
	179	#ifdef CONFIG_SYS_USE_SERIALFLASH
	180	/* bootstrap + u-boot + env + linux in serial flash */
	181	#define CONFIG_ENV_IS_IN_SPI_FLASH
	182	#define CONFIG_ENV_OFFSET 0x5000
	183	#define CONFIG_ENV_SIZE 0x3000
	184	#define CONFIG_ENV_SECT_SIZE 0x1000
	185	#define CONFIG_BOOTCOMMAND "sf probe 0; " \
	186	"sf read 0x22000000 0x42000 0x300000; " \
	187	"bootm 0x22000000"
	188	#elif CONFIG_SYS_USE_NANDFLASH
	189	/* bootstrap + u-boot + env in nandflash */
	190	#define CONFIG_ENV_IS_IN_NAND
	191	#define CONFIG_ENV_OFFSET 0xc0000
	192	#define CONFIG_ENV_OFFSET_REDUND 0x100000
	193	#define CONFIG_ENV_SIZE 0x20000
	194	#define CONFIG_BOOTCOMMAND "nand read 0x21000000 0x180000 0x80000;" \
	195	"nand read 0x22000000 0x200000 0x600000;" \
	196	"bootm 0x22000000 - 0x21000000"
	197	#elif CONFIG_SYS_USE_MMC
	198	/* bootstrap + u-boot + env in sd card */
	199	#define CONFIG_ENV_IS_IN_MMC
	200	#define CONFIG_ENV_OFFSET 0x2000
	201	#define CONFIG_ENV_SIZE 0x1000
	202	#define CONFIG_BOOTCOMMAND "fatload mmc 0:1 0x21000000 dtb; " \
	203	"fatload mmc 0:1 0x22000000 uImage; " \
	204	"bootm 0x22000000 - 0x21000000"
	205	#define CONFIG_SYS_MMC_ENV_DEV 0
	206	#else
a4c79b3a	207	#define CONFIG_ENV_IS_NOWHERE
3225f34e BS	208	#endif
	209
	210	#ifdef CONFIG_SYS_USE_MMC
	211	#define CONFIG_BOOTARGS \
	212	"console=ttyS0,115200 earlyprintk " \
	213	"root=/dev/mmcblk0p2 rw rootwait"
	214	#else
	215	#define CONFIG_BOOTARGS \
	216	"console=ttyS0,115200 earlyprintk " \
	217	"mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
	218	"256K(env),256k(evn_redundent),256k(spare)," \
	219	"512k(dtb),6M(kernel)ro,-(rootfs) " \
	220	"rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs"
	221	#endif
	222
	223	#define CONFIG_BAUDRATE 115200
	224
	225	#define CONFIG_SYS_PROMPT "U-Boot> "
	226	#define CONFIG_SYS_CBSIZE 256
	227	#define CONFIG_SYS_MAXARGS 16
	228	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
	229	sizeof(CONFIG_SYS_PROMPT) + 16)
	230	#define CONFIG_SYS_LONGHELP
	231	#define CONFIG_CMDLINE_EDITING
	232	#define CONFIG_AUTO_COMPLETE
	233	#define CONFIG_SYS_HUSH_PARSER
	234
	235	/* Size of malloc() pool */
	236	#define CONFIG_SYS_MALLOC_LEN (1024 * 1024)
	237
	238	#endif