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sh: Renesas Solutions SH7763RDP board support
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1/*
2 * Configuation settings for the Renesas SH7763RDP board
3 *
4 * Copyright (C) 2008 Renesas Solutions Corp.
5 * Copyright (C) 2008 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26#ifndef __SH7763RDP_H
27#define __SH7763RDP_H
28
29#define CONFIG_SH 1
30#define CONFIG_SH4 1
31#define CONFIG_CPU_SH7763 1
32#define CONFIG_SH7763RDP 1
33#define __LITTLE_ENDIAN 1
34
35/*
36 * Command line configuration.
37 */
38#define CONFIG_CMD_SDRAM
39#define CONFIG_CMD_FLASH
40#define CONFIG_CMD_MEMORY
41#define CONFIG_CMD_NET
42#define CONFIG_CMD_PING
43#define CONFIG_CMD_ENV
44#define CONFIG_CMD_NFS
45#define CONFIG_CMD_JFFS2
46
47#define CONFIG_BOOTDELAY -1
48#define CONFIG_BOOTARGS "console=ttySC2,115200 root=1f01"
49#define CONFIG_ENV_OVERWRITE 1
50
51#define CONFIG_VERSION_VARIABLE
52#undef CONFIG_SHOW_BOOT_PROGRESS
53
54/* SCIF */
55#define CFG_SCIF_CONSOLE 1
56#define CONFIG_BAUDRATE 115200
57#define CONFIG_CONS_SCIF2 1
58
59#define CFG_LONGHELP /* undef to save memory */
60#define CFG_PROMPT "=> " /* Monitor Command Prompt */
61#define CFG_CBSIZE 256 /* Buffer size for input from the Console */
62#define CFG_PBSIZE 256 /* Buffer size for Console output */
63#define CFG_MAXARGS 16 /* max args accepted for monitor commands */
64#define CFG_BARGSIZE 512 /* Buffer size for Boot Arguments
65 passed to kernel */
66#define CFG_BAUDRATE_TABLE { 115200 } /* List of legal baudrate
67 settings for this board */
68
69/* Ethernet */
70#define CONFIG_SH_ETHER 1
71#define CONFIG_SH_ETHER_USE_PORT (1)
72#define CONFIG_SH_ETHER_PHY_ADDR (0x01)
73#define CFG_RX_ETH_BUFFER (8)
74
75/* SDRAM */
76#define CFG_SDRAM_BASE (0x8C000000)
77#define CFG_SDRAM_SIZE (64 * 1024 * 1024)
78#define CFG_MEMTEST_START (CFG_SDRAM_BASE)
79#define CFG_MEMTEST_END (CFG_MEMTEST_START + (60 * 1024 * 1024))
80
81/* Flash(NOR) */
82#define CFG_FLASH_BASE (0xA0000000)
83#define CFG_FLASH_CFI_WIDTH (FLASH_CFI_16BIT)
84#define CFG_MAX_FLASH_BANKS (1)
85#define CFG_MAX_FLASH_SECT (520)
86
87/* U-boot setting */
88#define CFG_LOAD_ADDR (CFG_SDRAM_BASE + 4 * 1024 * 1024)
89#define CFG_MONITOR_BASE (CFG_FLASH_BASE)
90#define CFG_MONITOR_LEN (128 * 1024)
91/* Size of DRAM reserved for malloc() use */
92#define CFG_MALLOC_LEN (1024 * 1024)
93/* size in bytes reserved for initial data */
94#define CFG_GBL_DATA_SIZE (256)
95#define CFG_BOOTMAPSZ (8 * 1024 * 1024)
96
97#define CFG_FLASH_CFI
98#define CFG_FLASH_CFI_DRIVER
99#undef CFG_FLASH_QUIET_TEST
100#define CFG_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
101/* Timeout for Flash erase operations (in ms) */
102#define CFG_FLASH_ERASE_TOUT (3 * 1000)
103/* Timeout for Flash write operations (in ms) */
104#define CFG_FLASH_WRITE_TOUT (3 * 1000)
105/* Timeout for Flash set sector lock bit operations (in ms) */
106#define CFG_FLASH_LOCK_TOUT (3 * 1000)
107/* Timeout for Flash clear lock bit operations (in ms) */
108#define CFG_FLASH_UNLOCK_TOUT (3 * 1000)
109/* Use hardware flash sectors protection instead of U-Boot software protection */
110#undef CFG_FLASH_PROTECTION
111#undef CFG_DIRECT_FLASH_TFTP
112#define CFG_ENV_IS_IN_FLASH
113#define CFG_ENV_SECT_SIZE (128 * 1024)
114#define CFG_ENV_SIZE (CFG_ENV_SECT_SIZE)
115#define CFG_ENV_ADDR (CFG_FLASH_BASE + (1 * CFG_ENV_SECT_SIZE))
116/* Offset of env Flash sector relative to CFG_FLASH_BASE */
117#define CFG_ENV_OFFSET (CFG_ENV_ADDR - CFG_FLASH_BASE)
118#define CFG_ENV_SIZE_REDUND (CFG_ENV_SECT_SIZE)
119#define CFG_ENV_ADDR_REDUND (CFG_FLASH_BASE + (2 * CFG_ENV_SECT_SIZE))
120
121/* Clock */
122#define CONFIG_SYS_CLK_FREQ 66666666
123#define TMU_CLK_DIVIDER (4) /* 4 (default), 16, 64, 256 or 1024 */
124#define CFG_HZ (CONFIG_SYS_CLK_FREQ / TMU_CLK_DIVIDER)
125
126#endif /* __SH7763RDP_H */