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e21185ba CK |
1 | /* |
2 | * Copyright (C) 2011 Samsung Electronics | |
3 | * | |
393cb361 | 4 | * Configuration settings for the SAMSUNG SMDKV310 (EXYNOS4210) board. |
e21185ba | 5 | * |
1a459660 | 6 | * SPDX-License-Identifier: GPL-2.0+ |
e21185ba CK |
7 | */ |
8 | ||
9 | #ifndef __CONFIG_H | |
10 | #define __CONFIG_H | |
11 | ||
12 | /* High Level Configuration Options */ | |
e21185ba CK |
13 | #define CONFIG_SAMSUNG 1 /* in a SAMSUNG core */ |
14 | #define CONFIG_S5P 1 /* S5P Family */ | |
393cb361 | 15 | #define CONFIG_EXYNOS4210 1 /* which is a EXYNOS4210 SoC */ |
e21185ba CK |
16 | #define CONFIG_SMDKV310 1 /* working with SMDKV310*/ |
17 | ||
18 | #include <asm/arch/cpu.h> /* get chip and board defs */ | |
19 | ||
20 | #define CONFIG_ARCH_CPU_INIT | |
21 | #define CONFIG_DISPLAY_CPUINFO | |
22 | #define CONFIG_DISPLAY_BOARDINFO | |
198a40b9 | 23 | #define CONFIG_BOARD_EARLY_INIT_F |
e21185ba | 24 | |
b3c5a49b CK |
25 | /* Mach Type */ |
26 | #define CONFIG_MACH_TYPE MACH_TYPE_SMDKV310 | |
27 | ||
e21185ba CK |
28 | /* Keep L2 Cache Disabled */ |
29 | #define CONFIG_L2_OFF 1 | |
30 | ||
31 | #define CONFIG_SYS_SDRAM_BASE 0x40000000 | |
32 | #define CONFIG_SYS_TEXT_BASE 0x43E00000 | |
33 | ||
34 | /* input clock of PLL: SMDKV310 has 24MHz input clock */ | |
35 | #define CONFIG_SYS_CLK_FREQ 24000000 | |
36 | ||
37 | #define CONFIG_SETUP_MEMORY_TAGS | |
38 | #define CONFIG_CMDLINE_TAG | |
39 | #define CONFIG_INITRD_TAG | |
40 | #define CONFIG_CMDLINE_EDITING | |
41 | ||
42 | /* Handling Sleep Mode*/ | |
43 | #define S5P_CHECK_SLEEP 0x00000BAD | |
44 | #define S5P_CHECK_DIDLE 0xBAD00000 | |
643be9c0 | 45 | #define S5P_CHECK_LPA 0xABAD0000 |
e21185ba CK |
46 | |
47 | /* Size of malloc() pool */ | |
48 | #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (1 << 20)) | |
49 | ||
50 | /* select serial console configuration */ | |
e21185ba CK |
51 | #define CONFIG_SERIAL1 1 /* use SERIAL 1 */ |
52 | #define CONFIG_BAUDRATE 115200 | |
393cb361 | 53 | #define EXYNOS4_DEFAULT_UART_OFFSET 0x010000 |
e21185ba CK |
54 | |
55 | /* SD/MMC configuration */ | |
7d2d58b4 JC |
56 | #define CONFIG_GENERIC_MMC |
57 | #define CONFIG_MMC | |
58 | #define CONFIG_SDHCI | |
59 | #define CONFIG_S5P_SDHCI | |
e21185ba CK |
60 | |
61 | /* PWM */ | |
62 | #define CONFIG_PWM 1 | |
63 | ||
64 | /* allow to overwrite serial and ethaddr */ | |
65 | #define CONFIG_ENV_OVERWRITE | |
66 | ||
67 | /* Command definition*/ | |
68 | #include <config_cmd_default.h> | |
69 | ||
70 | #define CONFIG_CMD_PING | |
71 | #define CONFIG_CMD_ELF | |
72 | #define CONFIG_CMD_DHCP | |
73 | #define CONFIG_CMD_MMC | |
74 | #define CONFIG_CMD_NET | |
75 | #define CONFIG_CMD_FAT | |
76 | ||
77 | #define CONFIG_BOOTDELAY 3 | |
78 | #define CONFIG_ZERO_BOOTDELAY_CHECK | |
5187d8dd CK |
79 | |
80 | /* MMC SPL */ | |
81 | #define CONFIG_SPL | |
643be9c0 | 82 | #define CONFIG_SKIP_LOWLEVEL_INIT |
9b3ab1c9 | 83 | #define COPY_BL2_FNPTR_ADDR 0x00002488 |
e21185ba | 84 | |
8a00061e IS |
85 | #define CONFIG_SPL_TEXT_BASE 0x02021410 |
86 | ||
e21185ba CK |
87 | #define CONFIG_BOOTCOMMAND "fatload mmc 0 40007000 uImage; bootm 40007000" |
88 | ||
89 | /* Miscellaneous configurable options */ | |
90 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ | |
91 | #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ | |
e21185ba CK |
92 | #define CONFIG_SYS_PROMPT "SMDKV310 # " |
93 | #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size*/ | |
94 | #define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */ | |
95 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ | |
96 | #define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0" | |
97 | /* Boot Argument Buffer Size */ | |
98 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE | |
99 | /* memtest works on */ | |
100 | #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE | |
101 | #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x6000000) | |
102 | #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000) | |
103 | ||
e21185ba CK |
104 | /* SMDKV310 has 4 bank of DRAM */ |
105 | #define CONFIG_NR_DRAM_BANKS 4 | |
106 | #define SDRAM_BANK_SIZE (512UL << 20UL) /* 512 MB */ | |
107 | #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE | |
108 | #define PHYS_SDRAM_1_SIZE SDRAM_BANK_SIZE | |
109 | #define PHYS_SDRAM_2 (CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE) | |
110 | #define PHYS_SDRAM_2_SIZE SDRAM_BANK_SIZE | |
111 | #define PHYS_SDRAM_3 (CONFIG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE)) | |
112 | #define PHYS_SDRAM_3_SIZE SDRAM_BANK_SIZE | |
113 | #define PHYS_SDRAM_4 (CONFIG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE)) | |
114 | #define PHYS_SDRAM_4_SIZE SDRAM_BANK_SIZE | |
115 | ||
116 | /* FLASH and environment organization */ | |
117 | #define CONFIG_SYS_NO_FLASH 1 | |
118 | #undef CONFIG_CMD_IMLS | |
119 | #define CONFIG_IDENT_STRING " for SMDKC210/V310" | |
120 | ||
e21185ba CK |
121 | #define CONFIG_CLK_1000_400_200 |
122 | ||
123 | /* MIU (Memory Interleaving Unit) */ | |
124 | #define CONFIG_MIU_2BIT_INTERLEAVED | |
125 | ||
126 | #define CONFIG_ENV_IS_IN_MMC 1 | |
127 | #define CONFIG_SYS_MMC_ENV_DEV 0 | |
128 | #define CONFIG_ENV_SIZE (16 << 10) /* 16 KB */ | |
129 | #define RESERVE_BLOCK_SIZE (512) | |
130 | #define BL1_SIZE (16 << 10) /*16 K reserved for BL1*/ | |
131 | #define CONFIG_ENV_OFFSET (RESERVE_BLOCK_SIZE + BL1_SIZE) | |
132 | #define CONFIG_DOS_PARTITION 1 | |
133 | ||
643be9c0 RS |
134 | #define CONFIG_SPL_LDSCRIPT "board/samsung/common/exynos-uboot-spl.lds" |
135 | #define CONFIG_SPL_MAX_FOOTPRINT (14 * 1024) | |
136 | ||
137 | #define CONFIG_SYS_INIT_SP_ADDR 0x02040000 | |
e21185ba CK |
138 | |
139 | /* U-boot copy size from boot Media to DRAM.*/ | |
140 | #define COPY_BL2_SIZE 0x80000 | |
141 | #define BL2_START_OFFSET ((CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)/512) | |
142 | #define BL2_SIZE_BLOC_COUNT (COPY_BL2_SIZE/512) | |
143 | ||
144 | /* Ethernet Controllor Driver */ | |
145 | #ifdef CONFIG_CMD_NET | |
e21185ba CK |
146 | #define CONFIG_SMC911X |
147 | #define CONFIG_SMC911X_BASE 0x5000000 | |
148 | #define CONFIG_SMC911X_16_BIT | |
149 | #define CONFIG_ENV_SROM_BANK 1 | |
150 | #endif /*CONFIG_CMD_NET*/ | |
07407d97 TA |
151 | |
152 | /* Enable devicetree support */ | |
153 | #define CONFIG_OF_LIBFDT | |
e21185ba | 154 | #endif /* __CONFIG_H */ |