[people/ms/u-boot.git] / include / configs / sunxi-common.h

/*
 * (C) Copyright 2012-2012 Henrik Nordstrom <henrik@henriknordstrom.net>
 *
 * (C) Copyright 2007-2011
 * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
 * Tom Cubie <tangliang@allwinnertech.com>
 *
 * Configuration settings for the Allwinner sunxi series of boards.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef _SUNXI_COMMON_CONFIG_H
#define _SUNXI_COMMON_CONFIG_H

#include <asm/arch/cpu.h>
#include <linux/stringify.h>

#ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT
/*
 * The U-Boot workarounds bugs in the outdated buggy sunxi-3.4 kernels at the
 * expense of restricting some features, so the regular machine id values can
 * be used.
 */
# define CONFIG_MACH_TYPE_COMPAT_REV	0
#else
/*
 * A compatibility guard to prevent loading outdated buggy sunxi-3.4 kernels.
 * Only sunxi-3.4 kernels with appropriate fixes applied are able to pass
 * beyond the machine id check.
 */
# define CONFIG_MACH_TYPE_COMPAT_REV	1
#endif

#ifdef CONFIG_ARM64
#define CONFIG_BUILD_TARGET "u-boot.itb"
#endif

/* Serial & console */
#define CONFIG_SYS_NS16550_SERIAL
/* ns16550 reg in the low bits of cpu reg */
#define CONFIG_SYS_NS16550_CLK		24000000
#ifndef CONFIG_DM_SERIAL
# define CONFIG_SYS_NS16550_REG_SIZE	-4
# define CONFIG_SYS_NS16550_COM1		SUNXI_UART0_BASE
# define CONFIG_SYS_NS16550_COM2		SUNXI_UART1_BASE
# define CONFIG_SYS_NS16550_COM3		SUNXI_UART2_BASE
# define CONFIG_SYS_NS16550_COM4		SUNXI_UART3_BASE
# define CONFIG_SYS_NS16550_COM5		SUNXI_R_UART_BASE
#endif

/* CPU */
#define COUNTER_FREQUENCY		24000000

/*
 * The DRAM Base differs between some models. We cannot use macros for the
 * CONFIG_FOO defines which contain the DRAM base address since they end
 * up unexpanded in include/autoconf.mk .
 *
 * So we have to have this #ifdef #else #endif block for these.
 */
#ifdef CONFIG_MACH_SUN9I
#define SDRAM_OFFSET(x) 0x2##x
#define CONFIG_SYS_SDRAM_BASE		0x20000000
#define CONFIG_SYS_LOAD_ADDR		0x22000000 /* default load address */
#define CONFIG_SYS_TEXT_BASE		0x2a000000
/* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here 
 * since it needs to fit in with the other values. By also #defining it
 * we get warnings if the Kconfig value mismatches. */
#define CONFIG_SPL_STACK_R_ADDR		0x2fe00000
#define CONFIG_SPL_BSS_START_ADDR	0x2ff80000
#else
#define SDRAM_OFFSET(x) 0x4##x
#define CONFIG_SYS_SDRAM_BASE		0x40000000
#define CONFIG_SYS_LOAD_ADDR		0x42000000 /* default load address */
/* V3s do not have enough memory to place code at 0x4a000000 */
#ifndef CONFIG_MACH_SUN8I_V3S
#define CONFIG_SYS_TEXT_BASE		0x4a000000
#else
#define CONFIG_SYS_TEXT_BASE		0x42e00000
#endif
/* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here 
 * since it needs to fit in with the other values. By also #defining it
 * we get warnings if the Kconfig value mismatches. */
#define CONFIG_SPL_STACK_R_ADDR		0x4fe00000
#define CONFIG_SPL_BSS_START_ADDR	0x4ff80000
#endif

#define CONFIG_SPL_BSS_MAX_SIZE		0x00080000 /* 512 KiB */

#ifdef CONFIG_SUNXI_HIGH_SRAM
/*
 * The A80's A1 sram starts at 0x00010000 rather then at 0x00000000 and is
 * slightly bigger. Note that it is possible to map the first 32 KiB of the
 * A1 at 0x00000000 like with older SoCs by writing 0x16aa0001 to the
 * undocumented 0x008000e0 SYS_CTRL register. Where the 16aa is a key and
 * the 1 actually activates the mapping of the first 32 KiB to 0x00000000.
 */
#define CONFIG_SYS_INIT_RAM_ADDR	0x10000
#define CONFIG_SYS_INIT_RAM_SIZE	0x08000	/* FIXME: 40 KiB ? */
#else
#define CONFIG_SYS_INIT_RAM_ADDR	0x0
#define CONFIG_SYS_INIT_RAM_SIZE	0x8000	/* 32 KiB */
#endif

#define CONFIG_SYS_INIT_SP_OFFSET \
	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR \
	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)

#define CONFIG_NR_DRAM_BANKS		1
#define PHYS_SDRAM_0			CONFIG_SYS_SDRAM_BASE
#define PHYS_SDRAM_0_SIZE		0x80000000 /* 2 GiB */

#ifdef CONFIG_AHCI
#define CONFIG_LIBATA
#define CONFIG_SCSI_AHCI
#define CONFIG_SCSI_AHCI_PLAT
#define CONFIG_SUNXI_AHCI
#define CONFIG_SYS_64BIT_LBA
#define CONFIG_SYS_SCSI_MAX_SCSI_ID	1
#define CONFIG_SYS_SCSI_MAX_LUN		1
#define CONFIG_SYS_SCSI_MAX_DEVICE	(CONFIG_SYS_SCSI_MAX_SCSI_ID * \
					 CONFIG_SYS_SCSI_MAX_LUN)
#endif

#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_CMDLINE_TAG
#define CONFIG_INITRD_TAG
#define CONFIG_SERIAL_TAG

#ifdef CONFIG_NAND_SUNXI
#define CONFIG_SYS_NAND_MAX_ECCPOS 1664
#define CONFIG_SYS_NAND_ONFI_DETECTION
#define CONFIG_SYS_MAX_NAND_DEVICE 8

#define CONFIG_MTD_DEVICE
#define CONFIG_MTD_PARTITIONS
#endif

#ifdef CONFIG_SPL_SPI_SUNXI
#define CONFIG_SYS_SPI_U_BOOT_OFFS	0x8000
#endif

/* mmc config */
#ifdef CONFIG_MMC
#define CONFIG_MMC_SUNXI_SLOT		0
#endif

#if defined(CONFIG_ENV_IS_IN_MMC)
#define CONFIG_SYS_MMC_ENV_DEV		0	/* first detected MMC controller */
#define CONFIG_SYS_MMC_MAX_DEVICE	4
#elif defined(CONFIG_ENV_IS_NOWHERE)
#define CONFIG_ENV_SIZE			(128 << 10)
#endif

#ifndef CONFIG_MACH_SUN8I_V3S
/* 64MB of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + (64 << 20))
#else
/* 2MB of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + (2 << 20))
#endif

/*
 * Miscellaneous configurable options
 */
#define CONFIG_SYS_CBSIZE	1024	/* Console I/O Buffer Size */
#define CONFIG_SYS_PBSIZE	1024	/* Print Buffer Size */
#define CONFIG_SYS_MAXARGS	16	/* max number of command args */

/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE

/* standalone support */
#define CONFIG_STANDALONE_LOAD_ADDR	CONFIG_SYS_LOAD_ADDR

/* FLASH and environment organization */

#define CONFIG_SYS_MONITOR_LEN		(768 << 10)	/* 768 KiB */

#define CONFIG_SPL_FRAMEWORK

#ifndef CONFIG_ARM64		/* AArch64 FEL support is not ready yet */
#define CONFIG_SPL_BOARD_LOAD_IMAGE
#endif

#ifdef CONFIG_SUNXI_HIGH_SRAM
#define CONFIG_SPL_TEXT_BASE		0x10060		/* sram start+header */
#define CONFIG_SPL_MAX_SIZE		0x7fa0		/* 32 KiB */
#ifdef CONFIG_ARM64
/* end of SRAM A2 for now, as SRAM A1 is pretty tight for an ARM64 build */
#define LOW_LEVEL_SRAM_STACK		0x00054000
#else
#define LOW_LEVEL_SRAM_STACK		0x00018000
#endif /* !CONFIG_ARM64 */
#else
#define CONFIG_SPL_TEXT_BASE		0x60		/* sram start+header */
#define CONFIG_SPL_MAX_SIZE		0x5fa0		/* 24KB on sun4i/sun7i */
#define LOW_LEVEL_SRAM_STACK		0x00008000	/* End of sram */
#endif

#define CONFIG_SPL_STACK		LOW_LEVEL_SRAM_STACK

#ifndef CONFIG_ARM64
#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds"
#endif

#define CONFIG_SPL_PAD_TO		32768		/* decimal for 'dd' */


/* I2C */
#if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || \
    defined CONFIG_SY8106A_POWER
#endif

#if defined CONFIG_I2C0_ENABLE || defined CONFIG_I2C1_ENABLE || \
    defined CONFIG_I2C2_ENABLE || defined CONFIG_I2C3_ENABLE || \
    defined CONFIG_I2C4_ENABLE || defined CONFIG_R_I2C_ENABLE
#define CONFIG_SYS_I2C_MVTWSI
#ifndef CONFIG_DM_I2C
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_SPEED		400000
#define CONFIG_SYS_I2C_SLAVE		0x7f
#endif
#endif

#if defined CONFIG_VIDEO_LCD_PANEL_I2C && !(defined CONFIG_SPL_BUILD)
#define CONFIG_SYS_I2C_SOFT
#define CONFIG_SYS_I2C_SOFT_SPEED	50000
#define CONFIG_SYS_I2C_SOFT_SLAVE	0x00
/* We use pin names in Kconfig and sunxi_name_to_gpio() */
#define CONFIG_SOFT_I2C_GPIO_SDA	soft_i2c_gpio_sda
#define CONFIG_SOFT_I2C_GPIO_SCL	soft_i2c_gpio_scl
#ifndef __ASSEMBLY__
extern int soft_i2c_gpio_sda;
extern int soft_i2c_gpio_scl;
#endif
#define CONFIG_VIDEO_LCD_I2C_BUS	0 /* The lcd panel soft i2c is bus 0 */
#define CONFIG_SYS_SPD_BUS_NUM		1 /* And the axp209 i2c bus is bus 1 */
#else
#define CONFIG_SYS_SPD_BUS_NUM		0 /* The axp209 i2c bus is bus 0 */
#define CONFIG_VIDEO_LCD_I2C_BUS	-1 /* NA, but necessary to compile */
#endif

/* PMU */
#if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || \
    defined CONFIG_AXP221_POWER || defined CONFIG_AXP818_POWER || \
    defined CONFIG_SY8106A_POWER
#endif

#ifdef CONFIG_REQUIRE_SERIAL_CONSOLE
#if CONFIG_CONS_INDEX == 1
#ifdef CONFIG_MACH_SUN9I
#define OF_STDOUT_PATH		"/soc/serial@07000000:115200"
#else
#define OF_STDOUT_PATH		"/soc@01c00000/serial@01c28000:115200"
#endif
#elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUN5I)
#define OF_STDOUT_PATH		"/soc@01c00000/serial@01c28400:115200"
#elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I)
#define OF_STDOUT_PATH		"/soc@01c00000/serial@01c28800:115200"
#elif CONFIG_CONS_INDEX == 5 && defined(CONFIG_MACH_SUN8I)
#define OF_STDOUT_PATH		"/soc@01c00000/serial@01f02800:115200"
#else
#error Unsupported console port nr. Please fix stdout-path in sunxi-common.h.
#endif
#endif /* ifdef CONFIG_REQUIRE_SERIAL_CONSOLE */

/* GPIO */
#define CONFIG_SUNXI_GPIO

#ifdef CONFIG_VIDEO
/*
 * The amount of RAM to keep free at the top of RAM when relocating u-boot,
 * to use as framebuffer. This must be a multiple of 4096.
 */
#define CONFIG_SUNXI_MAX_FB_SIZE (16 << 20)

/* Do we want to initialize a simple FB? */
#define CONFIG_VIDEO_DT_SIMPLEFB

#define CONFIG_VIDEO_SUNXI

#define CONFIG_VIDEO_LOGO
#define CONFIG_VIDEO_STD_TIMINGS
#define CONFIG_I2C_EDID
#define VIDEO_LINE_LEN (pGD->plnSizeX)

/* allow both serial and cfb console. */
/* stop x86 thinking in cfbconsole from trying to init a pc keyboard */

#endif /* CONFIG_VIDEO */

/* Ethernet support */
#ifdef CONFIG_SUNXI_EMAC
#define CONFIG_PHY_ADDR		1
#define CONFIG_MII			/* MII PHY management		*/
#endif

#ifdef CONFIG_SUNXI_GMAC
#define CONFIG_PHY_GIGE			/* GMAC can use gigabit PHY	*/
#define CONFIG_PHY_ADDR		1
#define CONFIG_MII			/* MII PHY management		*/
#define CONFIG_PHY_REALTEK
#endif

#ifdef CONFIG_USB_EHCI_HCD
#define CONFIG_USB_OHCI_NEW
#define CONFIG_USB_OHCI_SUNXI
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
#endif

#ifdef CONFIG_USB_MUSB_SUNXI
#define CONFIG_USB_MUSB_PIO_ONLY
#endif

#ifdef CONFIG_USB_MUSB_GADGET
#define CONFIG_USB_FUNCTION_FASTBOOT
#define CONFIG_USB_FUNCTION_MASS_STORAGE
#endif

#ifdef CONFIG_USB_FUNCTION_FASTBOOT
#define CONFIG_CMD_FASTBOOT
#define CONFIG_FASTBOOT_BUF_ADDR	CONFIG_SYS_LOAD_ADDR
#define CONFIG_FASTBOOT_BUF_SIZE	0x2000000
#define CONFIG_ANDROID_BOOT_IMAGE

#define CONFIG_FASTBOOT_FLASH

#ifdef CONFIG_MMC
#define CONFIG_FASTBOOT_FLASH_MMC_DEV	0
#endif
#endif

#ifdef CONFIG_USB_FUNCTION_MASS_STORAGE
#endif

#ifdef CONFIG_USB_KEYBOARD
#define CONFIG_PREBOOT
#define CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE
#endif

#define CONFIG_MISC_INIT_R

#ifndef CONFIG_SPL_BUILD
#include <config_distro_defaults.h>

#ifdef CONFIG_ARM64
/*
 * Boards seem to come with at least 512MB of DRAM.
 * The kernel should go at 512K, which is the default text offset (that will
 * be adjusted at runtime if needed).
 * There is no compression for arm64 kernels (yet), so leave some space
 * for really big kernels, say 256MB for now.
 * Scripts, PXE and DTBs should go afterwards, leaving the rest for the initrd.
 * Align the initrd to a 2MB page.
 */
#define BOOTM_SIZE	__stringify(0xa000000)
#define KERNEL_ADDR_R	__stringify(SDRAM_OFFSET(0080000))
#define FDT_ADDR_R	__stringify(SDRAM_OFFSET(FA00000))
#define SCRIPT_ADDR_R	__stringify(SDRAM_OFFSET(FC00000))
#define PXEFILE_ADDR_R	__stringify(SDRAM_OFFSET(FD00000))
#define RAMDISK_ADDR_R	__stringify(SDRAM_OFFSET(FE00000))

#else
/*
 * 160M RAM (256M minimum minus 64MB heap + 32MB for u-boot, stack, fb, etc.
 * 32M uncompressed kernel, 16M compressed kernel, 1M fdt,
 * 1M script, 1M pxe and the ramdisk at the end.
 */
#ifndef CONFIG_MACH_SUN8I_V3S
#define BOOTM_SIZE     __stringify(0xa000000)
#define KERNEL_ADDR_R  __stringify(SDRAM_OFFSET(2000000))
#define FDT_ADDR_R     __stringify(SDRAM_OFFSET(3000000))
#define SCRIPT_ADDR_R  __stringify(SDRAM_OFFSET(3100000))
#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(3200000))
#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(3300000))
#else
/*
 * 64M RAM minus 2MB heap + 16MB for u-boot, stack, fb, etc.
 * 16M uncompressed kernel, 8M compressed kernel, 1M fdt,
 * 1M script, 1M pxe and the ramdisk at the end.
 */
#define BOOTM_SIZE     __stringify(0x2e00000)
#define KERNEL_ADDR_R  __stringify(SDRAM_OFFSET(1000000))
#define FDT_ADDR_R     __stringify(SDRAM_OFFSET(1800000))
#define SCRIPT_ADDR_R  __stringify(SDRAM_OFFSET(1900000))
#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(1A00000))
#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(1B00000))
#endif
#endif

#define MEM_LAYOUT_ENV_SETTINGS \
	"bootm_size=" BOOTM_SIZE "\0" \
	"kernel_addr_r=" KERNEL_ADDR_R "\0" \
	"fdt_addr_r=" FDT_ADDR_R "\0" \
	"scriptaddr=" SCRIPT_ADDR_R "\0" \
	"pxefile_addr_r=" PXEFILE_ADDR_R "\0" \
	"ramdisk_addr_r=" RAMDISK_ADDR_R "\0"

#define DFU_ALT_INFO_RAM \
	"dfu_alt_info_ram=" \
	"kernel ram " KERNEL_ADDR_R " 0x1000000;" \
	"fdt ram " FDT_ADDR_R " 0x100000;" \
	"ramdisk ram " RAMDISK_ADDR_R " 0x4000000\0"

#ifdef CONFIG_MMC
#define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0)
#if CONFIG_MMC_SUNXI_SLOT_EXTRA != -1
#define BOOT_TARGET_DEVICES_MMC_EXTRA(func) func(MMC, mmc, 1)
#else
#define BOOT_TARGET_DEVICES_MMC_EXTRA(func)
#endif
#else
#define BOOT_TARGET_DEVICES_MMC(func)
#define BOOT_TARGET_DEVICES_MMC_EXTRA(func)
#endif

#ifdef CONFIG_AHCI
#define BOOT_TARGET_DEVICES_SCSI(func) func(SCSI, scsi, 0)
#else
#define BOOT_TARGET_DEVICES_SCSI(func)
#endif

#ifdef CONFIG_USB_STORAGE
#define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0)
#else
#define BOOT_TARGET_DEVICES_USB(func)
#endif

/* FEL boot support, auto-execute boot.scr if a script address was provided */
#define BOOTENV_DEV_FEL(devtypeu, devtypel, instance) \
	"bootcmd_fel=" \
		"if test -n ${fel_booted} && test -n ${fel_scriptaddr}; then " \
			"echo '(FEL boot)'; " \
			"source ${fel_scriptaddr}; " \
		"fi\0"
#define BOOTENV_DEV_NAME_FEL(devtypeu, devtypel, instance) \
	"fel "

#define BOOT_TARGET_DEVICES(func) \
	func(FEL, fel, na) \
	BOOT_TARGET_DEVICES_MMC(func) \
	BOOT_TARGET_DEVICES_MMC_EXTRA(func) \
	BOOT_TARGET_DEVICES_SCSI(func) \
	BOOT_TARGET_DEVICES_USB(func) \
	func(PXE, pxe, na) \
	func(DHCP, dhcp, na)

#ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT
#define BOOTCMD_SUNXI_COMPAT \
	"bootcmd_sunxi_compat=" \
		"setenv root /dev/mmcblk0p3 rootwait; " \
		"if ext2load mmc 0 0x44000000 uEnv.txt; then " \
			"echo Loaded environment from uEnv.txt; " \
			"env import -t 0x44000000 ${filesize}; " \
		"fi; " \
		"setenv bootargs console=${console} root=${root} ${extraargs}; " \
		"ext2load mmc 0 0x43000000 script.bin && " \
		"ext2load mmc 0 0x48000000 uImage && " \
		"bootm 0x48000000\0"
#else
#define BOOTCMD_SUNXI_COMPAT
#endif

#include <config_distro_bootcmd.h>

#ifdef CONFIG_USB_KEYBOARD
#define CONSOLE_STDIN_SETTINGS \
	"preboot=usb start\0" \
	"stdin=serial,usbkbd\0"
#else
#define CONSOLE_STDIN_SETTINGS \
	"stdin=serial\0"
#endif

#ifdef CONFIG_VIDEO
#define CONSOLE_STDOUT_SETTINGS \
	"stdout=serial,vga\0" \
	"stderr=serial,vga\0"
#elif CONFIG_DM_VIDEO
#define CONFIG_SYS_WHITE_ON_BLACK
#define CONSOLE_STDOUT_SETTINGS \
	"stdout=serial,vidconsole\0" \
	"stderr=serial,vidconsole\0"
#else
#define CONSOLE_STDOUT_SETTINGS \
	"stdout=serial\0" \
	"stderr=serial\0"
#endif

#ifdef CONFIG_MTDIDS_DEFAULT
#define SUNXI_MTDIDS_DEFAULT \
	"mtdids=" CONFIG_MTDIDS_DEFAULT "\0"
#else
#define SUNXI_MTDIDS_DEFAULT
#endif

#ifdef CONFIG_MTDPARTS_DEFAULT
#define SUNXI_MTDPARTS_DEFAULT \
	"mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0"
#else
#define SUNXI_MTDPARTS_DEFAULT
#endif

#define CONSOLE_ENV_SETTINGS \
	CONSOLE_STDIN_SETTINGS \
	CONSOLE_STDOUT_SETTINGS

#ifdef CONFIG_ARM64
#define FDTFILE "allwinner/" CONFIG_DEFAULT_DEVICE_TREE ".dtb"
#else
#define FDTFILE CONFIG_DEFAULT_DEVICE_TREE ".dtb"
#endif

#define CONFIG_EXTRA_ENV_SETTINGS \
	CONSOLE_ENV_SETTINGS \
	MEM_LAYOUT_ENV_SETTINGS \
	DFU_ALT_INFO_RAM \
	"fdtfile=" FDTFILE "\0" \
	"console=ttyS0,115200\0" \
	SUNXI_MTDIDS_DEFAULT \
	SUNXI_MTDPARTS_DEFAULT \
	BOOTCMD_SUNXI_COMPAT \
	BOOTENV

#else /* ifndef CONFIG_SPL_BUILD */
#define CONFIG_EXTRA_ENV_SETTINGS
#endif

#endif /* _SUNXI_COMMON_CONFIG_H */
Commit	Line	Data
cba69eee IC	1	/*
	2	* (C) Copyright 2012-2012 Henrik Nordstrom <henrik@henriknordstrom.net>
	3	*
	4	* (C) Copyright 2007-2011
	5	* Allwinner Technology Co., Ltd. <www.allwinnertech.com>
	6	* Tom Cubie <tangliang@allwinnertech.com>
	7	*
	8	* Configuration settings for the Allwinner sunxi series of boards.
	9	*
	10	* SPDX-License-Identifier: GPL-2.0+
	11	*/
	12
	13	#ifndef _SUNXI_COMMON_CONFIG_H
	14	#define _SUNXI_COMMON_CONFIG_H
	15
daf6d399	16	#include <asm/arch/cpu.h>
e049fe28 HG	17	#include <linux/stringify.h>
e049fe28 HG	18
77ef1369 SS	19	#ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT
	20	/*
	21	* The U-Boot workarounds bugs in the outdated buggy sunxi-3.4 kernels at the
	22	* expense of restricting some features, so the regular machine id values can
	23	* be used.
	24	*/
	25	# define CONFIG_MACH_TYPE_COMPAT_REV 0
	26	#else
	27	/*
	28	* A compatibility guard to prevent loading outdated buggy sunxi-3.4 kernels.
	29	* Only sunxi-3.4 kernels with appropriate fixes applied are able to pass
	30	* beyond the machine id check.
	31	*/
	32	# define CONFIG_MACH_TYPE_COMPAT_REV 1
	33	#endif
	34
d29adf8e AP	35	#ifdef CONFIG_ARM64
	36	#define CONFIG_BUILD_TARGET "u-boot.itb"
	37	#endif
	38
cba69eee	39	/* Serial & console */
cba69eee IC	40	#define CONFIG_SYS_NS16550_SERIAL
cba69eee IC	41	/* ns16550 reg in the low bits of cpu reg */
cba69eee	42	#define CONFIG_SYS_NS16550_CLK 24000000
4fb60552	43	#ifndef CONFIG_DM_SERIAL
1a81cf83 SG	44	# define CONFIG_SYS_NS16550_REG_SIZE -4
	45	# define CONFIG_SYS_NS16550_COM1 SUNXI_UART0_BASE
	46	# define CONFIG_SYS_NS16550_COM2 SUNXI_UART1_BASE
	47	# define CONFIG_SYS_NS16550_COM3 SUNXI_UART2_BASE
	48	# define CONFIG_SYS_NS16550_COM4 SUNXI_UART3_BASE
	49	# define CONFIG_SYS_NS16550_COM5 SUNXI_R_UART_BASE
	50	#endif
cba69eee	51
8a65f69c	52	/* CPU */
e4916e85	53	#define COUNTER_FREQUENCY 24000000
8a65f69c	54
e049fe28 HG	55	/*
	56	* The DRAM Base differs between some models. We cannot use macros for the
	57	* CONFIG_FOO defines which contain the DRAM base address since they end
	58	* up unexpanded in include/autoconf.mk .
	59	*
	60	* So we have to have this #ifdef #else #endif block for these.
	61	*/
	62	#ifdef CONFIG_MACH_SUN9I
	63	#define SDRAM_OFFSET(x) 0x2##x
	64	#define CONFIG_SYS_SDRAM_BASE 0x20000000
	65	#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* default load address */
	66	#define CONFIG_SYS_TEXT_BASE 0x2a000000
ff42d107 HG	67	/* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here
	68	* since it needs to fit in with the other values. By also #defining it
	69	* we get warnings if the Kconfig value mismatches. */
	70	#define CONFIG_SPL_STACK_R_ADDR 0x2fe00000
e049fe28 HG	71	#define CONFIG_SPL_BSS_START_ADDR 0x2ff80000
	72	#else
	73	#define SDRAM_OFFSET(x) 0x4##x
cba69eee	74	#define CONFIG_SYS_SDRAM_BASE 0x40000000
e049fe28	75	#define CONFIG_SYS_LOAD_ADDR 0x42000000 /* default load address */
c199489f IZ	76	/* V3s do not have enough memory to place code at 0x4a000000 */
c199489f IZ	77	#ifndef CONFIG_MACH_SUN8I_V3S
e049fe28	78	#define CONFIG_SYS_TEXT_BASE 0x4a000000
c199489f IZ	79	#else
	80	#define CONFIG_SYS_TEXT_BASE 0x42e00000
	81	#endif
ff42d107 HG	82	/* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here
	83	* since it needs to fit in with the other values. By also #defining it
	84	* we get warnings if the Kconfig value mismatches. */
	85	#define CONFIG_SPL_STACK_R_ADDR 0x4fe00000
e049fe28 HG	86	#define CONFIG_SPL_BSS_START_ADDR 0x4ff80000
	87	#endif
	88
	89	#define CONFIG_SPL_BSS_MAX_SIZE 0x00080000 /* 512 KiB */
e049fe28	90
bc613d85	91	#ifdef CONFIG_SUNXI_HIGH_SRAM
77fe9887 HG	92	/*
	93	* The A80's A1 sram starts at 0x00010000 rather then at 0x00000000 and is
	94	* slightly bigger. Note that it is possible to map the first 32 KiB of the
	95	* A1 at 0x00000000 like with older SoCs by writing 0x16aa0001 to the
	96	* undocumented 0x008000e0 SYS_CTRL register. Where the 16aa is a key and
	97	* the 1 actually activates the mapping of the first 32 KiB to 0x00000000.
	98	*/
	99	#define CONFIG_SYS_INIT_RAM_ADDR 0x10000
eb504fa1	100	#define CONFIG_SYS_INIT_RAM_SIZE 0x08000 /* FIXME: 40 KiB ? */
77fe9887	101	#else
cba69eee IC	102	#define CONFIG_SYS_INIT_RAM_ADDR 0x0
cba69eee IC	103	#define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* 32 KiB */
77fe9887	104	#endif
cba69eee IC	105
	106	#define CONFIG_SYS_INIT_SP_OFFSET \
	107	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
	108	#define CONFIG_SYS_INIT_SP_ADDR \
	109	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
	110
	111	#define CONFIG_NR_DRAM_BANKS 1
	112	#define PHYS_SDRAM_0 CONFIG_SYS_SDRAM_BASE
	113	#define PHYS_SDRAM_0_SIZE 0x80000000 /* 2 GiB */
	114
a6e50a88 IC	115	#ifdef CONFIG_AHCI
	116	#define CONFIG_LIBATA
	117	#define CONFIG_SCSI_AHCI
	118	#define CONFIG_SCSI_AHCI_PLAT
	119	#define CONFIG_SUNXI_AHCI
0751b138	120	#define CONFIG_SYS_64BIT_LBA
a6e50a88 IC	121	#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
	122	#define CONFIG_SYS_SCSI_MAX_LUN 1
	123	#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
	124	CONFIG_SYS_SCSI_MAX_LUN)
a6e50a88 IC	125	#endif
a6e50a88 IC	126
cba69eee IC	127	#define CONFIG_SETUP_MEMORY_TAGS
	128	#define CONFIG_CMDLINE_TAG
	129	#define CONFIG_INITRD_TAG
9f852211	130	#define CONFIG_SERIAL_TAG
cba69eee	131
e5268616	132	#ifdef CONFIG_NAND_SUNXI
a0dfa88b	133	#define CONFIG_SYS_NAND_MAX_ECCPOS 1664
4ccae81c BB	134	#define CONFIG_SYS_NAND_ONFI_DETECTION
4ccae81c BB	135	#define CONFIG_SYS_MAX_NAND_DEVICE 8
d482a8df HG	136
	137	#define CONFIG_MTD_DEVICE
	138	#define CONFIG_MTD_PARTITIONS
960caeba PZ	139	#endif
960caeba PZ	140
19e99fb4	141	#ifdef CONFIG_SPL_SPI_SUNXI
19e99fb4 SS	142	#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8000
	143	#endif
	144
e24ea55c	145	/* mmc config */
44c79879	146	#ifdef CONFIG_MMC
e24ea55c	147	#define CONFIG_MMC_SUNXI_SLOT 0
fb1c43cc MR	148	#endif
	149
	150	#if defined(CONFIG_ENV_IS_IN_MMC)
e24ea55c	151	#define CONFIG_SYS_MMC_ENV_DEV 0 /* first detected MMC controller */
ae042beb	152	#define CONFIG_SYS_MMC_MAX_DEVICE 4
d6a7e0cb MR	153	#elif defined(CONFIG_ENV_IS_NOWHERE)
d6a7e0cb MR	154	#define CONFIG_ENV_SIZE (128 << 10)
ff2b47f6	155	#endif
e24ea55c	156
c199489f	157	#ifndef CONFIG_MACH_SUN8I_V3S
5c965ed9 HG	158	/* 64MB of malloc() pool */
5c965ed9 HG	159	#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (64 << 20))
c199489f IZ	160	#else
	161	/* 2MB of malloc() pool */
	162	#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (2 << 20))
	163	#endif
cba69eee IC	164
	165	/*
	166	* Miscellaneous configurable options
	167	*/
06beadb0 IC	168	#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
06beadb0 IC	169	#define CONFIG_SYS_PBSIZE 1024 /* Print Buffer Size */
cba69eee	170	#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
cba69eee IC	171
	172	/* Boot Argument Buffer Size */
	173	#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
	174
cba69eee	175	/* standalone support */
e049fe28	176	#define CONFIG_STANDALONE_LOAD_ADDR CONFIG_SYS_LOAD_ADDR
cba69eee	177
cba69eee IC	178	/* FLASH and environment organization */
cba69eee IC	179
fa5e1020	180	#define CONFIG_SYS_MONITOR_LEN (768 << 10) /* 768 KiB */
cba69eee	181
cba69eee	182	#define CONFIG_SPL_FRAMEWORK
cba69eee	183
eb77f5c9	184	#ifndef CONFIG_ARM64 /* AArch64 FEL support is not ready yet */
942cb0b6	185	#define CONFIG_SPL_BOARD_LOAD_IMAGE
eb77f5c9	186	#endif
942cb0b6	187
bc613d85	188	#ifdef CONFIG_SUNXI_HIGH_SRAM
7f0ef5a9 SS	189	#define CONFIG_SPL_TEXT_BASE 0x10060 /* sram start+header */
7f0ef5a9 SS	190	#define CONFIG_SPL_MAX_SIZE 0x7fa0 /* 32 KiB */
54522c92 AP	191	#ifdef CONFIG_ARM64
	192	/* end of SRAM A2 for now, as SRAM A1 is pretty tight for an ARM64 build */
	193	#define LOW_LEVEL_SRAM_STACK 0x00054000
	194	#else
bc613d85	195	#define LOW_LEVEL_SRAM_STACK 0x00018000
54522c92	196	#endif /* !CONFIG_ARM64 */
d96ebc46	197	#else
7f0ef5a9 SS	198	#define CONFIG_SPL_TEXT_BASE 0x60 /* sram start+header */
7f0ef5a9 SS	199	#define CONFIG_SPL_MAX_SIZE 0x5fa0 /* 24KB on sun4i/sun7i */
bc613d85	200	#define LOW_LEVEL_SRAM_STACK 0x00008000 /* End of sram */
d96ebc46	201	#endif
50827a59	202
bc613d85 AP	203	#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
bc613d85 AP	204
d96ebc46	205	#ifndef CONFIG_ARM64
50827a59	206	#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds"
d96ebc46	207	#endif
50827a59	208
50827a59 IC	209	#define CONFIG_SPL_PAD_TO 32768 /* decimal for 'dd' */
50827a59 IC	210
cba69eee	211
6620377e	212	/* I2C */
0d8382ae JW	213	#if defined CONFIG_AXP152_POWER \|\| defined CONFIG_AXP209_POWER \|\| \
0d8382ae JW	214	defined CONFIG_SY8106A_POWER
ad40610b HG	215	#endif
ad40610b HG	216
6c739c5d PK	217	#if defined CONFIG_I2C0_ENABLE \|\| defined CONFIG_I2C1_ENABLE \|\| \
6c739c5d PK	218	defined CONFIG_I2C2_ENABLE \|\| defined CONFIG_I2C3_ENABLE \|\| \
9d082687	219	defined CONFIG_I2C4_ENABLE \|\| defined CONFIG_R_I2C_ENABLE
6620377e	220	#define CONFIG_SYS_I2C_MVTWSI
a8f01ccf JS	221	#ifndef CONFIG_DM_I2C
a8f01ccf JS	222	#define CONFIG_SYS_I2C
6620377e HG	223	#define CONFIG_SYS_I2C_SPEED 400000
6620377e HG	224	#define CONFIG_SYS_I2C_SLAVE 0x7f
8b2db32a	225	#endif
a8f01ccf	226	#endif
55410089 HG	227
	228	#if defined CONFIG_VIDEO_LCD_PANEL_I2C && !(defined CONFIG_SPL_BUILD)
	229	#define CONFIG_SYS_I2C_SOFT
	230	#define CONFIG_SYS_I2C_SOFT_SPEED 50000
	231	#define CONFIG_SYS_I2C_SOFT_SLAVE 0x00
55410089 HG	232	/* We use pin names in Kconfig and sunxi_name_to_gpio() */
	233	#define CONFIG_SOFT_I2C_GPIO_SDA soft_i2c_gpio_sda
	234	#define CONFIG_SOFT_I2C_GPIO_SCL soft_i2c_gpio_scl
	235	#ifndef __ASSEMBLY__
	236	extern int soft_i2c_gpio_sda;
	237	extern int soft_i2c_gpio_scl;
	238	#endif
1fc42018 HG	239	#define CONFIG_VIDEO_LCD_I2C_BUS 0 /* The lcd panel soft i2c is bus 0 */
	240	#define CONFIG_SYS_SPD_BUS_NUM 1 /* And the axp209 i2c bus is bus 1 */
	241	#else
	242	#define CONFIG_SYS_SPD_BUS_NUM 0 /* The axp209 i2c bus is bus 0 */
	243	#define CONFIG_VIDEO_LCD_I2C_BUS -1 /* NA, but necessary to compile */
55410089 HG	244	#endif
55410089 HG	245
14bc66bd	246	/* PMU */
95ab8fee	247	#if defined CONFIG_AXP152_POWER \|\| defined CONFIG_AXP209_POWER \|\| \
0d8382ae JW	248	defined CONFIG_AXP221_POWER \|\| defined CONFIG_AXP818_POWER \|\| \
0d8382ae JW	249	defined CONFIG_SY8106A_POWER
14bc66bd HN	250	#endif
14bc66bd HN	251
a5da3c83	252	#ifdef CONFIG_REQUIRE_SERIAL_CONSOLE
f3133962 HG	253	#if CONFIG_CONS_INDEX == 1
	254	#ifdef CONFIG_MACH_SUN9I
	255	#define OF_STDOUT_PATH "/soc/serial@07000000:115200"
	256	#else
	257	#define OF_STDOUT_PATH "/soc@01c00000/serial@01c28000:115200"
	258	#endif
	259	#elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUN5I)
	260	#define OF_STDOUT_PATH "/soc@01c00000/serial@01c28400:115200"
5cd83b11 LI	261	#elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I)
5cd83b11 LI	262	#define OF_STDOUT_PATH "/soc@01c00000/serial@01c28800:115200"
f3133962 HG	263	#elif CONFIG_CONS_INDEX == 5 && defined(CONFIG_MACH_SUN8I)
	264	#define OF_STDOUT_PATH "/soc@01c00000/serial@01f02800:115200"
	265	#else
	266	#error Unsupported console port nr. Please fix stdout-path in sunxi-common.h.
	267	#endif
a5da3c83	268	#endif /* ifdef CONFIG_REQUIRE_SERIAL_CONSOLE */
f3133962	269
abce2c62 IC	270	/* GPIO */
abce2c62 IC	271	#define CONFIG_SUNXI_GPIO
abce2c62	272
7f2c521f LV	273	#ifdef CONFIG_VIDEO
7f2c521f LV	274	/*
5633a296 HG	275	* The amount of RAM to keep free at the top of RAM when relocating u-boot,
5633a296 HG	276	* to use as framebuffer. This must be a multiple of 4096.
7f2c521f	277	*/
5c965ed9	278	#define CONFIG_SUNXI_MAX_FB_SIZE (16 << 20)
7f2c521f	279
2d7a084b LV	280	/* Do we want to initialize a simple FB? */
	281	#define CONFIG_VIDEO_DT_SIMPLEFB
	282
7f2c521f LV	283	#define CONFIG_VIDEO_SUNXI
7f2c521f LV	284
7f2c521f	285	#define CONFIG_VIDEO_LOGO
be8ec633	286	#define CONFIG_VIDEO_STD_TIMINGS
75481607	287	#define CONFIG_I2C_EDID
58332f89	288	#define VIDEO_LINE_LEN (pGD->plnSizeX)
7f2c521f LV	289
7f2c521f LV	290	/* allow both serial and cfb console. */
7f2c521f	291	/* stop x86 thinking in cfbconsole from trying to init a pc keyboard */
7f2c521f	292
7f2c521f LV	293	#endif /* CONFIG_VIDEO */
7f2c521f LV	294
c26fb9db HG	295	/* Ethernet support */
c26fb9db HG	296	#ifdef CONFIG_SUNXI_EMAC
8145dea4	297	#define CONFIG_PHY_ADDR 1
c26fb9db HG	298	#define CONFIG_MII /* MII PHY management */
	299	#endif
	300
5835823d	301	#ifdef CONFIG_SUNXI_GMAC
5835823d IC	302	#define CONFIG_PHY_GIGE /* GMAC can use gigabit PHY */
	303	#define CONFIG_PHY_ADDR 1
	304	#define CONFIG_MII /* MII PHY management */
1eae8f66	305	#define CONFIG_PHY_REALTEK
5835823d IC	306	#endif
5835823d IC	307
2582ca0d	308	#ifdef CONFIG_USB_EHCI_HCD
6a72e804 HG	309	#define CONFIG_USB_OHCI_NEW
	310	#define CONFIG_USB_OHCI_SUNXI
	311	#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
1a800f7a HG	312	#endif
	313
	314	#ifdef CONFIG_USB_MUSB_SUNXI
95de1e2f	315	#define CONFIG_USB_MUSB_PIO_ONLY
1a800f7a HG	316	#endif
1a800f7a HG	317
b21144eb	318	#ifdef CONFIG_USB_MUSB_GADGET
aaa4a9e3 SP	319	#define CONFIG_USB_FUNCTION_FASTBOOT
aaa4a9e3 SP	320	#define CONFIG_USB_FUNCTION_MASS_STORAGE
b21144eb PK	321	#endif
	322
	323	#ifdef CONFIG_USB_FUNCTION_FASTBOOT
	324	#define CONFIG_CMD_FASTBOOT
	325	#define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR
	326	#define CONFIG_FASTBOOT_BUF_SIZE 0x2000000
bac83fb0	327	#define CONFIG_ANDROID_BOOT_IMAGE
b21144eb PK	328
b21144eb PK	329	#define CONFIG_FASTBOOT_FLASH
44c79879 MR	330
44c79879 MR	331	#ifdef CONFIG_MMC
b21144eb	332	#define CONFIG_FASTBOOT_FLASH_MMC_DEV 0
b21144eb	333	#endif
44c79879	334	#endif
b21144eb PK	335
b21144eb PK	336	#ifdef CONFIG_USB_FUNCTION_MASS_STORAGE
b21144eb PK	337	#endif
b21144eb PK	338
86b49093	339	#ifdef CONFIG_USB_KEYBOARD
86b49093	340	#define CONFIG_PREBOOT
eab9433a	341	#define CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE
86b49093 HG	342	#endif
86b49093 HG	343
b41d7d05 JL	344	#define CONFIG_MISC_INIT_R
b41d7d05 JL	345
cba69eee IC	346	#ifndef CONFIG_SPL_BUILD
cba69eee IC	347	#include <config_distro_defaults.h>
2ec3a612	348
671f9ad8 AP	349	#ifdef CONFIG_ARM64
	350	/*
	351	* Boards seem to come with at least 512MB of DRAM.
	352	* The kernel should go at 512K, which is the default text offset (that will
	353	* be adjusted at runtime if needed).
	354	* There is no compression for arm64 kernels (yet), so leave some space
	355	* for really big kernels, say 256MB for now.
	356	* Scripts, PXE and DTBs should go afterwards, leaving the rest for the initrd.
	357	* Align the initrd to a 2MB page.
	358	*/
c199489f	359	#define BOOTM_SIZE __stringify(0xa000000)
671f9ad8 AP	360	#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(0080000))
	361	#define FDT_ADDR_R __stringify(SDRAM_OFFSET(FA00000))
	362	#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(FC00000))
	363	#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(FD00000))
	364	#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(FE00000))
	365
	366	#else
8c95c556	367	/*
5c965ed9	368	* 160M RAM (256M minimum minus 64MB heap + 32MB for u-boot, stack, fb, etc.
8c95c556 HG	369	* 32M uncompressed kernel, 16M compressed kernel, 1M fdt,
	370	* 1M script, 1M pxe and the ramdisk at the end.
	371	*/
c199489f IZ	372	#ifndef CONFIG_MACH_SUN8I_V3S
c199489f IZ	373	#define BOOTM_SIZE __stringify(0xa000000)
2a909c5f SS	374	#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(2000000))
	375	#define FDT_ADDR_R __stringify(SDRAM_OFFSET(3000000))
	376	#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(3100000))
	377	#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(3200000))
	378	#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(3300000))
c199489f IZ	379	#else
	380	/*
	381	* 64M RAM minus 2MB heap + 16MB for u-boot, stack, fb, etc.
	382	* 16M uncompressed kernel, 8M compressed kernel, 1M fdt,
	383	* 1M script, 1M pxe and the ramdisk at the end.
	384	*/
	385	#define BOOTM_SIZE __stringify(0x2e00000)
	386	#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(1000000))
	387	#define FDT_ADDR_R __stringify(SDRAM_OFFSET(1800000))
	388	#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(1900000))
	389	#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(1A00000))
	390	#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(1B00000))
	391	#endif
671f9ad8	392	#endif
2a909c5f	393
846e3254	394	#define MEM_LAYOUT_ENV_SETTINGS \
c199489f	395	"bootm_size=" BOOTM_SIZE "\0" \
2a909c5f SS	396	"kernel_addr_r=" KERNEL_ADDR_R "\0" \
	397	"fdt_addr_r=" FDT_ADDR_R "\0" \
	398	"scriptaddr=" SCRIPT_ADDR_R "\0" \
	399	"pxefile_addr_r=" PXEFILE_ADDR_R "\0" \
	400	"ramdisk_addr_r=" RAMDISK_ADDR_R "\0"
	401
	402	#define DFU_ALT_INFO_RAM \
	403	"dfu_alt_info_ram=" \
	404	"kernel ram " KERNEL_ADDR_R " 0x1000000;" \
	405	"fdt ram " FDT_ADDR_R " 0x100000;" \
	406	"ramdisk ram " RAMDISK_ADDR_R " 0x4000000\0"
846e3254	407
41f8e9f5 CYT	408	#ifdef CONFIG_MMC
41f8e9f5 CYT	409	#define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0)
5a37a400 KM	410	#if CONFIG_MMC_SUNXI_SLOT_EXTRA != -1
	411	#define BOOT_TARGET_DEVICES_MMC_EXTRA(func) func(MMC, mmc, 1)
	412	#else
	413	#define BOOT_TARGET_DEVICES_MMC_EXTRA(func)
	414	#endif
41f8e9f5 CYT	415	#else
41f8e9f5 CYT	416	#define BOOT_TARGET_DEVICES_MMC(func)
5a37a400	417	#define BOOT_TARGET_DEVICES_MMC_EXTRA(func)
41f8e9f5 CYT	418	#endif
41f8e9f5 CYT	419
2ec3a612 HG	420	#ifdef CONFIG_AHCI
	421	#define BOOT_TARGET_DEVICES_SCSI(func) func(SCSI, scsi, 0)
	422	#else
	423	#define BOOT_TARGET_DEVICES_SCSI(func)
	424	#endif
	425
2582ca0d	426	#ifdef CONFIG_USB_STORAGE
859b3f14 CYT	427	#define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0)
	428	#else
	429	#define BOOT_TARGET_DEVICES_USB(func)
	430	#endif
	431
f3b589c0 BN	432	/* FEL boot support, auto-execute boot.scr if a script address was provided */
	433	#define BOOTENV_DEV_FEL(devtypeu, devtypel, instance) \
	434	"bootcmd_fel=" \
	435	"if test -n ${fel_booted} && test -n ${fel_scriptaddr}; then " \
	436	"echo '(FEL boot)'; " \
	437	"source ${fel_scriptaddr}; " \
	438	"fi\0"
	439	#define BOOTENV_DEV_NAME_FEL(devtypeu, devtypel, instance) \
	440	"fel "
	441
2ec3a612	442	#define BOOT_TARGET_DEVICES(func) \
f3b589c0	443	func(FEL, fel, na) \
41f8e9f5	444	BOOT_TARGET_DEVICES_MMC(func) \
5a37a400	445	BOOT_TARGET_DEVICES_MMC_EXTRA(func) \
2ec3a612	446	BOOT_TARGET_DEVICES_SCSI(func) \
859b3f14	447	BOOT_TARGET_DEVICES_USB(func) \
2ec3a612 HG	448	func(PXE, pxe, na) \
	449	func(DHCP, dhcp, na)
	450
3b824025 HG	451	#ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT
	452	#define BOOTCMD_SUNXI_COMPAT \
	453	"bootcmd_sunxi_compat=" \
	454	"setenv root /dev/mmcblk0p3 rootwait; " \
	455	"if ext2load mmc 0 0x44000000 uEnv.txt; then " \
	456	"echo Loaded environment from uEnv.txt; " \
	457	"env import -t 0x44000000 ${filesize}; " \
	458	"fi; " \
	459	"setenv bootargs console=${console} root=${root} ${extraargs}; " \
	460	"ext2load mmc 0 0x43000000 script.bin && " \
	461	"ext2load mmc 0 0x48000000 uImage && " \
	462	"bootm 0x48000000\0"
	463	#else
	464	#define BOOTCMD_SUNXI_COMPAT
	465	#endif
	466
2ec3a612 HG	467	#include <config_distro_bootcmd.h>
2ec3a612 HG	468
86b49093 HG	469	#ifdef CONFIG_USB_KEYBOARD
	470	#define CONSOLE_STDIN_SETTINGS \
	471	"preboot=usb start\0" \
	472	"stdin=serial,usbkbd\0"
	473	#else
7f2c521f LV	474	#define CONSOLE_STDIN_SETTINGS \
7f2c521f LV	475	"stdin=serial\0"
86b49093	476	#endif
7f2c521f LV	477
	478	#ifdef CONFIG_VIDEO
	479	#define CONSOLE_STDOUT_SETTINGS \
	480	"stdout=serial,vga\0" \
	481	"stderr=serial,vga\0"
56009451 JS	482	#elif CONFIG_DM_VIDEO
	483	#define CONFIG_SYS_WHITE_ON_BLACK
	484	#define CONSOLE_STDOUT_SETTINGS \
	485	"stdout=serial,vidconsole\0" \
	486	"stderr=serial,vidconsole\0"
7f2c521f LV	487	#else
	488	#define CONSOLE_STDOUT_SETTINGS \
	489	"stdout=serial\0" \
	490	"stderr=serial\0"
	491	#endif
	492
c8564b24 MR	493	#ifdef CONFIG_MTDIDS_DEFAULT
	494	#define SUNXI_MTDIDS_DEFAULT \
	495	"mtdids=" CONFIG_MTDIDS_DEFAULT "\0"
	496	#else
	497	#define SUNXI_MTDIDS_DEFAULT
	498	#endif
	499
	500	#ifdef CONFIG_MTDPARTS_DEFAULT
	501	#define SUNXI_MTDPARTS_DEFAULT \
	502	"mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0"
	503	#else
	504	#define SUNXI_MTDPARTS_DEFAULT
	505	#endif
	506
7f2c521f LV	507	#define CONSOLE_ENV_SETTINGS \
	508	CONSOLE_STDIN_SETTINGS \
	509	CONSOLE_STDOUT_SETTINGS
	510
2eff3b71 AF	511	#ifdef CONFIG_ARM64
	512	#define FDTFILE "allwinner/" CONFIG_DEFAULT_DEVICE_TREE ".dtb"
	513	#else
	514	#define FDTFILE CONFIG_DEFAULT_DEVICE_TREE ".dtb"
	515	#endif
	516
2ec3a612	517	#define CONFIG_EXTRA_ENV_SETTINGS \
7f2c521f	518	CONSOLE_ENV_SETTINGS \
846e3254	519	MEM_LAYOUT_ENV_SETTINGS \
2a909c5f	520	DFU_ALT_INFO_RAM \
2eff3b71	521	"fdtfile=" FDTFILE "\0" \
846e3254	522	"console=ttyS0,115200\0" \
c8564b24 MR	523	SUNXI_MTDIDS_DEFAULT \
c8564b24 MR	524	SUNXI_MTDPARTS_DEFAULT \
3b824025	525	BOOTCMD_SUNXI_COMPAT \
2ec3a612 HG	526	BOOTENV
	527
	528	#else /* ifndef CONFIG_SPL_BUILD */
	529	#define CONFIG_EXTRA_ENV_SETTINGS
cba69eee IC	530	#endif
	531
	532	#endif /* _SUNXI_COMMON_CONFIG_H */