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dm: serial: Support changing the baud rate
[people/ms/u-boot.git] / include / configs / tegra-common.h
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1/*
2 * (C) Copyright 2010-2012
3 * NVIDIA Corporation <www.nvidia.com>
4 *
1a459660 5 * SPDX-License-Identifier: GPL-2.0+
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6 */
7
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8#ifndef _TEGRA_COMMON_H_
9#define _TEGRA_COMMON_H_
1ace4022 10#include <linux/sizes.h>
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11#include <linux/stringify.h>
12
13/*
14 * High Level Configuration Options
15 */
16#define CONFIG_ARMCORTEXA9 /* This is an ARM V7 CPU core */
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17#define CONFIG_SYS_L2CACHE_OFF /* No L2 cache */
18
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19#include <asm/arch/tegra.h> /* get chip and board defs */
20
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21#define CONFIG_DM
22#define CONFIG_CMD_DM
2fccd2d9 23#define CONFIG_DM_GPIO
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24#ifndef CONFIG_SPL_BUILD
25#define CONFIG_DM_SERIAL
26#endif
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27#define CONFIG_DM_SPI
28#define CONFIG_DM_SPI_FLASH
47f3d3c8 29
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30#define CONFIG_SYS_TIMER_RATE 1000000
31#define CONFIG_SYS_TIMER_COUNTER NV_PA_TMRUS_BASE
32
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33/*
34 * Display CPU and Board information
35 */
36#define CONFIG_DISPLAY_CPUINFO
37#define CONFIG_DISPLAY_BOARDINFO
38
39#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
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40
41/* Environment */
42#define CONFIG_ENV_VARS_UBOOT_CONFIG
43#define CONFIG_ENV_SIZE 0x2000 /* Total Size Environment */
44
45/*
46 * Size of malloc() pool
47 */
48#define CONFIG_SYS_MALLOC_LEN (4 << 20) /* 4MB */
a4741111 49#define CONFIG_SYS_MALLOC_F_LEN (1 << 10)
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50
51/*
bfcf46db 52 * NS16550 Configuration
f01b631f 53 */
858530a8 54#ifdef CONFIG_SPL_BUILD
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55#define CONFIG_SYS_NS16550_SERIAL
56#define CONFIG_SYS_NS16550_REG_SIZE (-4)
57#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
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58#else
59#define CONFIG_TEGRA_SERIAL
60#endif
61#define CONFIG_SYS_NS16550
f01b631f 62
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63/*
64 * Common HW configuration.
65 * If this varies between SoCs later, move to tegraNN-common.h
66 * Note: This is number of devices, not max device ID.
67 */
68#define CONFIG_SYS_MMC_MAX_DEVICE 4
69
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70/*
71 * select serial console configuration
72 */
73#define CONFIG_CONS_INDEX 1
74
75/* allow to overwrite serial and ethaddr */
76#define CONFIG_ENV_OVERWRITE
77#define CONFIG_BAUDRATE 115200
78
79/* include default commands */
80#include <config_cmd_default.h>
81
82/* remove unused commands */
83#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */
84#undef CONFIG_CMD_FPGA /* FPGA configuration support */
85#undef CONFIG_CMD_IMI
86#undef CONFIG_CMD_IMLS
87#undef CONFIG_CMD_NFS /* NFS support */
88#undef CONFIG_CMD_NET /* network support */
89
90/* turn on command-line edit/hist/auto */
f01b631f 91#define CONFIG_COMMAND_HISTORY
f01b631f 92
11d9c030 93/* turn on commonly used storage-related commands */
11d9c030 94#define CONFIG_PARTITION_UUIDS
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95#define CONFIG_CMD_PART
96
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97#define CONFIG_SYS_NO_FLASH
98
99#define CONFIG_CONSOLE_MUX
100#define CONFIG_SYS_CONSOLE_IS_IN_ENV
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101
102/*
103 * Miscellaneous configurable options
104 */
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105#define CONFIG_SYS_PROMPT V_PROMPT
106/*
107 * Increasing the size of the IO buffer as default nfsargs size is more
108 * than 256 and so it is not possible to edit it
109 */
110#define CONFIG_SYS_CBSIZE (256 * 2) /* Console I/O Buffer Size */
111/* Print Buffer Size */
112#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
113 sizeof(CONFIG_SYS_PROMPT) + 16)
114#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
115/* Boot Argument Buffer Size */
116#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
117
118#define CONFIG_SYS_MEMTEST_START (NV_PA_SDRC_CS0 + 0x600000)
119#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x100000)
120
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121#define CONFIG_USE_ARCH_MEMCPY
122
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123/*-----------------------------------------------------------------------
124 * Physical Memory Map
125 */
126#define CONFIG_NR_DRAM_BANKS 1
127#define PHYS_SDRAM_1 NV_PA_SDRC_CS0
128#define PHYS_SDRAM_1_SIZE 0x20000000 /* 512M */
129
130#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
131#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
132
133#define CONFIG_SYS_BOOTMAPSZ (256 << 20) /* 256M */
134
135#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_STACKBASE
136#define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN
137#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
138 CONFIG_SYS_INIT_RAM_SIZE - \
139 GENERATED_GBL_DATA_SIZE)
140
141#define CONFIG_TEGRA_GPIO
142#define CONFIG_CMD_GPIO
143#define CONFIG_CMD_ENTERRCM
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144
145/* Defines for SPL */
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146#define CONFIG_SPL_FRAMEWORK
147#define CONFIG_SPL_RAM_DEVICE
148#define CONFIG_SPL_BOARD_INIT
149#define CONFIG_SPL_NAND_SIMPLE
6ebc3461 150#define CONFIG_SPL_MAX_FOOTPRINT (CONFIG_SYS_TEXT_BASE - \
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151 CONFIG_SPL_TEXT_BASE)
152#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00010000
153
154#define CONFIG_SPL_LIBCOMMON_SUPPORT
155#define CONFIG_SPL_LIBGENERIC_SUPPORT
156#define CONFIG_SPL_SERIAL_SUPPORT
157#define CONFIG_SPL_GPIO_SUPPORT
158
dd7f65f6 159#define CONFIG_SYS_GENERIC_BOARD
3efff99f 160
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161/* Misc utility code */
162#define CONFIG_BOUNCE_BUFFER
3efff99f 163#define CONFIG_CRC32_VERIFY
dd7f65f6 164
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165#ifndef CONFIG_SPL_BUILD
166#include <config_distro_defaults.h>
167#endif
168
f01b631f 169#endif /* _TEGRA_COMMON_H_ */