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1/*
2 * ti_armv7_common.h
3 *
4 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 *
8 * The various ARMv7 SoCs from TI all share a number of IP blocks when
9 * implementing a given feature. Rather than define these in every
10 * board or even SoC common file, we define a common file to be re-used
11 * in all cases. While technically true that some of these details are
12 * configurable at the board design, they are common throughout SoC
13 * reference platforms as well as custom designs and become de facto
14 * standards.
15 */
16
17#ifndef __CONFIG_TI_ARMV7_COMMON_H__
18#define __CONFIG_TI_ARMV7_COMMON_H__
19
20/* Common define for many platforms. */
21#define CONFIG_OMAP
22#define CONFIG_OMAP_COMMON
23
24/*
25 * We typically do not contain NOR flash. In the cases where we do, we
26 * undefine this later.
27 */
28#define CONFIG_SYS_NO_FLASH
29
30/* Support both device trees and ATAGs. */
31#define CONFIG_OF_LIBFDT
32#define CONFIG_CMDLINE_TAG
33#define CONFIG_SETUP_MEMORY_TAGS
34#define CONFIG_INITRD_TAG
35
36/*
37 * Our DDR memory always starts at 0x80000000 and U-Boot shall have
38 * relocated itself to higher in memory by the time this value is used.
39 */
40#define CONFIG_SYS_LOAD_ADDR 0x80000000
41
42/*
43 * Default to a quick boot delay.
44 */
45#define CONFIG_BOOTDELAY 1
46
47/*
48 * DDR information. We say (for simplicity) that we have 1 bank,
49 * always, even when we have more. We always start at 0x80000000,
50 * and we place the initial stack pointer in our SRAM.
51 */
52#define CONFIG_NR_DRAM_BANKS 1
53#define CONFIG_SYS_SDRAM_BASE 0x80000000
54#define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \
55 GENERATED_GBL_DATA_SIZE)
56
57/* Timer information. */
58#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
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59
60/* I2C IP block */
61#define CONFIG_I2C
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62#define CONFIG_HARD_I2C
63#define CONFIG_SYS_I2C_SPEED 100000
64#define CONFIG_SYS_I2C_SLAVE 1
65#define CONFIG_I2C_MULTI_BUS
66#define CONFIG_DRIVER_OMAP24XX_I2C
1dd44e5a 67#define CONFIG_CMD_I2C
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68
69/* MMC/SD IP block */
70#define CONFIG_MMC
71#define CONFIG_GENERIC_MMC
72#define CONFIG_OMAP_HSMMC
73#define CONFIG_CMD_MMC
74
75/* McSPI IP block */
76#define CONFIG_SPI
77#define CONFIG_OMAP3_SPI
0fedc4a5 78#define CONFIG_CMD_SPI
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79
80/* GPIO block */
81#define CONFIG_OMAP_GPIO
a1665ed1 82#define CONFIG_CMD_GPIO
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83
84/*
85 * GPMC NAND block. We support 1 device and the physical address to
86 * access CS0 at is 0x8000000.
87 */
88#ifdef CONFIG_NAND
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89#define CONFIG_NAND_OMAP_GPMC
90#define CONFIG_SYS_NAND_BASE 0x8000000
91#define CONFIG_SYS_MAX_NAND_DEVICE 1
1dd44e5a 92#define CONFIG_CMD_NAND
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93#endif
94
95/*
96 * The following are general good-enough settings for U-Boot. We set a
97 * large malloc pool as we generally have a lot of DDR, and we opt for
98 * function over binary size in the main portion of U-Boot as this is
99 * generally easily constrained later if needed. We enable the config
100 * options that give us information in the environment about what board
101 * we are on so we do not need to rely on the command prompt. We set a
102 * console baudrate of 115200 and use the default baud rate table.
103 */
104#define CONFIG_SYS_MALLOC_LEN (1024 << 10)
87694558 105#define CONFIG_SYS_HUSH_PARSER
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106#define CONFIG_SYS_PROMPT "U-Boot# "
107#define CONFIG_SYS_CONSOLE_INFO_QUIET
108#define CONFIG_BAUDRATE 115200
109#define CONFIG_ENV_VARS_UBOOT_CONFIG /* Strongly encouraged */
110#define CONFIG_ENV_OVERWRITE /* Overwrite ethaddr / serial# */
111
112/* As stated above, the following choices are optional. */
113#define CONFIG_SYS_LONGHELP
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114#define CONFIG_AUTO_COMPLETE
115#define CONFIG_CMDLINE_EDITING
87694558 116#define CONFIG_VERSION_VARIABLE
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117
118/* We set the max number of command args high to avoid HUSH bugs. */
119#define CONFIG_SYS_MAXARGS 64
120
121/* Console I/O Buffer Size */
122#define CONFIG_SYS_CBSIZE 512
123/* Print Buffer Size */
124#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \
125 + sizeof(CONFIG_SYS_PROMPT) + 16)
126/* Boot Argument Buffer Size */
127#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
128
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129/*
130 * When we have SPI, NOR or NAND flash we expect to be making use of
131 * mtdparts, both for ease of use in U-Boot and for passing information
132 * on to the Linux kernel.
133 */
134#if defined(CONFIG_SPI_BOOT) || defined(CONFIG_NOR) || defined(CONFIG_NAND)
135#define CONFIG_MTD_DEVICE /* Required for mtdparts */
136#define CONFIG_CMD_MTDPARTS
137#endif
138
139/*
140 * For commands to use, we take the default list and add a few other
141 * useful commands. Note that we must have set CONFIG_SYS_NO_FLASH
142 * prior to this include, in order to skip a few commands. When we do
143 * have flash, if we expect these commands they must be enabled in that
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144 * config. If desired, a specific list of desired commands can be used
145 * instead.
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146 */
147#include <config_cmd_default.h>
148#define CONFIG_CMD_ASKENV
149#define CONFIG_CMD_ECHO
150#define CONFIG_CMD_BOOTZ
151
152/*
153 * Common filesystems support. When we have removable storage we
154 * enabled a number of useful commands and support.
155 */
156#if defined(CONFIG_MMC) || defined(CONFIG_USB_STORAGE)
157#define CONFIG_DOS_PARTITION
158#define CONFIG_CMD_FAT
159#define CONFIG_FAT_WRITE
160#define CONFIG_CMD_EXT2
161#define CONFIG_CMD_EXT4
162#define CONFIG_CMD_FS_GENERIC
163#endif
164
165/*
166 * Our platforms make use of SPL to initalize the hardware (primarily
167 * memory) enough for full U-Boot to be loaded. We also support Falcon
168 * Mode so that the Linux kernel can be booted directly from SPL
169 * instead, if desired. We make use of the general SPL framework found
170 * under common/spl/. Given our generally common memory map, we set a
171 * number of related defaults and sizes here.
172 */
173#ifndef CONFIG_NOR_BOOT
174#define CONFIG_SPL
175#define CONFIG_SPL_FRAMEWORK
176#define CONFIG_SPL_OS_BOOT
177
178/*
179 * Place the image at the start of the ROM defined image space.
180 * We limit our size to the ROM-defined downloaded image area, and use the
181 * rest of the space for stack. We load U-Boot itself into memory at
182 * 0x80800000 for legacy reasons (to not conflict with older SPLs). We
183 * have our BSS be placed 1MiB after this, to allow for the default
184 * Linux kernel address of 0x80008000 to work, in the Falcon Mode case.
185 * We have the SPL malloc pool at the end of the BSS area.
186 */
187#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR
188#define CONFIG_SYS_TEXT_BASE 0x80800000
189#define CONFIG_SPL_BSS_START_ADDR 0x80a00000
190#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */
191#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \
192 CONFIG_SPL_BSS_MAX_SIZE)
193#define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN
194
195/* RAW SD card / eMMC locations. */
196#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
197#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
198
199/* FAT sd card locations. */
200#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1
201#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img"
202
203#ifdef CONFIG_SPL_OS_BOOT
552998e5 204#define CONFIG_SYS_SPL_ARGS_ADDR 0x80F80000
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205
206/* FAT */
207#define CONFIG_SPL_FAT_LOAD_KERNEL_NAME "uImage"
208#define CONFIG_SPL_FAT_LOAD_ARGS_NAME "args"
209
210/* RAW SD card / eMMC */
211#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x900 /* address 0x120000 */
212#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x80 /* address 0x10000 */
213#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0x80 /* 64KiB */
214
215/* NAND */
216#ifdef CONFIG_NAND
217#define CONFIG_CMD_SPL_NAND_OFS 0x240000 /* end of u-boot */
218#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
219#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
220#endif
221
222/* spl export command */
223#define CONFIG_CMD_SPL
224#endif
225
226#ifdef CONFIG_MMC
a7142dd0 227#define CONFIG_SPL_LIBDISK_SUPPORT
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228#define CONFIG_SPL_MMC_SUPPORT
229#define CONFIG_SPL_FAT_SUPPORT
230#endif
231
a7142dd0 232/* General parts of the framework, required. */
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233#define CONFIG_SPL_I2C_SUPPORT
234#define CONFIG_SPL_LIBCOMMON_SUPPORT
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235#define CONFIG_SPL_LIBGENERIC_SUPPORT
236#define CONFIG_SPL_SERIAL_SUPPORT
237#define CONFIG_SPL_GPIO_SUPPORT
238#define CONFIG_SPL_BOARD_INIT
239
240#ifdef CONFIG_NAND
241#define CONFIG_SPL_NAND_AM33XX_BCH /* OMAP4 and later ELM support */
242#define CONFIG_SPL_NAND_SUPPORT
243#define CONFIG_SPL_NAND_BASE
244#define CONFIG_SPL_NAND_DRIVERS
245#define CONFIG_SPL_NAND_ECC
246#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
247#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
248#endif
249#endif /* !CONFIG_NOR_BOOT */
250
251#endif /* __CONFIG_TI_ARMV7_COMMON_H__ */