[people/ms/u-boot.git] / include / configs / vpac270.h

/*
 * Voipac PXA270 configuration file
 *
 * Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com>
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef	__CONFIG_H
#define	__CONFIG_H

/*
 * High Level Board Configuration Options
 */
#define	CONFIG_CPU_PXA27X		1	/* Marvell PXA270 CPU */
#define	CONFIG_VPAC270		1	/* Voipac PXA270 board */
#define	CONFIG_SYS_TEXT_BASE	0xa0000000

#ifdef	CONFIG_ONENAND
#define	CONFIG_SPL
#define	CONFIG_SPL_ONENAND_SUPPORT
#define	CONFIG_SPL_ONENAND_LOAD_ADDR	0x2000
#define	CONFIG_SPL_ONENAND_LOAD_SIZE	\
	(512 * 1024 - CONFIG_SPL_ONENAND_LOAD_ADDR)
#define	CONFIG_SPL_TEXT_BASE	0x5c000000
#define	CONFIG_SPL_LDSCRIPT	"board/vpac270/u-boot-spl.lds"
#endif

/*
 * Environment settings
 */
#define	CONFIG_ENV_OVERWRITE
#define	CONFIG_SYS_MALLOC_LEN		(128*1024)
#define	CONFIG_ARCH_CPU_INIT
#define	CONFIG_BOOTCOMMAND						\
	"if mmc init && fatload mmc 0 0xa4000000 uImage; then "		\
		"bootm 0xa4000000; "					\
	"fi; "								\
	"if usb reset && fatload usb 0 0xa4000000 uImage; then "	\
		"bootm 0xa4000000; "					\
	"fi; "								\
	"if ide reset && fatload ide 0 0xa4000000 uImage; then "	\
		"bootm 0xa4000000; "					\
	"fi; "								\
	"bootm 0x60000;"

#define	CONFIG_EXTRA_ENV_SETTINGS					\
	"update_onenand="						\
		"onenand erase 0x0 0x80000 ; "				\
		"onenand write 0xa0000000 0x0 0x80000"

#define	CONFIG_BOOTARGS			"console=tty0 console=ttyS0,115200"
#define	CONFIG_TIMESTAMP
#define	CONFIG_BOOTDELAY		2	/* Autoboot delay */
#define	CONFIG_CMDLINE_TAG
#define	CONFIG_SETUP_MEMORY_TAGS
#define	CONFIG_LZMA			/* LZMA compression support */
#define	CONFIG_OF_LIBFDT

/*
 * Serial Console Configuration
 */
#define	CONFIG_PXA_SERIAL
#define	CONFIG_FFUART			1
#define CONFIG_CONS_INDEX		3
#define	CONFIG_BAUDRATE			115200

/*
 * Bootloader Components Configuration
 */
#include <config_cmd_default.h>

#define	CONFIG_CMD_NET
#define	CONFIG_CMD_ENV
#undef	CONFIG_CMD_IMLS
#define	CONFIG_CMD_MMC
#define	CONFIG_CMD_USB
#undef	CONFIG_LCD
#define	CONFIG_CMD_IDE

#ifdef	CONFIG_ONENAND
#undef	CONFIG_CMD_FLASH
#define	CONFIG_CMD_ONENAND
#else
#define	CONFIG_CMD_FLASH
#undef	CONFIG_CMD_ONENAND
#endif

/*
 * Networking Configuration
 *  chip on the Voipac PXA270 board
 */
#ifdef	CONFIG_CMD_NET
#define	CONFIG_CMD_PING
#define	CONFIG_CMD_DHCP

#define	CONFIG_DRIVER_DM9000		1
#define	CONFIG_DM9000_BASE		0x08000300	/* CS2 */
#define	DM9000_IO			(CONFIG_DM9000_BASE)
#define	DM9000_DATA			(CONFIG_DM9000_BASE + 4)
#define	CONFIG_NET_RETRY_COUNT		10

#define	CONFIG_BOOTP_BOOTFILESIZE
#define	CONFIG_BOOTP_BOOTPATH
#define	CONFIG_BOOTP_GATEWAY
#define	CONFIG_BOOTP_HOSTNAME
#endif

/*
 * MMC Card Configuration
 */
#ifdef	CONFIG_CMD_MMC
#define	CONFIG_MMC
#define	CONFIG_GENERIC_MMC
#define	CONFIG_PXA_MMC_GENERIC
#define	CONFIG_SYS_MMC_BASE		0xF0000000
#define	CONFIG_CMD_FAT
#define	CONFIG_CMD_EXT2
#define	CONFIG_DOS_PARTITION
#endif

/*
 * KGDB
 */
#ifdef	CONFIG_CMD_KGDB
#define	CONFIG_KGDB_BAUDRATE		230400	/* kgdb serial port speed */
#define	CONFIG_KGDB_SER_INDEX		2	/* which serial port to use */
#endif

/*
 * HUSH Shell Configuration
 */
#define	CONFIG_SYS_HUSH_PARSER		1

#define	CONFIG_SYS_LONGHELP
#ifdef	CONFIG_SYS_HUSH_PARSER
#define	CONFIG_SYS_PROMPT		"$ "
#else
#endif
#define	CONFIG_SYS_CBSIZE		256
#define	CONFIG_SYS_PBSIZE		\
	(CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
#define	CONFIG_SYS_MAXARGS		16
#define	CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
#define	CONFIG_SYS_DEVICE_NULLDEV	1
#define	CONFIG_CMDLINE_EDITING		1
#define	CONFIG_AUTO_COMPLETE		1

/*
 * Clock Configuration
 */
#define	CONFIG_SYS_CPUSPEED		0x190		/* 312MHz */


/*
 * DRAM Map
 */
#define	CONFIG_NR_DRAM_BANKS		2		/* 2 banks of DRAM */
#define	PHYS_SDRAM_1			0xa0000000	/* SDRAM Bank #1 */
#define	PHYS_SDRAM_1_SIZE		0x08000000	/* 128 MB */

#ifdef	CONFIG_RAM_256M
#define	PHYS_SDRAM_2			0x80000000	/* SDRAM Bank #2 */
#define	PHYS_SDRAM_2_SIZE		0x08000000	/* 128 MB */
#endif

#define	CONFIG_SYS_DRAM_BASE		0xa0000000	/* CS0 */
#ifdef	CONFIG_RAM_256M
#define	CONFIG_SYS_DRAM_SIZE		0x10000000	/* 256 MB DRAM */
#else
#define	CONFIG_SYS_DRAM_SIZE		0x08000000	/* 128 MB DRAM */
#endif

#define	CONFIG_SYS_MEMTEST_START	0xa0400000	/* memtest works on */
#define	CONFIG_SYS_MEMTEST_END		0xa0800000	/* 4 ... 8 MB in DRAM */

#define	CONFIG_SYS_LOAD_ADDR		PHYS_SDRAM_1
#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
#define	CONFIG_SYS_INIT_SP_ADDR		0x5c010000

/*
 * NOR FLASH
 */
#define	CONFIG_SYS_MONITOR_BASE		0x0
#define	CONFIG_SYS_MONITOR_LEN		0x80000
#define	CONFIG_ENV_ADDR			\
			(CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
#define	CONFIG_ENV_SIZE			0x20000
#define	CONFIG_ENV_SECT_SIZE		0x20000

#if	defined(CONFIG_CMD_FLASH)	/* NOR */
#define	PHYS_FLASH_1			0x00000000	/* Flash Bank #1 */

#ifdef	CONFIG_RAM_256M
#define	PHYS_FLASH_2			0x02000000	/* Flash Bank #2 */
#endif

#define	CONFIG_SYS_FLASH_CFI
#define	CONFIG_FLASH_CFI_DRIVER		1

#define	CONFIG_SYS_MAX_FLASH_SECT	(4 + 255)
#ifdef	CONFIG_RAM_256M
#define	CONFIG_SYS_MAX_FLASH_BANKS	2
#define	CONFIG_SYS_FLASH_BANKS_LIST	{ PHYS_FLASH_1, PHYS_FLASH_2 }
#else
#define	CONFIG_SYS_MAX_FLASH_BANKS	1
#define	CONFIG_SYS_FLASH_BASE		PHYS_FLASH_1
#endif

#define	CONFIG_SYS_FLASH_ERASE_TOUT	(25*CONFIG_SYS_HZ)
#define	CONFIG_SYS_FLASH_WRITE_TOUT	(25*CONFIG_SYS_HZ)

#define	CONFIG_SYS_FLASH_USE_BUFFER_WRITE	1
#define	CONFIG_SYS_FLASH_PROTECTION		1

#define	CONFIG_ENV_IS_IN_FLASH		1

#elif	defined(CONFIG_CMD_ONENAND)	/* OneNAND */
#define	CONFIG_SYS_NO_FLASH
#define	CONFIG_SYS_ONENAND_BASE		0x00000000

#define	CONFIG_ENV_IS_IN_ONENAND	1

#else	/* No flash */
#define	CONFIG_SYS_NO_FLASH
#define	CONFIG_SYS_ENV_IS_NOWHERE
#endif

/*
 * IDE
 */
#ifdef	CONFIG_CMD_IDE
#define	CONFIG_LBA48
#undef	CONFIG_IDE_LED
#undef	CONFIG_IDE_RESET

#define	__io

#define	CONFIG_SYS_IDE_MAXBUS		1
#define	CONFIG_SYS_IDE_MAXDEVICE	1

#define	CONFIG_SYS_ATA_BASE_ADDR	0x0c000000
#define	CONFIG_SYS_ATA_IDE0_OFFSET	0x0

#define	CONFIG_SYS_ATA_DATA_OFFSET	0x120
#define	CONFIG_SYS_ATA_REG_OFFSET	0x120
#define	CONFIG_SYS_ATA_ALT_OFFSET	0x120

#define	CONFIG_SYS_ATA_STRIDE		2
#endif

/*
 * GPIO settings
 */
#define	CONFIG_SYS_GPSR0_VAL	0x01308800
#define	CONFIG_SYS_GPSR1_VAL	0x00cf0000
#define	CONFIG_SYS_GPSR2_VAL	0x922ac000
#define	CONFIG_SYS_GPSR3_VAL	0x0161e800

#define	CONFIG_SYS_GPCR0_VAL	0x00010000
#define	CONFIG_SYS_GPCR1_VAL	0x0
#define	CONFIG_SYS_GPCR2_VAL	0x0
#define	CONFIG_SYS_GPCR3_VAL	0x0

#define	CONFIG_SYS_GPDR0_VAL	0xcbb18800
#define	CONFIG_SYS_GPDR1_VAL	0xfccfa981
#define	CONFIG_SYS_GPDR2_VAL	0x922affff
#define	CONFIG_SYS_GPDR3_VAL	0x0161e904

#define	CONFIG_SYS_GAFR0_L_VAL	0x00100000
#define	CONFIG_SYS_GAFR0_U_VAL	0xa5da8510
#define	CONFIG_SYS_GAFR1_L_VAL	0x6992901a
#define	CONFIG_SYS_GAFR1_U_VAL	0xaaa5a0aa
#define	CONFIG_SYS_GAFR2_L_VAL	0xaaaaaaaa
#define	CONFIG_SYS_GAFR2_U_VAL	0x4109a401
#define	CONFIG_SYS_GAFR3_L_VAL	0x54010310
#define	CONFIG_SYS_GAFR3_U_VAL	0x00025401

#define	CONFIG_SYS_PSSR_VAL	0x30

/*
 * Clock settings
 */
#define	CONFIG_SYS_CKEN		0x00500240
#define	CONFIG_SYS_CCCR		0x02000290

/*
 * Memory settings
 */
#define	CONFIG_SYS_MSC0_VAL	0x3ffc95fa
#define	CONFIG_SYS_MSC1_VAL	0x02ccf974
#define	CONFIG_SYS_MSC2_VAL	0x00000000
#ifdef	CONFIG_RAM_256M
#define	CONFIG_SYS_MDCNFG_VAL	0x8ad30ad3
#else
#define	CONFIG_SYS_MDCNFG_VAL	0x88000ad3
#endif
#define	CONFIG_SYS_MDREFR_VAL	0x201fe01e
#define	CONFIG_SYS_MDMRS_VAL	0x00000000
#define	CONFIG_SYS_FLYCNFG_VAL	0x00000000
#define	CONFIG_SYS_SXCNFG_VAL	0x40044004
#define	CONFIG_SYS_MEM_BUF_IMP	0x0f

/*
 * PCMCIA and CF Interfaces
 */
#define	CONFIG_SYS_MECR_VAL	0x00000001
#define	CONFIG_SYS_MCMEM0_VAL	0x00014307
#define	CONFIG_SYS_MCMEM1_VAL	0x00014307
#define	CONFIG_SYS_MCATT0_VAL	0x0001c787
#define	CONFIG_SYS_MCATT1_VAL	0x0001c787
#define	CONFIG_SYS_MCIO0_VAL	0x0001430f
#define	CONFIG_SYS_MCIO1_VAL	0x0001430f

/*
 * LCD
 */
#ifdef	CONFIG_LCD
#define	CONFIG_VOIPAC_LCD
#endif

/*
 * USB
 */
#ifdef	CONFIG_CMD_USB
#define	CONFIG_USB_OHCI_NEW
#define	CONFIG_SYS_USB_OHCI_CPU_INIT
#define	CONFIG_SYS_USB_OHCI_BOARD_INIT
#define	CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	2
#define	CONFIG_SYS_USB_OHCI_REGS_BASE	0x4C000000
#define	CONFIG_SYS_USB_OHCI_SLOT_NAME	"vpac270"
#define	CONFIG_USB_STORAGE
#endif

#endif	/* __CONFIG_H */
Commit	Line	Data
18a00dfd MV	1	/*
	2	* Voipac PXA270 configuration file
	3	*
	4	* Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com>
	5	*
1a459660	6	* SPDX-License-Identifier: GPL-2.0+
18a00dfd MV	7	*/
18a00dfd MV	8
f905432c MV	9	#ifndef __CONFIG_H
f905432c MV	10	#define __CONFIG_H
18a00dfd MV	11
	12	/*
	13	* High Level Board Configuration Options
	14	*/
abc20aba	15	#define CONFIG_CPU_PXA27X 1 /* Marvell PXA270 CPU */
18a00dfd	16	#define CONFIG_VPAC270 1 /* Voipac PXA270 board */
411b9eaf MV	17	#define CONFIG_SYS_TEXT_BASE 0xa0000000
	18
	19	#ifdef CONFIG_ONENAND
	20	#define CONFIG_SPL
	21	#define CONFIG_SPL_ONENAND_SUPPORT
	22	#define CONFIG_SPL_ONENAND_LOAD_ADDR 0x2000
	23	#define CONFIG_SPL_ONENAND_LOAD_SIZE \
	24	(512 * 1024 - CONFIG_SPL_ONENAND_LOAD_ADDR)
	25	#define CONFIG_SPL_TEXT_BASE 0x5c000000
	26	#define CONFIG_SPL_LDSCRIPT "board/vpac270/u-boot-spl.lds"
	27	#endif
18a00dfd	28
18a00dfd MV	29	/*
	30	* Environment settings
	31	*/
f905432c MV	32	#define CONFIG_ENV_OVERWRITE
f905432c MV	33	#define CONFIG_SYS_MALLOC_LEN (128*1024)
720a650c	34	#define CONFIG_ARCH_CPU_INIT
18a00dfd MV	35	#define CONFIG_BOOTCOMMAND \
	36	"if mmc init && fatload mmc 0 0xa4000000 uImage; then " \
	37	"bootm 0xa4000000; " \
	38	"fi; " \
	39	"if usb reset && fatload usb 0 0xa4000000 uImage; then " \
	40	"bootm 0xa4000000; " \
	41	"fi; " \
f905432c MV	42	"if ide reset && fatload ide 0 0xa4000000 uImage; then " \
	43	"bootm 0xa4000000; " \
	44	"fi; " \
11934fbf	45	"bootm 0x60000;"
411b9eaf MV	46
	47	#define CONFIG_EXTRA_ENV_SETTINGS \
	48	"update_onenand=" \
	49	"onenand erase 0x0 0x80000 ; " \
	50	"onenand write 0xa0000000 0x0 0x80000"
	51
18a00dfd MV	52	#define CONFIG_BOOTARGS "console=tty0 console=ttyS0,115200"
	53	#define CONFIG_TIMESTAMP
	54	#define CONFIG_BOOTDELAY 2 /* Autoboot delay */
	55	#define CONFIG_CMDLINE_TAG
	56	#define CONFIG_SETUP_MEMORY_TAGS
18a00dfd	57	#define CONFIG_LZMA /* LZMA compression support */
411b9eaf	58	#define CONFIG_OF_LIBFDT
18a00dfd MV	59
	60	/*
	61	* Serial Console Configuration
	62	*/
	63	#define CONFIG_PXA_SERIAL
	64	#define CONFIG_FFUART 1
ce6971cd	65	#define CONFIG_CONS_INDEX 3
18a00dfd	66	#define CONFIG_BAUDRATE 115200
18a00dfd MV	67
	68	/*
	69	* Bootloader Components Configuration
	70	*/
	71	#include <config_cmd_default.h>
	72
	73	#define CONFIG_CMD_NET
	74	#define CONFIG_CMD_ENV
	75	#undef CONFIG_CMD_IMLS
	76	#define CONFIG_CMD_MMC
	77	#define CONFIG_CMD_USB
	78	#undef CONFIG_LCD
	79	#define CONFIG_CMD_IDE
	80
f97e9c65	81	#ifdef CONFIG_ONENAND
18a00dfd MV	82	#undef CONFIG_CMD_FLASH
	83	#define CONFIG_CMD_ONENAND
	84	#else
	85	#define CONFIG_CMD_FLASH
	86	#undef CONFIG_CMD_ONENAND
	87	#endif
	88
	89	/*
	90	* Networking Configuration
	91	* chip on the Voipac PXA270 board
	92	*/
	93	#ifdef CONFIG_CMD_NET
	94	#define CONFIG_CMD_PING
	95	#define CONFIG_CMD_DHCP
	96
18a00dfd	97	#define CONFIG_DRIVER_DM9000 1
f905432c MV	98	#define CONFIG_DM9000_BASE 0x08000300 /* CS2 */
	99	#define DM9000_IO (CONFIG_DM9000_BASE)
	100	#define DM9000_DATA (CONFIG_DM9000_BASE + 4)
18a00dfd MV	101	#define CONFIG_NET_RETRY_COUNT 10
	102
	103	#define CONFIG_BOOTP_BOOTFILESIZE
	104	#define CONFIG_BOOTP_BOOTPATH
	105	#define CONFIG_BOOTP_GATEWAY
	106	#define CONFIG_BOOTP_HOSTNAME
	107	#endif
	108
	109	/*
	110	* MMC Card Configuration
	111	*/
	112	#ifdef CONFIG_CMD_MMC
	113	#define CONFIG_MMC
5d877f42 MV	114	#define CONFIG_GENERIC_MMC
5d877f42 MV	115	#define CONFIG_PXA_MMC_GENERIC
18a00dfd MV	116	#define CONFIG_SYS_MMC_BASE 0xF0000000
18a00dfd MV	117	#define CONFIG_CMD_FAT
f905432c	118	#define CONFIG_CMD_EXT2
18a00dfd MV	119	#define CONFIG_DOS_PARTITION
	120	#endif
	121
	122	/*
	123	* KGDB
	124	*/
	125	#ifdef CONFIG_CMD_KGDB
f905432c MV	126	#define CONFIG_KGDB_BAUDRATE 230400 /* kgdb serial port speed */
f905432c MV	127	#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
18a00dfd MV	128	#endif
	129
	130	/*
	131	* HUSH Shell Configuration
	132	*/
	133	#define CONFIG_SYS_HUSH_PARSER 1
18a00dfd	134
f905432c	135	#define CONFIG_SYS_LONGHELP
18a00dfd	136	#ifdef CONFIG_SYS_HUSH_PARSER
f905432c	137	#define CONFIG_SYS_PROMPT "$ "
18a00dfd	138	#else
18a00dfd	139	#endif
f905432c MV	140	#define CONFIG_SYS_CBSIZE 256
	141	#define CONFIG_SYS_PBSIZE \
	142	(CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
	143	#define CONFIG_SYS_MAXARGS 16
	144	#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
18a00dfd	145	#define CONFIG_SYS_DEVICE_NULLDEV 1
7c7204db MV	146	#define CONFIG_CMDLINE_EDITING 1
7c7204db MV	147	#define CONFIG_AUTO_COMPLETE 1
18a00dfd MV	148
	149	/*
	150	* Clock Configuration
	151	*/
f905432c	152	#define CONFIG_SYS_CPUSPEED 0x190 /* 312MHz */
18a00dfd	153
18a00dfd MV	154
	155	/*
	156	* DRAM Map
	157	*/
f905432c	158	#define CONFIG_NR_DRAM_BANKS 2 /* 2 banks of DRAM */
18a00dfd MV	159	#define PHYS_SDRAM_1 0xa0000000 /* SDRAM Bank #1 */
18a00dfd MV	160	#define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */
f905432c	161
f97e9c65	162	#ifdef CONFIG_RAM_256M
18a00dfd MV	163	#define PHYS_SDRAM_2 0x80000000 /* SDRAM Bank #2 */
18a00dfd MV	164	#define PHYS_SDRAM_2_SIZE 0x08000000 /* 128 MB */
f905432c	165	#endif
18a00dfd MV	166
18a00dfd MV	167	#define CONFIG_SYS_DRAM_BASE 0xa0000000 /* CS0 */
f97e9c65	168	#ifdef CONFIG_RAM_256M
18a00dfd	169	#define CONFIG_SYS_DRAM_SIZE 0x10000000 /* 256 MB DRAM */
f905432c MV	170	#else
	171	#define CONFIG_SYS_DRAM_SIZE 0x08000000 /* 128 MB DRAM */
	172	#endif
18a00dfd	173
f905432c MV	174	#define CONFIG_SYS_MEMTEST_START 0xa0400000 /* memtest works on */
f905432c MV	175	#define CONFIG_SYS_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */
18a00dfd	176
451a0c39	177	#define CONFIG_SYS_LOAD_ADDR PHYS_SDRAM_1
6ef6eb91	178	#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
411b9eaf	179	#define CONFIG_SYS_INIT_SP_ADDR 0x5c010000
18a00dfd MV	180
	181	/*
	182	* NOR FLASH
	183	*/
11934fbf	184	#define CONFIG_SYS_MONITOR_BASE 0x0
411b9eaf	185	#define CONFIG_SYS_MONITOR_LEN 0x80000
11934fbf MK	186	#define CONFIG_ENV_ADDR \
11934fbf MK	187	(CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
3e43c749 MV	188	#define CONFIG_ENV_SIZE 0x20000
3e43c749 MV	189	#define CONFIG_ENV_SECT_SIZE 0x20000
11934fbf	190
18a00dfd MV	191	#if defined(CONFIG_CMD_FLASH) /* NOR */
18a00dfd MV	192	#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
f905432c	193
f97e9c65	194	#ifdef CONFIG_RAM_256M
18a00dfd	195	#define PHYS_FLASH_2 0x02000000 /* Flash Bank #2 */
f905432c	196	#endif
18a00dfd MV	197
	198	#define CONFIG_SYS_FLASH_CFI
	199	#define CONFIG_FLASH_CFI_DRIVER 1
	200
	201	#define CONFIG_SYS_MAX_FLASH_SECT (4 + 255)
f97e9c65	202	#ifdef CONFIG_RAM_256M
18a00dfd MV	203	#define CONFIG_SYS_MAX_FLASH_BANKS 2
18a00dfd MV	204	#define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1, PHYS_FLASH_2 }
f905432c MV	205	#else
	206	#define CONFIG_SYS_MAX_FLASH_BANKS 1
	207	#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
	208	#endif
18a00dfd MV	209
	210	#define CONFIG_SYS_FLASH_ERASE_TOUT (25*CONFIG_SYS_HZ)
	211	#define CONFIG_SYS_FLASH_WRITE_TOUT (25*CONFIG_SYS_HZ)
	212
	213	#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
	214	#define CONFIG_SYS_FLASH_PROTECTION 1
	215
f905432c	216	#define CONFIG_ENV_IS_IN_FLASH 1
11934fbf	217
18a00dfd MV	218	#elif defined(CONFIG_CMD_ONENAND) /* OneNAND */
	219	#define CONFIG_SYS_NO_FLASH
	220	#define CONFIG_SYS_ONENAND_BASE 0x00000000
f905432c	221
18a00dfd MV	222	#define CONFIG_ENV_IS_IN_ONENAND 1
	223
	224	#else /* No flash */
	225	#define CONFIG_SYS_NO_FLASH
	226	#define CONFIG_SYS_ENV_IS_NOWHERE
	227	#endif
	228
18a00dfd MV	229	/*
	230	* IDE
	231	*/
	232	#ifdef CONFIG_CMD_IDE
	233	#define CONFIG_LBA48
	234	#undef CONFIG_IDE_LED
	235	#undef CONFIG_IDE_RESET
	236
b417260d MV	237	#define __io
b417260d MV	238
f905432c MV	239	#define CONFIG_SYS_IDE_MAXBUS 1
f905432c MV	240	#define CONFIG_SYS_IDE_MAXDEVICE 1
18a00dfd	241
f905432c MV	242	#define CONFIG_SYS_ATA_BASE_ADDR 0x0c000000
f905432c MV	243	#define CONFIG_SYS_ATA_IDE0_OFFSET 0x0
18a00dfd	244
f905432c MV	245	#define CONFIG_SYS_ATA_DATA_OFFSET 0x120
	246	#define CONFIG_SYS_ATA_REG_OFFSET 0x120
	247	#define CONFIG_SYS_ATA_ALT_OFFSET 0x120
18a00dfd MV	248
	249	#define CONFIG_SYS_ATA_STRIDE 2
	250	#endif
	251
	252	/*
	253	* GPIO settings
	254	*/
	255	#define CONFIG_SYS_GPSR0_VAL 0x01308800
	256	#define CONFIG_SYS_GPSR1_VAL 0x00cf0000
	257	#define CONFIG_SYS_GPSR2_VAL 0x922ac000
	258	#define CONFIG_SYS_GPSR3_VAL 0x0161e800
	259
	260	#define CONFIG_SYS_GPCR0_VAL 0x00010000
	261	#define CONFIG_SYS_GPCR1_VAL 0x0
	262	#define CONFIG_SYS_GPCR2_VAL 0x0
	263	#define CONFIG_SYS_GPCR3_VAL 0x0
	264
	265	#define CONFIG_SYS_GPDR0_VAL 0xcbb18800
	266	#define CONFIG_SYS_GPDR1_VAL 0xfccfa981
	267	#define CONFIG_SYS_GPDR2_VAL 0x922affff
	268	#define CONFIG_SYS_GPDR3_VAL 0x0161e904
	269
	270	#define CONFIG_SYS_GAFR0_L_VAL 0x00100000
	271	#define CONFIG_SYS_GAFR0_U_VAL 0xa5da8510
	272	#define CONFIG_SYS_GAFR1_L_VAL 0x6992901a
	273	#define CONFIG_SYS_GAFR1_U_VAL 0xaaa5a0aa
	274	#define CONFIG_SYS_GAFR2_L_VAL 0xaaaaaaaa
	275	#define CONFIG_SYS_GAFR2_U_VAL 0x4109a401
	276	#define CONFIG_SYS_GAFR3_L_VAL 0x54010310
	277	#define CONFIG_SYS_GAFR3_U_VAL 0x00025401
	278
	279	#define CONFIG_SYS_PSSR_VAL 0x30
	280
	281	/*
	282	* Clock settings
	283	*/
	284	#define CONFIG_SYS_CKEN 0x00500240
	285	#define CONFIG_SYS_CCCR 0x02000290
	286
	287	/*
	288	* Memory settings
	289	*/
	290	#define CONFIG_SYS_MSC0_VAL 0x3ffc95fa
	291	#define CONFIG_SYS_MSC1_VAL 0x02ccf974
	292	#define CONFIG_SYS_MSC2_VAL 0x00000000
f97e9c65	293	#ifdef CONFIG_RAM_256M
18a00dfd	294	#define CONFIG_SYS_MDCNFG_VAL 0x8ad30ad3
f905432c MV	295	#else
	296	#define CONFIG_SYS_MDCNFG_VAL 0x88000ad3
	297	#endif
18a00dfd MV	298	#define CONFIG_SYS_MDREFR_VAL 0x201fe01e
	299	#define CONFIG_SYS_MDMRS_VAL 0x00000000
	300	#define CONFIG_SYS_FLYCNFG_VAL 0x00000000
	301	#define CONFIG_SYS_SXCNFG_VAL 0x40044004
	302	#define CONFIG_SYS_MEM_BUF_IMP 0x0f
	303
	304	/*
	305	* PCMCIA and CF Interfaces
	306	*/
	307	#define CONFIG_SYS_MECR_VAL 0x00000001
	308	#define CONFIG_SYS_MCMEM0_VAL 0x00014307
	309	#define CONFIG_SYS_MCMEM1_VAL 0x00014307
	310	#define CONFIG_SYS_MCATT0_VAL 0x0001c787
	311	#define CONFIG_SYS_MCATT1_VAL 0x0001c787
	312	#define CONFIG_SYS_MCIO0_VAL 0x0001430f
	313	#define CONFIG_SYS_MCIO1_VAL 0x0001430f
	314
	315	/*
	316	* LCD
	317	*/
	318	#ifdef CONFIG_LCD
f905432c	319	#define CONFIG_VOIPAC_LCD
18a00dfd MV	320	#endif
	321
	322	/*
	323	* USB
	324	*/
f905432c	325	#ifdef CONFIG_CMD_USB
18a00dfd MV	326	#define CONFIG_USB_OHCI_NEW
	327	#define CONFIG_SYS_USB_OHCI_CPU_INIT
	328	#define CONFIG_SYS_USB_OHCI_BOARD_INIT
	329	#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
	330	#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x4C000000
	331	#define CONFIG_SYS_USB_OHCI_SLOT_NAME "vpac270"
	332	#define CONFIG_USB_STORAGE
	333	#endif
	334
	335	#endif /* __CONFIG_H */