[people/ms/u-boot.git] / include / configs / xilinx-ppc.h

/*
 * (C) Copyright 2008
 *  Ricado Ribalda-Universidad Autonoma de Madrid-ricardo.ribalda@uam.es
 *  This work has been supported by: QTechnology  http://qtec.com/
 *
 *  (C) Copyright 2008
 *  Georg Schardt <schardt@team-ctech.de>
 *
 * SPDX-License-Identifier:	GPL-2.0+
*/

#ifndef __CONFIG_XLX_H
#define __CONFIG_XLX_H

#define CONFIG_SYS_GENERIC_BOARD

/*
#define DEBUG
#define ET_DEBUG
*/

/*Mem Map*/
#define CONFIG_SYS_SDRAM_BASE		0x0
#define CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_MONITOR_LEN		(192 * 1024)
#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 128 * 1024)

/*Cmd*/
#define CONFIG_CMD_ASKENV
#define CONFIG_CMD_CACHE
#define CONFIG_CMD_DIAG
#define CONFIG_CMD_ELF
#define CONFIG_CMD_IRQ
#define CONFIG_CMD_REGINFO
#undef CONFIG_CMD_JFFS2
#undef CONFIG_CMD_MTDPARTS
#undef CONFIG_CMD_SPI
#undef CONFIG_CMD_I2C
#undef CONFIG_CMD_DTT
#undef CONFIG_CMD_PING
#undef CONFIG_CMD_DHCP
#undef CONFIG_CMD_EEPROM

/*Misc*/
#define CONFIG_BOOTDELAY		5/* autoboot after 5 seconds     */
#define CONFIG_SYS_LONGHELP		/* undef to save memory         */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE		1024/* Console I/O Buffer Size      */
#else
#define CONFIG_SYS_CBSIZE		256/* Console I/O Buffer Size      */
#endif
#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE +\
					sizeof(CONFIG_SYS_PROMPT) + 16)
#define CONFIG_SYS_MAXARGS		16
					/* max number of command args   */
#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
					/* Boot Argument Buffer Size */
#define CONFIG_SYS_MEMTEST_START	0x00400000
					/* memtest works on           */
#define CONFIG_SYS_MEMTEST_END		0x00C00000
					/* 4 ... 12 MB in DRAM        */
#define CONFIG_SYS_LOAD_ADDR		0x00400000
					/* default load address       */
#define CONFIG_SYS_EXTBDINFO		1
					/* Extended board_into (bd_t) */
					/* decrementer freq: 1 ms ticks */
#define CONFIG_CMDLINE_EDITING		/* add command line history     */
#define CONFIG_AUTO_COMPLETE		/* add autocompletion support   */
#define CONFIG_LOOPW			/* enable loopw command         */
#define CONFIG_MX_CYCLIC		/* enable mdc/mwc commands      */
#define CONFIG_ZERO_BOOTDELAY_CHECK	/* check for keypress on bootdelay==0 */
#define CONFIG_VERSION_VARIABLE		/* include version env variable */
#define CONFIG_SYS_CONSOLE_INFO_QUIET	/* don't print console @ startup */
#define CONFIG_SYS_HUSH_PARSER		/* Use the HUSH parser          */
#define CONFIG_LOADS_ECHO		/* echo on for serial download  */
#define CONFIG_SYS_LOADS_BAUD_CHANGE	/* allow baudrate change        */
#define CONFIG_SYS_BOOTMAPSZ		(8 << 20)
				/* Initial Memory map for Linux */

/*Stack*/
#define CONFIG_SYS_INIT_RAM_ADDR	0x800000/* Initial RAM address    */
#define CONFIG_SYS_INIT_RAM_SIZE		0x2000	/* Size of used area in RAM  */
#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE \
				- GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
/*Speed*/
#define CONFIG_SYS_CLK_FREQ	XPAR_CORE_CLOCK_FREQ_HZ

/*Flash*/
#ifdef XPAR_FLASH_MEM0_BASEADDR
#define	CONFIG_SYS_FLASH_BASE		XPAR_FLASH_MEM0_BASEADDR
#define	CONFIG_SYS_FLASH_CFI		1
#define	CONFIG_FLASH_CFI_DRIVER	1
#define	CONFIG_SYS_FLASH_EMPTY_INFO	1
#define	CONFIG_SYS_MAX_FLASH_BANKS	1
#define	CONFIG_SYS_FLASH_PROTECTION
#define CONFIG_CMD_JFFS2
#define CONFIG_CMD_MTDPARTS
#define CONFIG_MTD_DEVICE		/* needed for mtdparts commands */
#define CONFIG_FLASH_CFI_MTD
#else
#define CONFIG_ENV_IS_NOWHERE
#define CONFIG_SYS_NO_FLASH
#endif

/* serial communication */
#ifdef XPAR_UARTLITE_0_BASEADDR
#define CONFIG_XILINX_UARTLITE
#define XILINX_UARTLITE_BASEADDR	XPAR_UARTLITE_0_BASEADDR
#define CONFIG_BAUDRATE			XPAR_UARTLITE_0_BAUDRATE
#define CONFIG_SYS_BAUDRATE_TABLE	{ CONFIG_BAUDRATE }
#else
#ifdef XPAR_UARTNS550_0_BASEADDR
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE	4
#define CONFIG_CONS_INDEX		1
#define CONFIG_SYS_NS16550_COM1		XPAR_UARTNS550_0_BASEADDR
#define CONFIG_SYS_NS16550_CLK		XPAR_UARTNS550_0_CLOCK_FREQ_HZ
#define CONFIG_BAUDRATE			115200
#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 115200 }
#endif
#endif

#endif						/* __CONFIG_H */
Commit	Line	Data
cc2dc9b0 RR	1	/*
	2	* (C) Copyright 2008
	3	* Ricado Ribalda-Universidad Autonoma de Madrid-ricardo.ribalda@uam.es
	4	* This work has been supported by: QTechnology http://qtec.com/
	5	*
	6	* (C) Copyright 2008
	7	* Georg Schardt <schardt@team-ctech.de>
	8	*
1a459660	9	* SPDX-License-Identifier: GPL-2.0+
cc2dc9b0 RR	10	*/
	11
	12	#ifndef __CONFIG_XLX_H
	13	#define __CONFIG_XLX_H
d67b72d5 RR	14
	15	#define CONFIG_SYS_GENERIC_BOARD
	16
cc2dc9b0 RR	17	/*
	18	#define DEBUG
	19	#define ET_DEBUG
	20	*/
	21
	22	/Mem Map/
	23	#define CONFIG_SYS_SDRAM_BASE 0x0
14d0a02a	24	#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
cc2dc9b0 RR	25	#define CONFIG_SYS_MONITOR_LEN (192 * 1024)
	26	#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024)
	27
	28	/Cmd/
cc2dc9b0 RR	29	#define CONFIG_CMD_ASKENV
	30	#define CONFIG_CMD_CACHE
	31	#define CONFIG_CMD_DIAG
	32	#define CONFIG_CMD_ELF
	33	#define CONFIG_CMD_IRQ
	34	#define CONFIG_CMD_REGINFO
	35	#undef CONFIG_CMD_JFFS2
68d7d651	36	#undef CONFIG_CMD_MTDPARTS
cc2dc9b0 RR	37	#undef CONFIG_CMD_SPI
	38	#undef CONFIG_CMD_I2C
	39	#undef CONFIG_CMD_DTT
cc2dc9b0 RR	40	#undef CONFIG_CMD_PING
	41	#undef CONFIG_CMD_DHCP
	42	#undef CONFIG_CMD_EEPROM
cc2dc9b0 RR	43
	44	/Misc/
	45	#define CONFIG_BOOTDELAY 5/* autoboot after 5 seconds */
	46	#define CONFIG_SYS_LONGHELP /* undef to save memory */
	47	#if defined(CONFIG_CMD_KGDB)
	48	#define CONFIG_SYS_CBSIZE 1024/* Console I/O Buffer Size */
	49	#else
	50	#define CONFIG_SYS_CBSIZE 256/* Console I/O Buffer Size */
	51	#endif
	52	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE +\
	53	sizeof(CONFIG_SYS_PROMPT) + 16)
	54	#define CONFIG_SYS_MAXARGS 16
	55	/* max number of command args */
	56	#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
	57	/* Boot Argument Buffer Size */
	58	#define CONFIG_SYS_MEMTEST_START 0x00400000
	59	/* memtest works on */
	60	#define CONFIG_SYS_MEMTEST_END 0x00C00000
	61	/* 4 ... 12 MB in DRAM */
	62	#define CONFIG_SYS_LOAD_ADDR 0x00400000
	63	/* default load address */
	64	#define CONFIG_SYS_EXTBDINFO 1
	65	/* Extended board_into (bd_t) */
cc2dc9b0 RR	66	/* decrementer freq: 1 ms ticks */
	67	#define CONFIG_CMDLINE_EDITING /* add command line history */
	68	#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
	69	#define CONFIG_LOOPW /* enable loopw command */
	70	#define CONFIG_MX_CYCLIC /* enable mdc/mwc commands */
	71	#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
	72	#define CONFIG_VERSION_VARIABLE /* include version env variable */
	73	#define CONFIG_SYS_CONSOLE_INFO_QUIET /* don't print console @ startup */
	74	#define CONFIG_SYS_HUSH_PARSER /* Use the HUSH parser */
cc2dc9b0 RR	75	#define CONFIG_LOADS_ECHO /* echo on for serial download */
	76	#define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */
	77	#define CONFIG_SYS_BOOTMAPSZ (8 << 20)
	78	/* Initial Memory map for Linux */
	79
	80	/Stack/
	81	#define CONFIG_SYS_INIT_RAM_ADDR 0x800000/* Initial RAM address */
553f0982	82	#define CONFIG_SYS_INIT_RAM_SIZE 0x2000 /* Size of used area in RAM */
553f0982	83	#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE \
25ddd1fb	84	- GENERATED_GBL_DATA_SIZE)
cc2dc9b0 RR	85	#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
	86	/Speed/
	87	#define CONFIG_SYS_CLK_FREQ XPAR_CORE_CLOCK_FREQ_HZ
	88
	89	/Flash/
	90	#ifdef XPAR_FLASH_MEM0_BASEADDR
	91	#define CONFIG_SYS_FLASH_BASE XPAR_FLASH_MEM0_BASEADDR
	92	#define CONFIG_SYS_FLASH_CFI 1
	93	#define CONFIG_FLASH_CFI_DRIVER 1
	94	#define CONFIG_SYS_FLASH_EMPTY_INFO 1
	95	#define CONFIG_SYS_MAX_FLASH_BANKS 1
	96	#define CONFIG_SYS_FLASH_PROTECTION
	97	#define CONFIG_CMD_JFFS2
68d7d651	98	#define CONFIG_CMD_MTDPARTS
942556a9 SR	99	#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
942556a9 SR	100	#define CONFIG_FLASH_CFI_MTD
cc2dc9b0 RR	101	#else
	102	#define CONFIG_ENV_IS_NOWHERE
	103	#define CONFIG_SYS_NO_FLASH
	104	#endif
	105
	106	/* serial communication */
	107	#ifdef XPAR_UARTLITE_0_BASEADDR
	108	#define CONFIG_XILINX_UARTLITE
6538397c	109	#define XILINX_UARTLITE_BASEADDR XPAR_UARTLITE_0_BASEADDR
cc2dc9b0 RR	110	#define CONFIG_BAUDRATE XPAR_UARTLITE_0_BAUDRATE
	111	#define CONFIG_SYS_BAUDRATE_TABLE { CONFIG_BAUDRATE }
	112	#else
	113	#ifdef XPAR_UARTNS550_0_BASEADDR
	114	#define CONFIG_SYS_NS16550
	115	#define CONFIG_SYS_NS16550_SERIAL
	116	#define CONFIG_SYS_NS16550_REG_SIZE 4
	117	#define CONFIG_CONS_INDEX 1
	118	#define CONFIG_SYS_NS16550_COM1 XPAR_UARTNS550_0_BASEADDR
	119	#define CONFIG_SYS_NS16550_CLK XPAR_UARTNS550_0_CLOCK_FREQ_HZ
	120	#define CONFIG_BAUDRATE 115200
	121	#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 115200 }
	122	#endif
	123	#endif
	124
	125	#endif /* __CONFIG_H */