[people/ms/u-boot.git] / include / configs / xilinx_zynqmp.h

/*
 * Configuration for Xilinx ZynqMP
 * (C) Copyright 2014 - 2015 Xilinx, Inc.
 * Michal Simek <michal.simek@xilinx.com>
 *
 * Based on Configuration for Versatile Express
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __XILINX_ZYNQMP_H
#define __XILINX_ZYNQMP_H

#define CONFIG_REMAKE_ELF

/* #define CONFIG_ARMV8_SWITCH_TO_EL1 */

#define CONFIG_SYS_NO_FLASH


/* Generic Interrupt Controller Definitions */
#define CONFIG_GICV2
#define GICD_BASE	0xF9010000
#define GICC_BASE	0xF9020000

#define CONFIG_SYS_ALT_MEMTEST
#define CONFIG_SYS_MEMTEST_SCRATCH	0xfffc0000

#define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
#define CONFIG_SYS_MEMTEST_END		CONFIG_SYS_SDRAM_SIZE

/* Have release address at the end of 256MB for now */
#define CPU_RELEASE_ADDR	0xFFFFFF0

/* Cache Definitions */
#define CONFIG_SYS_CACHELINE_SIZE	64

#define CONFIG_IDENT_STRING		" Xilinx ZynqMP"

#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x7fff0)

/* Flat Device Tree Definitions */
#define CONFIG_OF_LIBFDT

/* Generic Timer Definitions - setup in EL3. Setup by ATF for other cases */
#if !defined(COUNTER_FREQUENCY)
# define COUNTER_FREQUENCY		100000000
#endif

/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 0x2000000)

/* Serial setup */
#if defined(CONFIG_ZYNQMP_DCC)
# define CONFIG_ARM_DCC
# define CONFIG_CPU_ARMV8
#else
# define CONFIG_ZYNQ_SERIAL
#endif

#define CONFIG_CONS_INDEX		0
#define CONFIG_BAUDRATE			115200
#define CONFIG_SYS_BAUDRATE_TABLE \
	{ 4800, 9600, 19200, 38400, 57600, 115200 }

/* Command line configuration */
#define CONFIG_CMD_ENV
#define CONFIG_CMD_EXT2
#define CONFIG_CMD_EXT4
#define CONFIG_CMD_FAT
#define CONFIG_CMD_FS_GENERIC
#define CONFIG_DOS_PARTITION
#define CONFIG_MP

#define CONFIG_CMD_MII

/* BOOTP options */
#define CONFIG_BOOTP_BOOTFILESIZE
#define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
#define CONFIG_BOOTP_MAY_FAIL
#define CONFIG_BOOTP_SERVERIP

/* SPI */
#ifdef CONFIG_ZYNQ_SPI
# define CONFIG_CMD_SF
#endif

#if defined(CONFIG_ZYNQ_SDHCI0) || defined(CONFIG_ZYNQ_SDHCI1)
# define CONFIG_MMC
# define CONFIG_GENERIC_MMC
# define CONFIG_SDHCI
# define CONFIG_ZYNQ_SDHCI
# define CONFIG_CMD_MMC
# ifndef CONFIG_ZYNQ_SDHCI_MAX_FREQ
#  define CONFIG_ZYNQ_SDHCI_MAX_FREQ	200000000
# endif
#endif

#if defined(CONFIG_ZYNQ_SDHCI)
# define CONFIG_FAT_WRITE
# define CONFIG_CMD_EXT4_WRITE
#endif

/* Miscellaneous configurable options */
#define CONFIG_SYS_LOAD_ADDR		0x8000000

#if defined(CONFIG_ZYNQMP_USB)
#define CONFIG_USB_XHCI_DWC3
#define CONFIG_USB_XHCI
#define CONFIG_USB_MAX_CONTROLLER_COUNT         1
#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS      2
#define CONFIG_CMD_USB
#define CONFIG_USB_STORAGE
#define CONFIG_USB_XHCI_ZYNQMP

#define CONFIG_USB_DWC3
#define CONFIG_USB_DWC3_GADGET

#define CONFIG_USB_GADGET
#define CONFIG_USB_GADGET_DOWNLOAD
#define CONFIG_USB_GADGET_DUALSPEED
#define CONFIG_USB_GADGET_VBUS_DRAW	2
#define CONFIG_USBDOWNLOAD_GADGET
#define CONFIG_SYS_DFU_DATA_BUF_SIZE	0x1800000
#define DFU_DEFAULT_POLL_TIMEOUT	300
#define CONFIG_USB_FUNCTION_DFU
#define CONFIG_DFU_RAM
#define CONFIG_G_DNL_VENDOR_NUM		0x03FD
#define CONFIG_G_DNL_PRODUCT_NUM	0x0300
#define CONFIG_G_DNL_MANUFACTURER	"Xilinx"
#define CONFIG_USB_CABLE_CHECK
#define CONFIG_CMD_DFU
#define CONFIG_CMD_THOR_DOWNLOAD
#define CONFIG_USB_FUNCTION_THOR
#define CONFIG_THOR_RESET_OFF
#define DFU_ALT_INFO_RAM \
	"dfu_ram_info=" \
	"set dfu_alt_info " \
	"Image ram 0x200000 0x1800000\\\\;" \
	"system.dtb ram 0x7000000 0x40000\0" \
	"dfu_ram=run dfu_ram_info && dfu 0 ram 0\0" \
	"thor_ram=run dfu_ram_info && thordown 0 ram 0\0"

#define DFU_ALT_INFO  \
		DFU_ALT_INFO_RAM
#endif

#if !defined(DFU_ALT_INFO)
# define DFU_ALT_INFO
#endif

/* Initial environment variables */
#define CONFIG_EXTRA_ENV_SETTINGS \
	"kernel_addr=0x80000\0" \
	"fdt_addr=0x7000000\0" \
	"fdt_high=0x10000000\0" \
	"sdbootdev=0\0"\
	"sdboot=mmc dev $sdbootdev && mmcinfo && load mmc $sdbootdev:$partid $fdt_addr system.dtb && " \
		"load mmc $sdbootdev:$partid $kernel_addr Image && " \
		"booti $kernel_addr - $fdt_addr\0" \
	DFU_ALT_INFO

#define CONFIG_BOOTARGS		"setenv bootargs console=ttyPS0,${baudrate} " \
				"earlycon=cdns,mmio,0xff000000,${baudrate}n8"
#define CONFIG_PREBOOT		"run bootargs"
#define CONFIG_BOOTCOMMAND	"run $modeboot"
#define CONFIG_BOOTDELAY	5

#define CONFIG_BOARD_LATE_INIT

/* Do not preserve environment */
#define CONFIG_ENV_IS_NOWHERE		1
#define CONFIG_ENV_SIZE			0x1000

/* Monitor Command Prompt */
/* Console I/O Buffer Size */
#define CONFIG_SYS_CBSIZE		2048
#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
					sizeof(CONFIG_SYS_PROMPT) + 16)
#define CONFIG_SYS_HUSH_PARSER
#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
#define CONFIG_SYS_LONGHELP
#define CONFIG_CMDLINE_EDITING
#define CONFIG_SYS_MAXARGS		64

/* Ethernet driver */
#if defined(CONFIG_ZYNQ_GEM)
# define CONFIG_NET_MULTI
# define CONFIG_MII
# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
# define CONFIG_PHY_MARVELL
# define CONFIG_PHY_TI
#endif

/* I2C */
#if defined(CONFIG_SYS_I2C_ZYNQ)
# define CONFIG_CMD_I2C
# define CONFIG_SYS_I2C
# define CONFIG_SYS_I2C_ZYNQ_SPEED		100000
# define CONFIG_SYS_I2C_ZYNQ_SLAVE		0
#endif

/* EEPROM */
#ifdef CONFIG_ZYNQMP_EEPROM
# define CONFIG_CMD_EEPROM
# define CONFIG_SYS_I2C_EEPROM_ADDR_LEN		2
# define CONFIG_SYS_I2C_EEPROM_ADDR		0x54
# define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	4
# define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	5
# define CONFIG_SYS_EEPROM_SIZE			(64 * 1024)
#endif

#ifdef CONFIG_AHCI
#define CONFIG_LIBATA
#define CONFIG_SCSI_AHCI
#define CONFIG_SCSI_AHCI_PLAT
#define CONFIG_SYS_SCSI_MAX_SCSI_ID	1
#define CONFIG_SYS_SCSI_MAX_LUN		1
#define CONFIG_SYS_SCSI_MAX_DEVICE	(CONFIG_SYS_SCSI_MAX_SCSI_ID * \
					 CONFIG_SYS_SCSI_MAX_LUN)
#define CONFIG_CMD_SCSI
#endif

#define CONFIG_SYS_BOOTM_LEN	(60 * 1024 * 1024)

#define CONFIG_CMD_BOOTI
#define CONFIG_CMD_UNZIP

#define CONFIG_BOARD_EARLY_INIT_R
#define CONFIG_CLOCKS

#endif /* __XILINX_ZYNQMP_H */
Commit	Line	Data
84c7204b MS	1	/*
	2	* Configuration for Xilinx ZynqMP
	3	* (C) Copyright 2014 - 2015 Xilinx, Inc.
	4	* Michal Simek <michal.simek@xilinx.com>
	5	*
	6	* Based on Configuration for Versatile Express
	7	*
	8	* SPDX-License-Identifier: GPL-2.0+
	9	*/
	10
	11	#ifndef __XILINX_ZYNQMP_H
	12	#define __XILINX_ZYNQMP_H
	13
	14	#define CONFIG_REMAKE_ELF
	15
	16	/* #define CONFIG_ARMV8_SWITCH_TO_EL1 */
	17
	18	#define CONFIG_SYS_NO_FLASH
	19
84c7204b MS	20
	21	/* Generic Interrupt Controller Definitions */
	22	#define CONFIG_GICV2
	23	#define GICD_BASE 0xF9010000
	24	#define GICC_BASE 0xF9020000
	25
d759512f MS	26	#define CONFIG_SYS_ALT_MEMTEST
	27	#define CONFIG_SYS_MEMTEST_SCRATCH 0xfffc0000
	28
84c7204b MS	29	#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
	30	#define CONFIG_SYS_MEMTEST_END CONFIG_SYS_SDRAM_SIZE
	31
	32	/* Have release address at the end of 256MB for now */
	33	#define CPU_RELEASE_ADDR 0xFFFFFF0
	34
	35	/* Cache Definitions */
222b2129	36	#define CONFIG_SYS_CACHELINE_SIZE 64
84c7204b MS	37
	38	#define CONFIG_IDENT_STRING " Xilinx ZynqMP"
	39
84c7204b MS	40	#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
	41
	42	/* Flat Device Tree Definitions */
	43	#define CONFIG_OF_LIBFDT
	44
	45	/* Generic Timer Definitions - setup in EL3. Setup by ATF for other cases */
713b6164 MS	46	#if !defined(COUNTER_FREQUENCY)
	47	# define COUNTER_FREQUENCY 100000000
	48	#endif
84c7204b MS	49
84c7204b MS	50	/* Size of malloc() pool */
16fa00a7	51	#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 0x2000000)
84c7204b MS	52
84c7204b MS	53	/* Serial setup */
b0d18bee SDPP	54	#if defined(CONFIG_ZYNQMP_DCC)
	55	# define CONFIG_ARM_DCC
	56	# define CONFIG_CPU_ARMV8
	57	#else
42800ffa	58	# define CONFIG_ZYNQ_SERIAL
b0d18bee	59	#endif
84c7204b MS	60
	61	#define CONFIG_CONS_INDEX 0
	62	#define CONFIG_BAUDRATE 115200
	63	#define CONFIG_SYS_BAUDRATE_TABLE \
	64	{ 4800, 9600, 19200, 38400, 57600, 115200 }
	65
	66	/* Command line configuration */
	67	#define CONFIG_CMD_ENV
	68	#define CONFIG_CMD_EXT2
	69	#define CONFIG_CMD_EXT4
	70	#define CONFIG_CMD_FAT
5af37bd0	71	#define CONFIG_CMD_FS_GENERIC
84c7204b	72	#define CONFIG_DOS_PARTITION
5cb24200	73	#define CONFIG_MP
84c7204b	74
cb7ea820 MS	75	#define CONFIG_CMD_MII
	76
	77	/* BOOTP options */
	78	#define CONFIG_BOOTP_BOOTFILESIZE
	79	#define CONFIG_BOOTP_BOOTPATH
	80	#define CONFIG_BOOTP_GATEWAY
	81	#define CONFIG_BOOTP_HOSTNAME
	82	#define CONFIG_BOOTP_MAY_FAIL
	83	#define CONFIG_BOOTP_SERVERIP
	84
48d7260d SDPP	85	/* SPI */
48d7260d SDPP	86	#ifdef CONFIG_ZYNQ_SPI
48d7260d SDPP	87	# define CONFIG_CMD_SF
	88	#endif
	89
84c7204b MS	90	#if defined(CONFIG_ZYNQ_SDHCI0) \|\| defined(CONFIG_ZYNQ_SDHCI1)
	91	# define CONFIG_MMC
	92	# define CONFIG_GENERIC_MMC
	93	# define CONFIG_SDHCI
	94	# define CONFIG_ZYNQ_SDHCI
	95	# define CONFIG_CMD_MMC
f3bd7280 MS	96	# ifndef CONFIG_ZYNQ_SDHCI_MAX_FREQ
	97	# define CONFIG_ZYNQ_SDHCI_MAX_FREQ 200000000
	98	# endif
84c7204b MS	99	#endif
	100
	101	#if defined(CONFIG_ZYNQ_SDHCI)
	102	# define CONFIG_FAT_WRITE
	103	# define CONFIG_CMD_EXT4_WRITE
	104	#endif
	105
	106	/* Miscellaneous configurable options */
	107	#define CONFIG_SYS_LOAD_ADDR 0x8000000
	108
16fa00a7	109	#if defined(CONFIG_ZYNQMP_USB)
0f676767 SDPP	110	#define CONFIG_USB_XHCI_DWC3
	111	#define CONFIG_USB_XHCI
	112	#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
	113	#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
	114	#define CONFIG_CMD_USB
	115	#define CONFIG_USB_STORAGE
	116	#define CONFIG_USB_XHCI_ZYNQMP
	117
16fa00a7 SDPP	118	#define CONFIG_USB_DWC3
	119	#define CONFIG_USB_DWC3_GADGET
	120
	121	#define CONFIG_USB_GADGET
	122	#define CONFIG_USB_GADGET_DOWNLOAD
	123	#define CONFIG_USB_GADGET_DUALSPEED
	124	#define CONFIG_USB_GADGET_VBUS_DRAW 2
	125	#define CONFIG_USBDOWNLOAD_GADGET
	126	#define CONFIG_SYS_DFU_DATA_BUF_SIZE 0x1800000
	127	#define DFU_DEFAULT_POLL_TIMEOUT 300
	128	#define CONFIG_USB_FUNCTION_DFU
	129	#define CONFIG_DFU_RAM
	130	#define CONFIG_G_DNL_VENDOR_NUM 0x03FD
	131	#define CONFIG_G_DNL_PRODUCT_NUM 0x0300
	132	#define CONFIG_G_DNL_MANUFACTURER "Xilinx"
	133	#define CONFIG_USB_CABLE_CHECK
	134	#define CONFIG_CMD_DFU
	135	#define CONFIG_CMD_THOR_DOWNLOAD
	136	#define CONFIG_USB_FUNCTION_THOR
	137	#define CONFIG_THOR_RESET_OFF
	138	#define DFU_ALT_INFO_RAM \
	139	"dfu_ram_info=" \
	140	"set dfu_alt_info " \
	141	"Image ram 0x200000 0x1800000\\\\;" \
	142	"system.dtb ram 0x7000000 0x40000\0" \
	143	"dfu_ram=run dfu_ram_info && dfu 0 ram 0\0" \
	144	"thor_ram=run dfu_ram_info && thordown 0 ram 0\0"
	145
	146	#define DFU_ALT_INFO \
	147	DFU_ALT_INFO_RAM
	148	#endif
	149
	150	#if !defined(DFU_ALT_INFO)
	151	# define DFU_ALT_INFO
	152	#endif
	153
84c7204b MS	154	/* Initial environment variables */
	155	#define CONFIG_EXTRA_ENV_SETTINGS \
	156	"kernel_addr=0x80000\0" \
	157	"fdt_addr=0x7000000\0" \
	158	"fdt_high=0x10000000\0" \
2d9925bc MS	159	"sdbootdev=0\0"\
	160	"sdboot=mmc dev $sdbootdev && mmcinfo && load mmc $sdbootdev:$partid $fdt_addr system.dtb && " \
	161	"load mmc $sdbootdev:$partid $kernel_addr Image && " \
	162	"booti $kernel_addr - $fdt_addr\0" \
16fa00a7	163	DFU_ALT_INFO
84c7204b MS	164
	165	#define CONFIG_BOOTARGS "setenv bootargs console=ttyPS0,${baudrate} " \
	166	"earlycon=cdns,mmio,0xff000000,${baudrate}n8"
	167	#define CONFIG_PREBOOT "run bootargs"
	168	#define CONFIG_BOOTCOMMAND "run $modeboot"
	169	#define CONFIG_BOOTDELAY 5
	170
	171	#define CONFIG_BOARD_LATE_INIT
	172
	173	/* Do not preserve environment */
	174	#define CONFIG_ENV_IS_NOWHERE 1
	175	#define CONFIG_ENV_SIZE 0x1000
	176
	177	/* Monitor Command Prompt */
	178	/* Console I/O Buffer Size */
	179	#define CONFIG_SYS_CBSIZE 2048
84c7204b MS	180	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
	181	sizeof(CONFIG_SYS_PROMPT) + 16)
	182	#define CONFIG_SYS_HUSH_PARSER
	183	#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
	184	#define CONFIG_SYS_LONGHELP
	185	#define CONFIG_CMDLINE_EDITING
	186	#define CONFIG_SYS_MAXARGS 64
	187
cb7ea820	188	/* Ethernet driver */
596e5782	189	#if defined(CONFIG_ZYNQ_GEM)
cb7ea820	190	# define CONFIG_NET_MULTI
cb7ea820 MS	191	# define CONFIG_MII
cb7ea820 MS	192	# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
cb7ea820	193	# define CONFIG_PHY_MARVELL
bf146325	194	# define CONFIG_PHY_TI
cb7ea820 MS	195	#endif
cb7ea820 MS	196
2594e03c SDPP	197	/* I2C */
	198	#if defined(CONFIG_SYS_I2C_ZYNQ)
	199	# define CONFIG_CMD_I2C
	200	# define CONFIG_SYS_I2C
	201	# define CONFIG_SYS_I2C_ZYNQ_SPEED 100000
	202	# define CONFIG_SYS_I2C_ZYNQ_SLAVE 0
	203	#endif
	204
2594e03c SDPP	205	/* EEPROM */
	206	#ifdef CONFIG_ZYNQMP_EEPROM
	207	# define CONFIG_CMD_EEPROM
	208	# define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
	209	# define CONFIG_SYS_I2C_EEPROM_ADDR 0x54
	210	# define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4
	211	# define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
	212	# define CONFIG_SYS_EEPROM_SIZE (64 * 1024)
	213	#endif
	214
6fe6f135 MS	215	#ifdef CONFIG_AHCI
	216	#define CONFIG_LIBATA
	217	#define CONFIG_SCSI_AHCI
	218	#define CONFIG_SCSI_AHCI_PLAT
	219	#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
	220	#define CONFIG_SYS_SCSI_MAX_LUN 1
	221	#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
	222	CONFIG_SYS_SCSI_MAX_LUN)
	223	#define CONFIG_CMD_SCSI
	224	#endif
	225
84c7204b MS	226	#define CONFIG_SYS_BOOTM_LEN (60 * 1024 * 1024)
	227
	228	#define CONFIG_CMD_BOOTI
	229	#define CONFIG_CMD_UNZIP
	230
	231	#define CONFIG_BOARD_EARLY_INIT_R
	232	#define CONFIG_CLOCKS
	233
	234	#endif /* __XILINX_ZYNQMP_H */