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f22651cf MS |
1 | /* |
2 | * (C) Copyright 2012 Michal Simek <monstr@monstr.eu> | |
06fe8dae JT |
3 | * (C) Copyright 2013 Xilinx, Inc. |
4 | * | |
5 | * Common configuration options for all Zynq boards. | |
f22651cf | 6 | * |
1a459660 | 7 | * SPDX-License-Identifier: GPL-2.0+ |
f22651cf MS |
8 | */ |
9 | ||
06fe8dae JT |
10 | #ifndef __CONFIG_ZYNQ_COMMON_H |
11 | #define __CONFIG_ZYNQ_COMMON_H | |
f22651cf | 12 | |
53e49f74 JT |
13 | /* High Level configuration Options */ |
14 | #define CONFIG_ARMV7 | |
f22651cf MS |
15 | #define CONFIG_ZYNQ |
16 | ||
17 | /* CPU clock */ | |
53e49f74 JT |
18 | #ifndef CONFIG_CPU_FREQ_HZ |
19 | # define CONFIG_CPU_FREQ_HZ 800000000 | |
20 | #endif | |
f22651cf | 21 | |
8cfac504 JT |
22 | /* Cache options */ |
23 | #define CONFIG_CMD_CACHE | |
24 | #define CONFIG_SYS_CACHELINE_SIZE 32 | |
25 | ||
26 | #define CONFIG_SYS_L2CACHE_OFF | |
27 | #ifndef CONFIG_SYS_L2CACHE_OFF | |
28 | # define CONFIG_SYS_L2_PL310 | |
29 | # define CONFIG_SYS_PL310_BASE 0xf8f02000 | |
30 | #endif | |
31 | ||
53e49f74 JT |
32 | /* Serial drivers */ |
33 | #define CONFIG_BAUDRATE 115200 | |
f22651cf MS |
34 | /* The following table includes the supported baudrates */ |
35 | #define CONFIG_SYS_BAUDRATE_TABLE \ | |
36 | {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} | |
37 | ||
53e49f74 JT |
38 | /* DCC driver */ |
39 | #if defined(CONFIG_ZYNQ_DCC) | |
40 | # define CONFIG_ARM_DCC | |
41 | # define CONFIG_CPU_V6 /* Required by CONFIG_ARM_DCC */ | |
bf834950 MS |
42 | #else |
43 | # define CONFIG_ZYNQ_SERIAL | |
53e49f74 JT |
44 | #endif |
45 | ||
f22651cf | 46 | /* Ethernet driver */ |
88fcfb1c JT |
47 | #if defined(CONFIG_ZYNQ_GEM0) || defined(CONFIG_ZYNQ_GEM1) |
48 | # define CONFIG_NET_MULTI | |
49 | # define CONFIG_ZYNQ_GEM | |
50 | # define CONFIG_MII | |
51 | # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN | |
52 | # define CONFIG_PHYLIB | |
53 | # define CONFIG_PHY_MARVELL | |
54 | #endif | |
f22651cf | 55 | |
53e49f74 JT |
56 | /* SPI */ |
57 | #ifdef CONFIG_ZYNQ_SPI | |
58 | # define CONFIG_SPI_FLASH | |
59 | # define CONFIG_SPI_FLASH_SST | |
60 | # define CONFIG_CMD_SF | |
61 | #endif | |
62 | ||
fe5eddbf JT |
63 | /* NOR */ |
64 | #ifndef CONFIG_SYS_NO_FLASH | |
65 | # define CONFIG_SYS_FLASH_BASE 0xE2000000 | |
66 | # define CONFIG_SYS_FLASH_SIZE (16 * 1024 * 1024) | |
67 | # define CONFIG_SYS_MAX_FLASH_BANKS 1 | |
68 | # define CONFIG_SYS_MAX_FLASH_SECT 512 | |
69 | # define CONFIG_SYS_FLASH_ERASE_TOUT 1000 | |
70 | # define CONFIG_SYS_FLASH_WRITE_TOUT 5000 | |
71 | # define CONFIG_FLASH_SHOW_PROGRESS 10 | |
72 | # define CONFIG_SYS_FLASH_CFI | |
73 | # undef CONFIG_SYS_FLASH_EMPTY_INFO | |
74 | # define CONFIG_FLASH_CFI_DRIVER | |
75 | # undef CONFIG_SYS_FLASH_PROTECTION | |
76 | # define CONFIG_SYS_FLASH_USE_BUFFER_WRITE | |
77 | #endif | |
78 | ||
293eb33f MS |
79 | /* MMC */ |
80 | #if defined(CONFIG_ZYNQ_SDHCI0) || defined(CONFIG_ZYNQ_SDHCI1) | |
81 | # define CONFIG_MMC | |
82 | # define CONFIG_GENERIC_MMC | |
83 | # define CONFIG_SDHCI | |
84 | # define CONFIG_ZYNQ_SDHCI | |
85 | # define CONFIG_CMD_MMC | |
86 | # define CONFIG_CMD_FAT | |
87 | # define CONFIG_SUPPORT_VFAT | |
88 | # define CONFIG_CMD_EXT2 | |
89 | # define CONFIG_DOS_PARTITION | |
90 | #endif | |
91 | ||
18948632 | 92 | #define CONFIG_SYS_I2C_ZYNQ |
8934f784 | 93 | /* I2C */ |
18948632 | 94 | #if defined(CONFIG_SYS_I2C_ZYNQ) |
8934f784 | 95 | # define CONFIG_CMD_I2C |
0bdffe71 | 96 | # define CONFIG_SYS_I2C |
0bdffe71 | 97 | # define CONFIG_SYS_I2C_ZYNQ_SPEED 100000 |
18948632 | 98 | # define CONFIG_SYS_I2C_ZYNQ_SLAVE 0 |
8934f784 MS |
99 | #endif |
100 | ||
65da1efd JT |
101 | /* EEPROM */ |
102 | #ifdef CONFIG_ZYNQ_EEPROM | |
103 | # define CONFIG_CMD_EEPROM | |
104 | # define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 | |
105 | # define CONFIG_SYS_I2C_EEPROM_ADDR 0x54 | |
106 | # define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 | |
107 | # define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 | |
108 | # define CONFIG_SYS_EEPROM_SIZE 1024 /* Bytes */ | |
109 | #endif | |
110 | ||
f22651cf MS |
111 | #define CONFIG_BOOTP_SERVERIP |
112 | #define CONFIG_BOOTP_BOOTPATH | |
113 | #define CONFIG_BOOTP_GATEWAY | |
114 | #define CONFIG_BOOTP_HOSTNAME | |
115 | #define CONFIG_BOOTP_MAY_FAIL | |
116 | ||
18eee22f JT |
117 | /* Total Size of Environment Sector */ |
118 | #define CONFIG_ENV_SIZE (128 << 10) | |
119 | ||
b660ca13 JT |
120 | /* Allow to overwrite serial and ethaddr */ |
121 | #define CONFIG_ENV_OVERWRITE | |
122 | ||
f22651cf | 123 | /* Environment */ |
ed53e4d6 JT |
124 | #ifndef CONFIG_ENV_IS_NOWHERE |
125 | # ifndef CONFIG_SYS_NO_FLASH | |
126 | # define CONFIG_ENV_IS_IN_FLASH | |
127 | # elif defined(CONFIG_SYS_NO_FLASH) | |
128 | # define CONFIG_ENV_IS_NOWHERE | |
129 | # endif | |
130 | ||
131 | # define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE | |
132 | # define CONFIG_ENV_OFFSET 0xE0000 | |
133 | # define CONFIG_CMD_SAVEENV | |
134 | #endif | |
e83f61a6 JT |
135 | |
136 | /* Default environment */ | |
137 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
138 | "fit_image=fit.itb\0" \ | |
139 | "load_addr=0x2000000\0" \ | |
140 | "fit_size=0x800000\0" \ | |
141 | "flash_off=0x100000\0" \ | |
142 | "nor_flash_off=0xE2100000\0" \ | |
143 | "fdt_high=0x20000000\0" \ | |
144 | "initrd_high=0x20000000\0" \ | |
145 | "norboot=echo Copying FIT from NOR flash to RAM... && " \ | |
146 | "cp.b ${nor_flash_off} ${load_addr} ${fit_size} && " \ | |
147 | "bootm ${load_addr}\0" \ | |
148 | "sdboot=echo Copying FIT from SD to RAM... && " \ | |
149 | "fatload mmc 0 ${load_addr} ${fit_image} && " \ | |
150 | "bootm ${load_addr}\0" \ | |
151 | "jtagboot=echo TFTPing FIT to RAM... && " \ | |
dfa94058 | 152 | "tftpboot ${load_addr} ${fit_image} && " \ |
e83f61a6 JT |
153 | "bootm ${load_addr}\0" |
154 | #define CONFIG_BOOTCOMMAND "run $modeboot" | |
155 | #define CONFIG_BOOTDELAY 3 /* -1 to Disable autoboot */ | |
156 | #define CONFIG_SYS_LOAD_ADDR 0 /* default? */ | |
f22651cf | 157 | |
36e0e197 JT |
158 | /* Miscellaneous configurable options */ |
159 | #define CONFIG_SYS_PROMPT "zynq-uboot> " | |
160 | #define CONFIG_SYS_HUSH_PARSER | |
161 | ||
162 | #define CONFIG_CMDLINE_EDITING | |
163 | #define CONFIG_AUTO_COMPLETE | |
b3de9249 | 164 | #define CONFIG_BOARD_LATE_INIT |
36e0e197 | 165 | #define CONFIG_SYS_LONGHELP |
6c3e61de | 166 | #define CONFIG_CLOCKS |
d6c9bbaa | 167 | #define CONFIG_CMD_CLK |
36e0e197 JT |
168 | #define CONFIG_SYS_MAXARGS 15 /* max number of command args */ |
169 | #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ | |
170 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ | |
f22651cf MS |
171 | sizeof(CONFIG_SYS_PROMPT) + 16) |
172 | ||
7cd04192 | 173 | /* Physical Memory map */ |
0f5c2156 | 174 | #define CONFIG_SYS_TEXT_BASE 0x4000000 |
f22651cf | 175 | |
7cd04192 JT |
176 | #define CONFIG_NR_DRAM_BANKS 1 |
177 | #define CONFIG_SYS_SDRAM_BASE 0 | |
7cd04192 JT |
178 | |
179 | #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE | |
180 | #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x1000) | |
181 | ||
53e49f74 | 182 | #define CONFIG_SYS_MALLOC_LEN 0x400000 |
7cd04192 JT |
183 | #define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_SDRAM_BASE |
184 | #define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN | |
185 | #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ | |
186 | CONFIG_SYS_INIT_RAM_SIZE - \ | |
187 | GENERATED_GBL_DATA_SIZE) | |
53e49f74 JT |
188 | |
189 | /* Enable the PL to be downloaded */ | |
190 | #define CONFIG_FPGA | |
191 | #define CONFIG_FPGA_XILINX | |
192 | #define CONFIG_FPGA_ZYNQPL | |
193 | #define CONFIG_CMD_FPGA | |
194 | ||
195 | /* Open Firmware flat tree */ | |
196 | #define CONFIG_OF_LIBFDT | |
197 | ||
198 | /* FIT support */ | |
f22651cf | 199 | #define CONFIG_FIT |
773590eb | 200 | #define CONFIG_FIT_VERBOSE 1 /* enable fit_format_{error,warning}() */ |
f22651cf | 201 | |
f8f36c5d JT |
202 | /* FDT support */ |
203 | #define CONFIG_OF_CONTROL | |
204 | #define CONFIG_OF_SEPARATE | |
205 | #define CONFIG_DISPLAY_BOARDINFO_LATE | |
206 | ||
a8826eb4 JT |
207 | /* RSA support */ |
208 | #define CONFIG_FIT_SIGNATURE | |
209 | #define CONFIG_RSA | |
210 | ||
ae9f4899 MS |
211 | /* Extend size of kernel image for uncompression */ |
212 | #define CONFIG_SYS_BOOTM_LEN (20 * 1024 * 1024) | |
213 | ||
09ed635b JT |
214 | /* Boot FreeBSD/vxWorks from an ELF image */ |
215 | #if defined(CONFIG_ZYNQ_BOOT_FREEBSD) | |
216 | # define CONFIG_API | |
217 | # define CONFIG_CMD_ELF | |
218 | # define CONFIG_SYS_MMC_MAX_DEVICE 1 | |
219 | #endif | |
220 | ||
38716189 MS |
221 | #define CONFIG_SYS_LDSCRIPT "arch/arm/cpu/armv7/zynq/u-boot.lds" |
222 | ||
f22651cf MS |
223 | /* Commands */ |
224 | #include <config_cmd_default.h> | |
225 | ||
226 | #define CONFIG_CMD_PING | |
227 | #define CONFIG_CMD_DHCP | |
228 | #define CONFIG_CMD_MII | |
427b2d4e | 229 | #define CONFIG_CMD_TFTPPUT |
f22651cf | 230 | |
d7e269cf MS |
231 | /* SPL part */ |
232 | #define CONFIG_SPL | |
233 | #define CONFIG_CMD_SPL | |
234 | #define CONFIG_SPL_FRAMEWORK | |
235 | #define CONFIG_SPL_LIBCOMMON_SUPPORT | |
236 | #define CONFIG_SPL_LIBGENERIC_SUPPORT | |
237 | #define CONFIG_SPL_SERIAL_SUPPORT | |
238 | ||
239 | #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/zynq/u-boot-spl.lds" | |
240 | ||
241 | /* Disable dcache for SPL just for sure */ | |
242 | #ifdef CONFIG_SPL_BUILD | |
243 | #define CONFIG_SYS_DCACHE_OFF | |
244 | #undef CONFIG_FPGA | |
7450a7f7 | 245 | #undef CONFIG_OF_CONTROL |
d7e269cf MS |
246 | #endif |
247 | ||
248 | /* MMC support */ | |
249 | #ifdef CONFIG_ZYNQ_SDHCI0 | |
250 | #define CONFIG_SPL_MMC_SUPPORT | |
251 | #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */ | |
252 | #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */ | |
253 | #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1 | |
254 | #define CONFIG_SPL_LIBDISK_SUPPORT | |
255 | #define CONFIG_SPL_FAT_SUPPORT | |
256 | #define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img" | |
257 | #endif | |
258 | ||
259 | /* Address in RAM where the parameters must be copied by SPL. */ | |
260 | #define CONFIG_SYS_SPL_ARGS_ADDR 0x10000000 | |
261 | ||
262 | #define CONFIG_SPL_FAT_LOAD_ARGS_NAME "system.dtb" | |
263 | #define CONFIG_SPL_FAT_LOAD_KERNEL_NAME "uImage" | |
264 | ||
265 | /* Not using MMC raw mode - just for compilation purpose */ | |
266 | #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0 | |
267 | #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0 | |
268 | #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0 | |
269 | ||
270 | /* qspi mode is working fine */ | |
271 | #ifdef CONFIG_ZYNQ_QSPI | |
272 | #define CONFIG_SPL_SPI_SUPPORT | |
273 | #define CONFIG_SPL_SPI_LOAD | |
274 | #define CONFIG_SPL_SPI_FLASH_SUPPORT | |
275 | #define CONFIG_SPL_SPI_BUS 0 | |
276 | #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x100000 | |
277 | #define CONFIG_SPL_SPI_CS 0 | |
278 | #endif | |
279 | ||
280 | /* for booting directly linux */ | |
281 | #define CONFIG_SPL_OS_BOOT | |
282 | ||
283 | /* SP location before relocation, must use scratch RAM */ | |
284 | #define CONFIG_SPL_TEXT_BASE 0x0 | |
285 | ||
286 | /* 3 * 64kB blocks of OCM - one is on the top because of bootrom */ | |
287 | #define CONFIG_SPL_MAX_SIZE 0x30000 | |
288 | ||
289 | /* The highest 64k OCM address */ | |
290 | #define OCM_HIGH_ADDR 0xffff0000 | |
291 | ||
292 | /* Just define any reasonable size */ | |
293 | #define CONFIG_SPL_STACK_SIZE 0x1000 | |
294 | ||
295 | /* SPL stack position - and stack goes down */ | |
296 | #define CONFIG_SPL_STACK (OCM_HIGH_ADDR + CONFIG_SPL_STACK_SIZE) | |
297 | ||
298 | /* On the top of OCM space */ | |
299 | #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_STACK + \ | |
300 | GENERATED_GBL_DATA_SIZE) | |
301 | #define CONFIG_SYS_SPL_MALLOC_SIZE 0x1000 | |
302 | ||
303 | /* BSS setup */ | |
304 | #define CONFIG_SPL_BSS_START_ADDR 0x100000 | |
305 | #define CONFIG_SPL_BSS_MAX_SIZE 0x100000 | |
306 | ||
307 | #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE | |
f22651cf | 308 | |
06fe8dae | 309 | #endif /* __CONFIG_ZYNQ_COMMON_H */ |