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Commit | Line | Data |
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b5220bc6 SG |
1 | /* |
2 | * Copyright (c) 2011 The Chromium OS Authors. | |
1a459660 | 3 | * SPDX-License-Identifier: GPL-2.0+ |
b5220bc6 SG |
4 | */ |
5 | ||
29a23f9d | 6 | #ifndef USE_HOSTCC |
b5220bc6 | 7 | #include <common.h> |
fcc0a877 | 8 | #include <dm.h> |
5c33c9fd | 9 | #include <errno.h> |
b5220bc6 SG |
10 | #include <serial.h> |
11 | #include <libfdt.h> | |
6e06acb7 | 12 | #include <fdt_support.h> |
b5220bc6 | 13 | #include <fdtdec.h> |
b45122fd | 14 | #include <asm/sections.h> |
b7e0d73b | 15 | #include <dm/of_extra.h> |
5c33c9fd | 16 | #include <linux/ctype.h> |
b5220bc6 SG |
17 | |
18 | DECLARE_GLOBAL_DATA_PTR; | |
19 | ||
20 | /* | |
21 | * Here are the type we know about. One day we might allow drivers to | |
22 | * register. For now we just put them here. The COMPAT macro allows us to | |
23 | * turn this into a sparse list later, and keeps the ID with the name. | |
01a227df SG |
24 | * |
25 | * NOTE: This list is basically a TODO list for things that need to be | |
26 | * converted to driver model. So don't add new things here unless there is a | |
27 | * good reason why driver-model conversion is infeasible. Examples include | |
28 | * things which are used before driver model is available. | |
b5220bc6 SG |
29 | */ |
30 | #define COMPAT(id, name) name | |
31 | static const char * const compat_names[COMPAT_COUNT] = { | |
f88fe2de | 32 | COMPAT(UNKNOWN, "<none>"), |
0e35ad05 JZ |
33 | COMPAT(NVIDIA_TEGRA20_EMC, "nvidia,tegra20-emc"), |
34 | COMPAT(NVIDIA_TEGRA20_EMC_TABLE, "nvidia,tegra20-emc-table"), | |
312693c3 | 35 | COMPAT(NVIDIA_TEGRA20_NAND, "nvidia,tegra20-nand"), |
00f37327 | 36 | COMPAT(NVIDIA_TEGRA124_PMC, "nvidia,tegra124-pmc"), |
39f63332 | 37 | COMPAT(NVIDIA_TEGRA186_SDMMC, "nvidia,tegra186-sdhci"), |
7aaa5a60 | 38 | COMPAT(NVIDIA_TEGRA210_SDMMC, "nvidia,tegra210-sdhci"), |
a73ca478 | 39 | COMPAT(NVIDIA_TEGRA124_SDMMC, "nvidia,tegra124-sdhci"), |
f4e4e0b0 | 40 | COMPAT(NVIDIA_TEGRA30_SDMMC, "nvidia,tegra30-sdhci"), |
c9aa831e | 41 | COMPAT(NVIDIA_TEGRA20_SDMMC, "nvidia,tegra20-sdhci"), |
79c7a90f | 42 | COMPAT(NVIDIA_TEGRA124_XUSB_PADCTL, "nvidia,tegra124-xusb-padctl"), |
7aaa5a60 | 43 | COMPAT(NVIDIA_TEGRA210_XUSB_PADCTL, "nvidia,tegra210-xusb-padctl"), |
cc9fe33a HR |
44 | COMPAT(SMSC_LAN9215, "smsc,lan9215"), |
45 | COMPAT(SAMSUNG_EXYNOS5_SROMC, "samsung,exynos-sromc"), | |
c34253d1 | 46 | COMPAT(SAMSUNG_S3C2440_I2C, "samsung,s3c2440-i2c"), |
72dbff12 RS |
47 | COMPAT(SAMSUNG_EXYNOS5_SOUND, "samsung,exynos-sound"), |
48 | COMPAT(WOLFSON_WM8994_CODEC, "wolfson,wm8994-codec"), | |
6abd1620 | 49 | COMPAT(SAMSUNG_EXYNOS_USB_PHY, "samsung,exynos-usb-phy"), |
108b85be | 50 | COMPAT(SAMSUNG_EXYNOS5_USB3_PHY, "samsung,exynos5250-usb3-phy"), |
618766c0 | 51 | COMPAT(SAMSUNG_EXYNOS_TMU, "samsung,exynos-tmu"), |
de461c52 | 52 | COMPAT(SAMSUNG_EXYNOS_MIPI_DSI, "samsung,exynos-mipi-dsi"), |
7d3ca0f8 | 53 | COMPAT(SAMSUNG_EXYNOS_DWMMC, "samsung,exynos-dwmmc"), |
3577fe8b | 54 | COMPAT(SAMSUNG_EXYNOS_MMC, "samsung,exynos-mmc"), |
f37df0f8 | 55 | COMPAT(MAXIM_MAX77686_PMIC, "maxim,max77686"), |
bb8215f4 | 56 | COMPAT(GENERIC_SPI_FLASH, "spi-flash"), |
7772bb78 | 57 | COMPAT(MAXIM_98095_CODEC, "maxim,max98095-codec"), |
ecbd7e1e | 58 | COMPAT(SAMSUNG_EXYNOS5_I2C, "samsung,exynos5-hsi2c"), |
45c480c9 | 59 | COMPAT(SAMSUNG_EXYNOS_SYSMMU, "samsung,sysmmu-v3.3"), |
77f9b1fb | 60 | COMPAT(INTEL_MICROCODE, "intel,microcode"), |
6173c45b | 61 | COMPAT(AMS_AS3722, "ams,as3722"), |
c89ada01 | 62 | COMPAT(INTEL_QRK_MRC, "intel,quark-mrc"), |
6ab00db2 | 63 | COMPAT(ALTERA_SOCFPGA_DWMAC, "altr,socfpga-stmmac"), |
129adf5b | 64 | COMPAT(ALTERA_SOCFPGA_DWMMC, "altr,socfpga-dw-mshc"), |
ef4b01b2 | 65 | COMPAT(ALTERA_SOCFPGA_DWC2USB, "snps,dwc2"), |
39ea0ee9 SG |
66 | COMPAT(INTEL_BAYTRAIL_FSP, "intel,baytrail-fsp"), |
67 | COMPAT(INTEL_BAYTRAIL_FSP_MDP, "intel,baytrail-fsp-mdp"), | |
68 | COMPAT(INTEL_IVYBRIDGE_FSP, "intel,ivybridge-fsp"), | |
4ccae81c | 69 | COMPAT(COMPAT_SUNXI_NAND, "allwinner,sun4i-a10-nand"), |
e11b5e8d LFT |
70 | COMPAT(ALTERA_SOCFPGA_CLK, "altr,clk-mgr"), |
71 | COMPAT(ALTERA_SOCFPGA_PINCTRL_SINGLE, "pinctrl-single"), | |
72 | COMPAT(ALTERA_SOCFPGA_H2F_BRG, "altr,socfpga-hps2fpga-bridge"), | |
73 | COMPAT(ALTERA_SOCFPGA_LWH2F_BRG, "altr,socfpga-lwhps2fpga-bridge"), | |
74 | COMPAT(ALTERA_SOCFPGA_F2H_BRG, "altr,socfpga-fpga2hps-bridge"), | |
75 | COMPAT(ALTERA_SOCFPGA_F2SDR0, "altr,socfpga-fpga2sdram0-bridge"), | |
76 | COMPAT(ALTERA_SOCFPGA_F2SDR1, "altr,socfpga-fpga2sdram1-bridge"), | |
77 | COMPAT(ALTERA_SOCFPGA_F2SDR2, "altr,socfpga-fpga2sdram2-bridge"), | |
b5220bc6 SG |
78 | }; |
79 | ||
a53f4a29 SG |
80 | const char *fdtdec_get_compatible(enum fdt_compat_id id) |
81 | { | |
82 | /* We allow reading of the 'unknown' ID for testing purposes */ | |
83 | assert(id >= 0 && id < COMPAT_COUNT); | |
84 | return compat_names[id]; | |
85 | } | |
86 | ||
02464e38 SW |
87 | fdt_addr_t fdtdec_get_addr_size_fixed(const void *blob, int node, |
88 | const char *prop_name, int index, int na, int ns, | |
6e06acb7 | 89 | fdt_size_t *sizep, bool translate) |
b5220bc6 | 90 | { |
02464e38 SW |
91 | const fdt32_t *prop, *prop_end; |
92 | const fdt32_t *prop_addr, *prop_size, *prop_after_size; | |
236efe36 | 93 | int len; |
02464e38 | 94 | fdt_addr_t addr; |
b5220bc6 | 95 | |
1cb2323b | 96 | debug("%s: %s: ", __func__, prop_name); |
02464e38 SW |
97 | |
98 | if (na > (sizeof(fdt_addr_t) / sizeof(fdt32_t))) { | |
99 | debug("(na too large for fdt_addr_t type)\n"); | |
100 | return FDT_ADDR_T_NONE; | |
101 | } | |
102 | ||
103 | if (ns > (sizeof(fdt_size_t) / sizeof(fdt32_t))) { | |
104 | debug("(ns too large for fdt_size_t type)\n"); | |
105 | return FDT_ADDR_T_NONE; | |
106 | } | |
107 | ||
108 | prop = fdt_getprop(blob, node, prop_name, &len); | |
109 | if (!prop) { | |
110 | debug("(not found)\n"); | |
111 | return FDT_ADDR_T_NONE; | |
112 | } | |
113 | prop_end = prop + (len / sizeof(*prop)); | |
114 | ||
115 | prop_addr = prop + (index * (na + ns)); | |
116 | prop_size = prop_addr + na; | |
117 | prop_after_size = prop_size + ns; | |
118 | if (prop_after_size > prop_end) { | |
119 | debug("(not enough data: expected >= %d cells, got %d cells)\n", | |
120 | (u32)(prop_after_size - prop), ((u32)(prop_end - prop))); | |
121 | return FDT_ADDR_T_NONE; | |
122 | } | |
123 | ||
5efa1bfb | 124 | #if CONFIG_IS_ENABLED(OF_TRANSLATE) |
6e06acb7 SW |
125 | if (translate) |
126 | addr = fdt_translate_address(blob, node, prop_addr); | |
127 | else | |
128 | #endif | |
129 | addr = fdtdec_get_number(prop_addr, na); | |
02464e38 SW |
130 | |
131 | if (sizep) { | |
132 | *sizep = fdtdec_get_number(prop_size, ns); | |
fd30d2c6 SG |
133 | debug("addr=%08llx, size=%llx\n", (unsigned long long)addr, |
134 | (unsigned long long)*sizep); | |
02464e38 | 135 | } else { |
fd30d2c6 | 136 | debug("addr=%08llx\n", (unsigned long long)addr); |
02464e38 SW |
137 | } |
138 | ||
139 | return addr; | |
140 | } | |
141 | ||
142 | fdt_addr_t fdtdec_get_addr_size_auto_parent(const void *blob, int parent, | |
6e06acb7 SW |
143 | int node, const char *prop_name, int index, fdt_size_t *sizep, |
144 | bool translate) | |
02464e38 SW |
145 | { |
146 | int na, ns; | |
147 | ||
148 | debug("%s: ", __func__); | |
149 | ||
150 | na = fdt_address_cells(blob, parent); | |
151 | if (na < 1) { | |
152 | debug("(bad #address-cells)\n"); | |
153 | return FDT_ADDR_T_NONE; | |
154 | } | |
155 | ||
156 | ns = fdt_size_cells(blob, parent); | |
ff0a6358 | 157 | if (ns < 0) { |
02464e38 SW |
158 | debug("(bad #size-cells)\n"); |
159 | return FDT_ADDR_T_NONE; | |
160 | } | |
161 | ||
162 | debug("na=%d, ns=%d, ", na, ns); | |
163 | ||
164 | return fdtdec_get_addr_size_fixed(blob, node, prop_name, index, na, | |
6e06acb7 | 165 | ns, sizep, translate); |
02464e38 SW |
166 | } |
167 | ||
168 | fdt_addr_t fdtdec_get_addr_size_auto_noparent(const void *blob, int node, | |
6e06acb7 SW |
169 | const char *prop_name, int index, fdt_size_t *sizep, |
170 | bool translate) | |
02464e38 SW |
171 | { |
172 | int parent; | |
173 | ||
174 | debug("%s: ", __func__); | |
175 | ||
176 | parent = fdt_parent_offset(blob, node); | |
177 | if (parent < 0) { | |
178 | debug("(no parent found)\n"); | |
179 | return FDT_ADDR_T_NONE; | |
5b344360 | 180 | } |
02464e38 SW |
181 | |
182 | return fdtdec_get_addr_size_auto_parent(blob, parent, node, prop_name, | |
6e06acb7 | 183 | index, sizep, translate); |
02464e38 SW |
184 | } |
185 | ||
186 | fdt_addr_t fdtdec_get_addr_size(const void *blob, int node, | |
187 | const char *prop_name, fdt_size_t *sizep) | |
188 | { | |
d93b9a07 SW |
189 | int ns = sizep ? (sizeof(fdt_size_t) / sizeof(fdt32_t)) : 0; |
190 | ||
02464e38 SW |
191 | return fdtdec_get_addr_size_fixed(blob, node, prop_name, 0, |
192 | sizeof(fdt_addr_t) / sizeof(fdt32_t), | |
6e06acb7 | 193 | ns, sizep, false); |
b5220bc6 SG |
194 | } |
195 | ||
4397a2a8 SG |
196 | fdt_addr_t fdtdec_get_addr(const void *blob, int node, |
197 | const char *prop_name) | |
198 | { | |
199 | return fdtdec_get_addr_size(blob, node, prop_name, NULL); | |
200 | } | |
201 | ||
fcc0a877 | 202 | #if defined(CONFIG_PCI) && defined(CONFIG_DM_PCI) |
a62e84d7 BM |
203 | int fdtdec_get_pci_addr(const void *blob, int node, enum fdt_pci_space type, |
204 | const char *prop_name, struct fdt_pci_addr *addr) | |
205 | { | |
206 | const u32 *cell; | |
207 | int len; | |
208 | int ret = -ENOENT; | |
209 | ||
210 | debug("%s: %s: ", __func__, prop_name); | |
211 | ||
212 | /* | |
213 | * If we follow the pci bus bindings strictly, we should check | |
214 | * the value of the node's parent node's #address-cells and | |
215 | * #size-cells. They need to be 3 and 2 accordingly. However, | |
216 | * for simplicity we skip the check here. | |
217 | */ | |
218 | cell = fdt_getprop(blob, node, prop_name, &len); | |
219 | if (!cell) | |
220 | goto fail; | |
221 | ||
222 | if ((len % FDT_PCI_REG_SIZE) == 0) { | |
223 | int num = len / FDT_PCI_REG_SIZE; | |
224 | int i; | |
225 | ||
226 | for (i = 0; i < num; i++) { | |
227 | debug("pci address #%d: %08lx %08lx %08lx\n", i, | |
4ea5243a SW |
228 | (ulong)fdt32_to_cpu(cell[0]), |
229 | (ulong)fdt32_to_cpu(cell[1]), | |
230 | (ulong)fdt32_to_cpu(cell[2])); | |
231 | if ((fdt32_to_cpu(*cell) & type) == type) { | |
232 | addr->phys_hi = fdt32_to_cpu(cell[0]); | |
233 | addr->phys_mid = fdt32_to_cpu(cell[1]); | |
234 | addr->phys_lo = fdt32_to_cpu(cell[1]); | |
a62e84d7 BM |
235 | break; |
236 | } else { | |
237 | cell += (FDT_PCI_ADDR_CELLS + | |
238 | FDT_PCI_SIZE_CELLS); | |
239 | } | |
240 | } | |
241 | ||
106cce96 SG |
242 | if (i == num) { |
243 | ret = -ENXIO; | |
a62e84d7 | 244 | goto fail; |
106cce96 | 245 | } |
a62e84d7 BM |
246 | |
247 | return 0; | |
248 | } else { | |
249 | ret = -EINVAL; | |
250 | } | |
251 | ||
252 | fail: | |
253 | debug("(not found)\n"); | |
254 | return ret; | |
255 | } | |
256 | ||
257 | int fdtdec_get_pci_vendev(const void *blob, int node, u16 *vendor, u16 *device) | |
258 | { | |
259 | const char *list, *end; | |
260 | int len; | |
261 | ||
262 | list = fdt_getprop(blob, node, "compatible", &len); | |
263 | if (!list) | |
264 | return -ENOENT; | |
265 | ||
266 | end = list + len; | |
267 | while (list < end) { | |
268 | char *s; | |
269 | ||
270 | len = strlen(list); | |
271 | if (len >= strlen("pciVVVV,DDDD")) { | |
272 | s = strstr(list, "pci"); | |
273 | ||
274 | /* | |
275 | * check if the string is something like pciVVVV,DDDD.RR | |
276 | * or just pciVVVV,DDDD | |
277 | */ | |
278 | if (s && s[7] == ',' && | |
279 | (s[12] == '.' || s[12] == 0)) { | |
280 | s += 3; | |
281 | *vendor = simple_strtol(s, NULL, 16); | |
282 | ||
283 | s += 5; | |
284 | *device = simple_strtol(s, NULL, 16); | |
285 | ||
286 | return 0; | |
287 | } | |
a62e84d7 | 288 | } |
bc6351eb | 289 | list += (len + 1); |
a62e84d7 BM |
290 | } |
291 | ||
292 | return -ENOENT; | |
293 | } | |
294 | ||
fcc0a877 SG |
295 | int fdtdec_get_pci_bar32(struct udevice *dev, struct fdt_pci_addr *addr, |
296 | u32 *bar) | |
a62e84d7 | 297 | { |
a62e84d7 | 298 | int barnum; |
a62e84d7 BM |
299 | |
300 | /* extract the bar number from fdt_pci_addr */ | |
301 | barnum = addr->phys_hi & 0xff; | |
302 | if ((barnum < PCI_BASE_ADDRESS_0) || (barnum > PCI_CARDBUS_CIS)) | |
303 | return -EINVAL; | |
304 | ||
305 | barnum = (barnum - PCI_BASE_ADDRESS_0) / 4; | |
fcc0a877 | 306 | *bar = dm_pci_read_bar32(dev, barnum); |
a62e84d7 BM |
307 | |
308 | return 0; | |
309 | } | |
310 | #endif | |
311 | ||
aadef0a1 CLC |
312 | uint64_t fdtdec_get_uint64(const void *blob, int node, const char *prop_name, |
313 | uint64_t default_val) | |
314 | { | |
315 | const uint64_t *cell64; | |
316 | int length; | |
317 | ||
318 | cell64 = fdt_getprop(blob, node, prop_name, &length); | |
319 | if (!cell64 || length < sizeof(*cell64)) | |
320 | return default_val; | |
321 | ||
322 | return fdt64_to_cpu(*cell64); | |
323 | } | |
324 | ||
f88fe2de | 325 | int fdtdec_get_is_enabled(const void *blob, int node) |
b5220bc6 SG |
326 | { |
327 | const char *cell; | |
328 | ||
f88fe2de SG |
329 | /* |
330 | * It should say "okay", so only allow that. Some fdts use "ok" but | |
331 | * this is a bug. Please fix your device tree source file. See here | |
332 | * for discussion: | |
333 | * | |
334 | * http://www.mail-archive.com/u-boot@lists.denx.de/msg71598.html | |
335 | */ | |
b5220bc6 SG |
336 | cell = fdt_getprop(blob, node, "status", NULL); |
337 | if (cell) | |
f88fe2de SG |
338 | return 0 == strcmp(cell, "okay"); |
339 | return 1; | |
b5220bc6 SG |
340 | } |
341 | ||
7cde397b | 342 | enum fdt_compat_id fdtdec_lookup(const void *blob, int node) |
b5220bc6 SG |
343 | { |
344 | enum fdt_compat_id id; | |
345 | ||
346 | /* Search our drivers */ | |
347 | for (id = COMPAT_UNKNOWN; id < COMPAT_COUNT; id++) | |
348 | if (0 == fdt_node_check_compatible(blob, node, | |
349 | compat_names[id])) | |
350 | return id; | |
351 | return COMPAT_UNKNOWN; | |
352 | } | |
353 | ||
354 | int fdtdec_next_compatible(const void *blob, int node, | |
355 | enum fdt_compat_id id) | |
356 | { | |
357 | return fdt_node_offset_by_compatible(blob, node, compat_names[id]); | |
358 | } | |
359 | ||
3ddecfc7 SG |
360 | int fdtdec_next_compatible_subnode(const void *blob, int node, |
361 | enum fdt_compat_id id, int *depthp) | |
362 | { | |
363 | do { | |
364 | node = fdt_next_node(blob, node, depthp); | |
365 | } while (*depthp > 1); | |
366 | ||
367 | /* If this is a direct subnode, and compatible, return it */ | |
368 | if (*depthp == 1 && 0 == fdt_node_check_compatible( | |
369 | blob, node, compat_names[id])) | |
370 | return node; | |
371 | ||
372 | return -FDT_ERR_NOTFOUND; | |
373 | } | |
374 | ||
b5220bc6 SG |
375 | int fdtdec_next_alias(const void *blob, const char *name, |
376 | enum fdt_compat_id id, int *upto) | |
377 | { | |
378 | #define MAX_STR_LEN 20 | |
379 | char str[MAX_STR_LEN + 20]; | |
380 | int node, err; | |
381 | ||
382 | /* snprintf() is not available */ | |
383 | assert(strlen(name) < MAX_STR_LEN); | |
384 | sprintf(str, "%.*s%d", MAX_STR_LEN, name, *upto); | |
00878476 | 385 | node = fdt_path_offset(blob, str); |
b5220bc6 SG |
386 | if (node < 0) |
387 | return node; | |
388 | err = fdt_node_check_compatible(blob, node, compat_names[id]); | |
389 | if (err < 0) | |
390 | return err; | |
f88fe2de SG |
391 | if (err) |
392 | return -FDT_ERR_NOTFOUND; | |
393 | (*upto)++; | |
394 | return node; | |
b5220bc6 SG |
395 | } |
396 | ||
a53f4a29 SG |
397 | int fdtdec_find_aliases_for_id(const void *blob, const char *name, |
398 | enum fdt_compat_id id, int *node_list, int maxcount) | |
c6782270 SG |
399 | { |
400 | memset(node_list, '\0', sizeof(*node_list) * maxcount); | |
401 | ||
402 | return fdtdec_add_aliases_for_id(blob, name, id, node_list, maxcount); | |
403 | } | |
404 | ||
405 | /* TODO: Can we tighten this code up a little? */ | |
406 | int fdtdec_add_aliases_for_id(const void *blob, const char *name, | |
407 | enum fdt_compat_id id, int *node_list, int maxcount) | |
a53f4a29 SG |
408 | { |
409 | int name_len = strlen(name); | |
410 | int nodes[maxcount]; | |
411 | int num_found = 0; | |
412 | int offset, node; | |
413 | int alias_node; | |
414 | int count; | |
415 | int i, j; | |
416 | ||
417 | /* find the alias node if present */ | |
418 | alias_node = fdt_path_offset(blob, "/aliases"); | |
419 | ||
420 | /* | |
421 | * start with nothing, and we can assume that the root node can't | |
422 | * match | |
423 | */ | |
424 | memset(nodes, '\0', sizeof(nodes)); | |
425 | ||
426 | /* First find all the compatible nodes */ | |
427 | for (node = count = 0; node >= 0 && count < maxcount;) { | |
428 | node = fdtdec_next_compatible(blob, node, id); | |
429 | if (node >= 0) | |
430 | nodes[count++] = node; | |
431 | } | |
432 | if (node >= 0) | |
433 | debug("%s: warning: maxcount exceeded with alias '%s'\n", | |
434 | __func__, name); | |
435 | ||
436 | /* Now find all the aliases */ | |
a53f4a29 SG |
437 | for (offset = fdt_first_property_offset(blob, alias_node); |
438 | offset > 0; | |
439 | offset = fdt_next_property_offset(blob, offset)) { | |
440 | const struct fdt_property *prop; | |
441 | const char *path; | |
442 | int number; | |
443 | int found; | |
444 | ||
445 | node = 0; | |
446 | prop = fdt_get_property_by_offset(blob, offset, NULL); | |
447 | path = fdt_string(blob, fdt32_to_cpu(prop->nameoff)); | |
448 | if (prop->len && 0 == strncmp(path, name, name_len)) | |
449 | node = fdt_path_offset(blob, prop->data); | |
450 | if (node <= 0) | |
451 | continue; | |
452 | ||
453 | /* Get the alias number */ | |
454 | number = simple_strtoul(path + name_len, NULL, 10); | |
455 | if (number < 0 || number >= maxcount) { | |
456 | debug("%s: warning: alias '%s' is out of range\n", | |
457 | __func__, path); | |
458 | continue; | |
459 | } | |
460 | ||
461 | /* Make sure the node we found is actually in our list! */ | |
462 | found = -1; | |
463 | for (j = 0; j < count; j++) | |
464 | if (nodes[j] == node) { | |
465 | found = j; | |
466 | break; | |
467 | } | |
468 | ||
469 | if (found == -1) { | |
470 | debug("%s: warning: alias '%s' points to a node " | |
471 | "'%s' that is missing or is not compatible " | |
472 | " with '%s'\n", __func__, path, | |
473 | fdt_get_name(blob, node, NULL), | |
474 | compat_names[id]); | |
475 | continue; | |
476 | } | |
477 | ||
478 | /* | |
479 | * Add this node to our list in the right place, and mark | |
480 | * it as done. | |
481 | */ | |
482 | if (fdtdec_get_is_enabled(blob, node)) { | |
c6782270 SG |
483 | if (node_list[number]) { |
484 | debug("%s: warning: alias '%s' requires that " | |
485 | "a node be placed in the list in a " | |
486 | "position which is already filled by " | |
487 | "node '%s'\n", __func__, path, | |
488 | fdt_get_name(blob, node, NULL)); | |
489 | continue; | |
490 | } | |
a53f4a29 SG |
491 | node_list[number] = node; |
492 | if (number >= num_found) | |
493 | num_found = number + 1; | |
494 | } | |
c6782270 | 495 | nodes[found] = 0; |
a53f4a29 SG |
496 | } |
497 | ||
498 | /* Add any nodes not mentioned by an alias */ | |
499 | for (i = j = 0; i < maxcount; i++) { | |
500 | if (!node_list[i]) { | |
501 | for (; j < maxcount; j++) | |
502 | if (nodes[j] && | |
503 | fdtdec_get_is_enabled(blob, nodes[j])) | |
504 | break; | |
505 | ||
506 | /* Have we run out of nodes to add? */ | |
507 | if (j == maxcount) | |
508 | break; | |
509 | ||
510 | assert(!node_list[i]); | |
511 | node_list[i] = nodes[j++]; | |
512 | if (i >= num_found) | |
513 | num_found = i + 1; | |
514 | } | |
515 | } | |
516 | ||
517 | return num_found; | |
518 | } | |
519 | ||
5c33c9fd SG |
520 | int fdtdec_get_alias_seq(const void *blob, const char *base, int offset, |
521 | int *seqp) | |
522 | { | |
523 | int base_len = strlen(base); | |
524 | const char *find_name; | |
525 | int find_namelen; | |
526 | int prop_offset; | |
527 | int aliases; | |
528 | ||
529 | find_name = fdt_get_name(blob, offset, &find_namelen); | |
530 | debug("Looking for '%s' at %d, name %s\n", base, offset, find_name); | |
531 | ||
532 | aliases = fdt_path_offset(blob, "/aliases"); | |
533 | for (prop_offset = fdt_first_property_offset(blob, aliases); | |
534 | prop_offset > 0; | |
535 | prop_offset = fdt_next_property_offset(blob, prop_offset)) { | |
536 | const char *prop; | |
537 | const char *name; | |
538 | const char *slash; | |
c4af6732 | 539 | int len, val; |
5c33c9fd SG |
540 | |
541 | prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len); | |
542 | debug(" - %s, %s\n", name, prop); | |
543 | if (len < find_namelen || *prop != '/' || prop[len - 1] || | |
544 | strncmp(name, base, base_len)) | |
545 | continue; | |
546 | ||
547 | slash = strrchr(prop, '/'); | |
548 | if (strcmp(slash + 1, find_name)) | |
549 | continue; | |
c4af6732 SG |
550 | val = trailing_strtol(name); |
551 | if (val != -1) { | |
552 | *seqp = val; | |
553 | debug("Found seq %d\n", *seqp); | |
554 | return 0; | |
5c33c9fd SG |
555 | } |
556 | } | |
557 | ||
558 | debug("Not found\n"); | |
559 | return -ENOENT; | |
560 | } | |
561 | ||
3bc37a50 | 562 | const char *fdtdec_get_chosen_prop(const void *blob, const char *name) |
aac07d49 | 563 | { |
aac07d49 | 564 | int chosen_node; |
aac07d49 SG |
565 | |
566 | if (!blob) | |
3bc37a50 | 567 | return NULL; |
aac07d49 | 568 | chosen_node = fdt_path_offset(blob, "/chosen"); |
3bc37a50 SG |
569 | return fdt_getprop(blob, chosen_node, name, NULL); |
570 | } | |
571 | ||
572 | int fdtdec_get_chosen_node(const void *blob, const char *name) | |
573 | { | |
574 | const char *prop; | |
575 | ||
576 | prop = fdtdec_get_chosen_prop(blob, name); | |
aac07d49 SG |
577 | if (!prop) |
578 | return -FDT_ERR_NOTFOUND; | |
579 | return fdt_path_offset(blob, prop); | |
580 | } | |
581 | ||
9a263e55 SG |
582 | int fdtdec_check_fdt(void) |
583 | { | |
584 | /* | |
585 | * We must have an FDT, but we cannot panic() yet since the console | |
586 | * is not ready. So for now, just assert(). Boards which need an early | |
587 | * FDT (prior to console ready) will need to make their own | |
588 | * arrangements and do their own checks. | |
589 | */ | |
590 | assert(!fdtdec_prepare_fdt()); | |
591 | return 0; | |
592 | } | |
593 | ||
b5220bc6 SG |
594 | /* |
595 | * This function is a little odd in that it accesses global data. At some | |
596 | * point if the architecture board.c files merge this will make more sense. | |
597 | * Even now, it is common code. | |
598 | */ | |
9a263e55 | 599 | int fdtdec_prepare_fdt(void) |
b5220bc6 | 600 | { |
c309c2da SG |
601 | if (!gd->fdt_blob || ((uintptr_t)gd->fdt_blob & 3) || |
602 | fdt_check_header(gd->fdt_blob)) { | |
66312374 SG |
603 | #ifdef CONFIG_SPL_BUILD |
604 | puts("Missing DTB\n"); | |
605 | #else | |
606 | puts("No valid device tree binary found - please append one to U-Boot binary, use u-boot-dtb.bin or define CONFIG_OF_EMBED. For sandbox, use -d <file.dtb>\n"); | |
cb5f97f7 SG |
607 | # ifdef DEBUG |
608 | if (gd->fdt_blob) { | |
609 | printf("fdt_blob=%p\n", gd->fdt_blob); | |
610 | print_buffer((ulong)gd->fdt_blob, gd->fdt_blob, 4, | |
611 | 32, 0); | |
612 | } | |
613 | # endif | |
66312374 | 614 | #endif |
9a263e55 SG |
615 | return -1; |
616 | } | |
b5220bc6 SG |
617 | return 0; |
618 | } | |
d17da655 SG |
619 | |
620 | int fdtdec_lookup_phandle(const void *blob, int node, const char *prop_name) | |
621 | { | |
622 | const u32 *phandle; | |
623 | int lookup; | |
624 | ||
1cb2323b | 625 | debug("%s: %s\n", __func__, prop_name); |
d17da655 SG |
626 | phandle = fdt_getprop(blob, node, prop_name, NULL); |
627 | if (!phandle) | |
628 | return -FDT_ERR_NOTFOUND; | |
629 | ||
630 | lookup = fdt_node_offset_by_phandle(blob, fdt32_to_cpu(*phandle)); | |
631 | return lookup; | |
632 | } | |
633 | ||
634 | /** | |
635 | * Look up a property in a node and check that it has a minimum length. | |
636 | * | |
637 | * @param blob FDT blob | |
638 | * @param node node to examine | |
639 | * @param prop_name name of property to find | |
640 | * @param min_len minimum property length in bytes | |
641 | * @param err 0 if ok, or -FDT_ERR_NOTFOUND if the property is not | |
642 | found, or -FDT_ERR_BADLAYOUT if not enough data | |
643 | * @return pointer to cell, which is only valid if err == 0 | |
644 | */ | |
645 | static const void *get_prop_check_min_len(const void *blob, int node, | |
646 | const char *prop_name, int min_len, int *err) | |
647 | { | |
648 | const void *cell; | |
649 | int len; | |
650 | ||
651 | debug("%s: %s\n", __func__, prop_name); | |
652 | cell = fdt_getprop(blob, node, prop_name, &len); | |
653 | if (!cell) | |
654 | *err = -FDT_ERR_NOTFOUND; | |
655 | else if (len < min_len) | |
656 | *err = -FDT_ERR_BADLAYOUT; | |
657 | else | |
658 | *err = 0; | |
659 | return cell; | |
660 | } | |
661 | ||
662 | int fdtdec_get_int_array(const void *blob, int node, const char *prop_name, | |
663 | u32 *array, int count) | |
664 | { | |
665 | const u32 *cell; | |
666 | int i, err = 0; | |
667 | ||
668 | debug("%s: %s\n", __func__, prop_name); | |
669 | cell = get_prop_check_min_len(blob, node, prop_name, | |
670 | sizeof(u32) * count, &err); | |
671 | if (!err) { | |
672 | for (i = 0; i < count; i++) | |
673 | array[i] = fdt32_to_cpu(cell[i]); | |
674 | } | |
675 | return err; | |
676 | } | |
677 | ||
a9f04d49 SG |
678 | int fdtdec_get_int_array_count(const void *blob, int node, |
679 | const char *prop_name, u32 *array, int count) | |
680 | { | |
681 | const u32 *cell; | |
682 | int len, elems; | |
683 | int i; | |
684 | ||
685 | debug("%s: %s\n", __func__, prop_name); | |
686 | cell = fdt_getprop(blob, node, prop_name, &len); | |
687 | if (!cell) | |
688 | return -FDT_ERR_NOTFOUND; | |
689 | elems = len / sizeof(u32); | |
690 | if (count > elems) | |
691 | count = elems; | |
692 | for (i = 0; i < count; i++) | |
693 | array[i] = fdt32_to_cpu(cell[i]); | |
694 | ||
695 | return count; | |
696 | } | |
697 | ||
96875e7d SG |
698 | const u32 *fdtdec_locate_array(const void *blob, int node, |
699 | const char *prop_name, int count) | |
700 | { | |
701 | const u32 *cell; | |
702 | int err; | |
703 | ||
704 | cell = get_prop_check_min_len(blob, node, prop_name, | |
705 | sizeof(u32) * count, &err); | |
706 | return err ? NULL : cell; | |
707 | } | |
708 | ||
d17da655 SG |
709 | int fdtdec_get_bool(const void *blob, int node, const char *prop_name) |
710 | { | |
711 | const s32 *cell; | |
712 | int len; | |
713 | ||
714 | debug("%s: %s\n", __func__, prop_name); | |
715 | cell = fdt_getprop(blob, node, prop_name, &len); | |
716 | return cell != NULL; | |
717 | } | |
ed3ee5cd | 718 | |
57068a7a SG |
719 | int fdtdec_parse_phandle_with_args(const void *blob, int src_node, |
720 | const char *list_name, | |
721 | const char *cells_name, | |
722 | int cell_count, int index, | |
723 | struct fdtdec_phandle_args *out_args) | |
724 | { | |
725 | const __be32 *list, *list_end; | |
726 | int rc = 0, size, cur_index = 0; | |
727 | uint32_t count = 0; | |
728 | int node = -1; | |
729 | int phandle; | |
730 | ||
731 | /* Retrieve the phandle list property */ | |
732 | list = fdt_getprop(blob, src_node, list_name, &size); | |
733 | if (!list) | |
734 | return -ENOENT; | |
735 | list_end = list + size / sizeof(*list); | |
736 | ||
737 | /* Loop over the phandles until all the requested entry is found */ | |
738 | while (list < list_end) { | |
739 | rc = -EINVAL; | |
740 | count = 0; | |
741 | ||
742 | /* | |
743 | * If phandle is 0, then it is an empty entry with no | |
744 | * arguments. Skip forward to the next entry. | |
745 | */ | |
746 | phandle = be32_to_cpup(list++); | |
747 | if (phandle) { | |
748 | /* | |
749 | * Find the provider node and parse the #*-cells | |
750 | * property to determine the argument length. | |
751 | * | |
752 | * This is not needed if the cell count is hard-coded | |
753 | * (i.e. cells_name not set, but cell_count is set), | |
754 | * except when we're going to return the found node | |
755 | * below. | |
756 | */ | |
757 | if (cells_name || cur_index == index) { | |
758 | node = fdt_node_offset_by_phandle(blob, | |
759 | phandle); | |
760 | if (!node) { | |
761 | debug("%s: could not find phandle\n", | |
762 | fdt_get_name(blob, src_node, | |
763 | NULL)); | |
764 | goto err; | |
765 | } | |
766 | } | |
767 | ||
768 | if (cells_name) { | |
769 | count = fdtdec_get_int(blob, node, cells_name, | |
770 | -1); | |
771 | if (count == -1) { | |
772 | debug("%s: could not get %s for %s\n", | |
773 | fdt_get_name(blob, src_node, | |
774 | NULL), | |
775 | cells_name, | |
776 | fdt_get_name(blob, node, | |
777 | NULL)); | |
778 | goto err; | |
779 | } | |
780 | } else { | |
781 | count = cell_count; | |
782 | } | |
783 | ||
784 | /* | |
785 | * Make sure that the arguments actually fit in the | |
786 | * remaining property data length | |
787 | */ | |
788 | if (list + count > list_end) { | |
789 | debug("%s: arguments longer than property\n", | |
790 | fdt_get_name(blob, src_node, NULL)); | |
791 | goto err; | |
792 | } | |
793 | } | |
794 | ||
795 | /* | |
796 | * All of the error cases above bail out of the loop, so at | |
797 | * this point, the parsing is successful. If the requested | |
798 | * index matches, then fill the out_args structure and return, | |
799 | * or return -ENOENT for an empty entry. | |
800 | */ | |
801 | rc = -ENOENT; | |
802 | if (cur_index == index) { | |
803 | if (!phandle) | |
804 | goto err; | |
805 | ||
806 | if (out_args) { | |
807 | int i; | |
808 | ||
809 | if (count > MAX_PHANDLE_ARGS) { | |
810 | debug("%s: too many arguments %d\n", | |
811 | fdt_get_name(blob, src_node, | |
812 | NULL), count); | |
813 | count = MAX_PHANDLE_ARGS; | |
814 | } | |
815 | out_args->node = node; | |
816 | out_args->args_count = count; | |
817 | for (i = 0; i < count; i++) { | |
818 | out_args->args[i] = | |
819 | be32_to_cpup(list++); | |
820 | } | |
821 | } | |
822 | ||
823 | /* Found it! return success */ | |
824 | return 0; | |
825 | } | |
826 | ||
827 | node = -1; | |
828 | list += count; | |
829 | cur_index++; | |
830 | } | |
831 | ||
832 | /* | |
833 | * Result will be one of: | |
834 | * -ENOENT : index is for empty phandle | |
835 | * -EINVAL : parsing error on data | |
836 | * [1..n] : Number of phandle (count mode; when index = -1) | |
837 | */ | |
838 | rc = index < 0 ? cur_index : -ENOENT; | |
839 | err: | |
840 | return rc; | |
841 | } | |
842 | ||
1889a7e2 PF |
843 | int fdtdec_get_child_count(const void *blob, int node) |
844 | { | |
845 | int subnode; | |
846 | int num = 0; | |
847 | ||
df87e6b1 | 848 | fdt_for_each_subnode(subnode, blob, node) |
1889a7e2 PF |
849 | num++; |
850 | ||
851 | return num; | |
852 | } | |
853 | ||
bed4d892 AS |
854 | int fdtdec_get_byte_array(const void *blob, int node, const char *prop_name, |
855 | u8 *array, int count) | |
856 | { | |
857 | const u8 *cell; | |
858 | int err; | |
859 | ||
860 | cell = get_prop_check_min_len(blob, node, prop_name, count, &err); | |
861 | if (!err) | |
862 | memcpy(array, cell, count); | |
863 | return err; | |
864 | } | |
865 | ||
866 | const u8 *fdtdec_locate_byte_array(const void *blob, int node, | |
867 | const char *prop_name, int count) | |
868 | { | |
869 | const u8 *cell; | |
870 | int err; | |
871 | ||
872 | cell = get_prop_check_min_len(blob, node, prop_name, count, &err); | |
873 | if (err) | |
874 | return NULL; | |
875 | return cell; | |
876 | } | |
09258f1e | 877 | |
09258f1e AK |
878 | int fdtdec_get_config_int(const void *blob, const char *prop_name, |
879 | int default_val) | |
880 | { | |
881 | int config_node; | |
882 | ||
883 | debug("%s: %s\n", __func__, prop_name); | |
884 | config_node = fdt_path_offset(blob, "/config"); | |
885 | if (config_node < 0) | |
886 | return default_val; | |
887 | return fdtdec_get_int(blob, config_node, prop_name, default_val); | |
888 | } | |
332ab0d5 | 889 | |
79289c0b GB |
890 | int fdtdec_get_config_bool(const void *blob, const char *prop_name) |
891 | { | |
892 | int config_node; | |
893 | const void *prop; | |
894 | ||
895 | debug("%s: %s\n", __func__, prop_name); | |
896 | config_node = fdt_path_offset(blob, "/config"); | |
897 | if (config_node < 0) | |
898 | return 0; | |
899 | prop = fdt_get_property(blob, config_node, prop_name, NULL); | |
900 | ||
901 | return prop != NULL; | |
902 | } | |
903 | ||
332ab0d5 SG |
904 | char *fdtdec_get_config_string(const void *blob, const char *prop_name) |
905 | { | |
906 | const char *nodep; | |
907 | int nodeoffset; | |
908 | int len; | |
909 | ||
910 | debug("%s: %s\n", __func__, prop_name); | |
911 | nodeoffset = fdt_path_offset(blob, "/config"); | |
912 | if (nodeoffset < 0) | |
913 | return NULL; | |
914 | ||
915 | nodep = fdt_getprop(blob, nodeoffset, prop_name, &len); | |
916 | if (!nodep) | |
917 | return NULL; | |
918 | ||
919 | return (char *)nodep; | |
920 | } | |
f20c4619 | 921 | |
76489832 SG |
922 | int fdtdec_decode_region(const void *blob, int node, const char *prop_name, |
923 | fdt_addr_t *basep, fdt_size_t *sizep) | |
f20c4619 SG |
924 | { |
925 | const fdt_addr_t *cell; | |
926 | int len; | |
927 | ||
76489832 SG |
928 | debug("%s: %s: %s\n", __func__, fdt_get_name(blob, node, NULL), |
929 | prop_name); | |
f20c4619 | 930 | cell = fdt_getprop(blob, node, prop_name, &len); |
76489832 SG |
931 | if (!cell || (len < sizeof(fdt_addr_t) * 2)) { |
932 | debug("cell=%p, len=%d\n", cell, len); | |
f20c4619 | 933 | return -1; |
76489832 SG |
934 | } |
935 | ||
936 | *basep = fdt_addr_to_cpu(*cell); | |
937 | *sizep = fdt_size_to_cpu(cell[1]); | |
938 | debug("%s: base=%08lx, size=%lx\n", __func__, (ulong)*basep, | |
939 | (ulong)*sizep); | |
f20c4619 | 940 | |
f20c4619 SG |
941 | return 0; |
942 | } | |
006e73b9 | 943 | |
5f7bfdd6 | 944 | u64 fdtdec_get_number(const fdt32_t *ptr, unsigned int cells) |
56f42242 TR |
945 | { |
946 | u64 number = 0; | |
947 | ||
948 | while (cells--) | |
949 | number = (number << 32) | fdt32_to_cpu(*ptr++); | |
950 | ||
951 | return number; | |
952 | } | |
953 | ||
954 | int fdt_get_resource(const void *fdt, int node, const char *property, | |
955 | unsigned int index, struct fdt_resource *res) | |
956 | { | |
957 | const fdt32_t *ptr, *end; | |
958 | int na, ns, len, parent; | |
959 | unsigned int i = 0; | |
960 | ||
961 | parent = fdt_parent_offset(fdt, node); | |
962 | if (parent < 0) | |
963 | return parent; | |
964 | ||
965 | na = fdt_address_cells(fdt, parent); | |
966 | ns = fdt_size_cells(fdt, parent); | |
967 | ||
968 | ptr = fdt_getprop(fdt, node, property, &len); | |
969 | if (!ptr) | |
970 | return len; | |
971 | ||
972 | end = ptr + len / sizeof(*ptr); | |
973 | ||
974 | while (ptr + na + ns <= end) { | |
975 | if (i == index) { | |
976 | res->start = res->end = fdtdec_get_number(ptr, na); | |
977 | res->end += fdtdec_get_number(&ptr[na], ns) - 1; | |
978 | return 0; | |
979 | } | |
980 | ||
981 | ptr += na + ns; | |
982 | i++; | |
983 | } | |
984 | ||
985 | return -FDT_ERR_NOTFOUND; | |
986 | } | |
987 | ||
988 | int fdt_get_named_resource(const void *fdt, int node, const char *property, | |
989 | const char *prop_names, const char *name, | |
990 | struct fdt_resource *res) | |
991 | { | |
992 | int index; | |
993 | ||
b02e4044 | 994 | index = fdt_stringlist_search(fdt, node, prop_names, name); |
56f42242 TR |
995 | if (index < 0) |
996 | return index; | |
997 | ||
998 | return fdt_get_resource(fdt, node, property, index, res); | |
999 | } | |
9f85eee7 | 1000 | |
26403871 SG |
1001 | int fdtdec_decode_memory_region(const void *blob, int config_node, |
1002 | const char *mem_type, const char *suffix, | |
1003 | fdt_addr_t *basep, fdt_size_t *sizep) | |
1004 | { | |
1005 | char prop_name[50]; | |
1006 | const char *mem; | |
1007 | fdt_size_t size, offset_size; | |
1008 | fdt_addr_t base, offset; | |
1009 | int node; | |
1010 | ||
1011 | if (config_node == -1) { | |
1012 | config_node = fdt_path_offset(blob, "/config"); | |
1013 | if (config_node < 0) { | |
1014 | debug("%s: Cannot find /config node\n", __func__); | |
1015 | return -ENOENT; | |
1016 | } | |
1017 | } | |
1018 | if (!suffix) | |
1019 | suffix = ""; | |
1020 | ||
1021 | snprintf(prop_name, sizeof(prop_name), "%s-memory%s", mem_type, | |
1022 | suffix); | |
1023 | mem = fdt_getprop(blob, config_node, prop_name, NULL); | |
1024 | if (!mem) { | |
1025 | debug("%s: No memory type for '%s', using /memory\n", __func__, | |
1026 | prop_name); | |
1027 | mem = "/memory"; | |
1028 | } | |
1029 | ||
1030 | node = fdt_path_offset(blob, mem); | |
1031 | if (node < 0) { | |
1032 | debug("%s: Failed to find node '%s': %s\n", __func__, mem, | |
1033 | fdt_strerror(node)); | |
1034 | return -ENOENT; | |
1035 | } | |
1036 | ||
1037 | /* | |
1038 | * Not strictly correct - the memory may have multiple banks. We just | |
1039 | * use the first | |
1040 | */ | |
1041 | if (fdtdec_decode_region(blob, node, "reg", &base, &size)) { | |
1042 | debug("%s: Failed to decode memory region %s\n", __func__, | |
1043 | mem); | |
1044 | return -EINVAL; | |
1045 | } | |
1046 | ||
1047 | snprintf(prop_name, sizeof(prop_name), "%s-offset%s", mem_type, | |
1048 | suffix); | |
1049 | if (fdtdec_decode_region(blob, config_node, prop_name, &offset, | |
1050 | &offset_size)) { | |
1051 | debug("%s: Failed to decode memory region '%s'\n", __func__, | |
1052 | prop_name); | |
1053 | return -EINVAL; | |
1054 | } | |
1055 | ||
1056 | *basep = base + offset; | |
1057 | *sizep = offset_size; | |
1058 | ||
1059 | return 0; | |
1060 | } | |
b45122fd | 1061 | |
12e67114 SG |
1062 | static int decode_timing_property(const void *blob, int node, const char *name, |
1063 | struct timing_entry *result) | |
1064 | { | |
1065 | int length, ret = 0; | |
1066 | const u32 *prop; | |
1067 | ||
1068 | prop = fdt_getprop(blob, node, name, &length); | |
1069 | if (!prop) { | |
1070 | debug("%s: could not find property %s\n", | |
1071 | fdt_get_name(blob, node, NULL), name); | |
1072 | return length; | |
1073 | } | |
1074 | ||
1075 | if (length == sizeof(u32)) { | |
1076 | result->typ = fdtdec_get_int(blob, node, name, 0); | |
1077 | result->min = result->typ; | |
1078 | result->max = result->typ; | |
1079 | } else { | |
1080 | ret = fdtdec_get_int_array(blob, node, name, &result->min, 3); | |
1081 | } | |
1082 | ||
1083 | return ret; | |
1084 | } | |
1085 | ||
1086 | int fdtdec_decode_display_timing(const void *blob, int parent, int index, | |
1087 | struct display_timing *dt) | |
1088 | { | |
1089 | int i, node, timings_node; | |
1090 | u32 val = 0; | |
1091 | int ret = 0; | |
1092 | ||
1093 | timings_node = fdt_subnode_offset(blob, parent, "display-timings"); | |
1094 | if (timings_node < 0) | |
1095 | return timings_node; | |
1096 | ||
1097 | for (i = 0, node = fdt_first_subnode(blob, timings_node); | |
1098 | node > 0 && i != index; | |
1099 | node = fdt_next_subnode(blob, node)) | |
1100 | i++; | |
1101 | ||
1102 | if (node < 0) | |
1103 | return node; | |
1104 | ||
1105 | memset(dt, 0, sizeof(*dt)); | |
1106 | ||
1107 | ret |= decode_timing_property(blob, node, "hback-porch", | |
1108 | &dt->hback_porch); | |
1109 | ret |= decode_timing_property(blob, node, "hfront-porch", | |
1110 | &dt->hfront_porch); | |
1111 | ret |= decode_timing_property(blob, node, "hactive", &dt->hactive); | |
1112 | ret |= decode_timing_property(blob, node, "hsync-len", &dt->hsync_len); | |
1113 | ret |= decode_timing_property(blob, node, "vback-porch", | |
1114 | &dt->vback_porch); | |
1115 | ret |= decode_timing_property(blob, node, "vfront-porch", | |
1116 | &dt->vfront_porch); | |
1117 | ret |= decode_timing_property(blob, node, "vactive", &dt->vactive); | |
1118 | ret |= decode_timing_property(blob, node, "vsync-len", &dt->vsync_len); | |
1119 | ret |= decode_timing_property(blob, node, "clock-frequency", | |
1120 | &dt->pixelclock); | |
1121 | ||
1122 | dt->flags = 0; | |
1123 | val = fdtdec_get_int(blob, node, "vsync-active", -1); | |
1124 | if (val != -1) { | |
1125 | dt->flags |= val ? DISPLAY_FLAGS_VSYNC_HIGH : | |
1126 | DISPLAY_FLAGS_VSYNC_LOW; | |
1127 | } | |
1128 | val = fdtdec_get_int(blob, node, "hsync-active", -1); | |
1129 | if (val != -1) { | |
1130 | dt->flags |= val ? DISPLAY_FLAGS_HSYNC_HIGH : | |
1131 | DISPLAY_FLAGS_HSYNC_LOW; | |
1132 | } | |
1133 | val = fdtdec_get_int(blob, node, "de-active", -1); | |
1134 | if (val != -1) { | |
1135 | dt->flags |= val ? DISPLAY_FLAGS_DE_HIGH : | |
1136 | DISPLAY_FLAGS_DE_LOW; | |
1137 | } | |
1138 | val = fdtdec_get_int(blob, node, "pixelclk-active", -1); | |
1139 | if (val != -1) { | |
1140 | dt->flags |= val ? DISPLAY_FLAGS_PIXDATA_POSEDGE : | |
1141 | DISPLAY_FLAGS_PIXDATA_NEGEDGE; | |
1142 | } | |
1143 | ||
1144 | if (fdtdec_get_bool(blob, node, "interlaced")) | |
1145 | dt->flags |= DISPLAY_FLAGS_INTERLACED; | |
1146 | if (fdtdec_get_bool(blob, node, "doublescan")) | |
1147 | dt->flags |= DISPLAY_FLAGS_DOUBLESCAN; | |
1148 | if (fdtdec_get_bool(blob, node, "doubleclk")) | |
1149 | dt->flags |= DISPLAY_FLAGS_DOUBLECLK; | |
1150 | ||
04b9dd10 | 1151 | return ret; |
12e67114 SG |
1152 | } |
1153 | ||
623f6019 NR |
1154 | int fdtdec_setup_memory_size(void) |
1155 | { | |
1156 | int ret, mem; | |
1157 | struct fdt_resource res; | |
1158 | ||
1159 | mem = fdt_path_offset(gd->fdt_blob, "/memory"); | |
1160 | if (mem < 0) { | |
1161 | debug("%s: Missing /memory node\n", __func__); | |
1162 | return -EINVAL; | |
1163 | } | |
1164 | ||
1165 | ret = fdt_get_resource(gd->fdt_blob, mem, "reg", 0, &res); | |
1166 | if (ret != 0) { | |
1167 | debug("%s: Unable to decode first memory bank\n", __func__); | |
1168 | return -EINVAL; | |
1169 | } | |
1170 | ||
1171 | gd->ram_size = (phys_size_t)(res.end - res.start + 1); | |
1172 | debug("%s: Initial DRAM size %llx\n", __func__, (u64)gd->ram_size); | |
1173 | ||
1174 | return 0; | |
1175 | } | |
1176 | ||
1177 | #if defined(CONFIG_NR_DRAM_BANKS) | |
1178 | int fdtdec_setup_memory_banksize(void) | |
1179 | { | |
1180 | int bank, ret, mem; | |
1181 | struct fdt_resource res; | |
1182 | ||
1183 | mem = fdt_path_offset(gd->fdt_blob, "/memory"); | |
1184 | if (mem < 0) { | |
1185 | debug("%s: Missing /memory node\n", __func__); | |
1186 | return -EINVAL; | |
1187 | } | |
1188 | ||
1189 | for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) { | |
1190 | ret = fdt_get_resource(gd->fdt_blob, mem, "reg", bank, &res); | |
1191 | if (ret == -FDT_ERR_NOTFOUND) | |
1192 | break; | |
1193 | if (ret != 0) | |
1194 | return -EINVAL; | |
1195 | ||
1196 | gd->bd->bi_dram[bank].start = (phys_addr_t)res.start; | |
1197 | gd->bd->bi_dram[bank].size = | |
1198 | (phys_size_t)(res.end - res.start + 1); | |
1199 | ||
1200 | debug("%s: DRAM Bank #%d: start = 0x%llx, size = 0x%llx\n", | |
1201 | __func__, bank, | |
1202 | (unsigned long long)gd->bd->bi_dram[bank].start, | |
1203 | (unsigned long long)gd->bd->bi_dram[bank].size); | |
1204 | } | |
1205 | ||
1206 | return 0; | |
1207 | } | |
1208 | #endif | |
1209 | ||
0879361f | 1210 | int fdtdec_setup(void) |
b45122fd | 1211 | { |
0f925822 | 1212 | #if CONFIG_IS_ENABLED(OF_CONTROL) |
b45122fd SG |
1213 | # ifdef CONFIG_OF_EMBED |
1214 | /* Get a pointer to the FDT */ | |
1215 | gd->fdt_blob = __dtb_dt_begin; | |
1216 | # elif defined CONFIG_OF_SEPARATE | |
1217 | # ifdef CONFIG_SPL_BUILD | |
10172962 SG |
1218 | /* FDT is at end of BSS unless it is in a different memory region */ |
1219 | if (IS_ENABLED(CONFIG_SPL_SEPARATE_BSS)) | |
1220 | gd->fdt_blob = (ulong *)&_image_binary_end; | |
1221 | else | |
1222 | gd->fdt_blob = (ulong *)&__bss_end; | |
b45122fd SG |
1223 | # else |
1224 | /* FDT is at end of image */ | |
1225 | gd->fdt_blob = (ulong *)&_end; | |
3bd926cc | 1226 | # endif |
82f766d1 AD |
1227 | # elif defined(CONFIG_OF_BOARD) |
1228 | /* Allow the board to override the fdt address. */ | |
1229 | gd->fdt_blob = board_fdt_blob_setup(); | |
b45122fd SG |
1230 | # elif defined(CONFIG_OF_HOSTFILE) |
1231 | if (sandbox_read_fdt_from_file()) { | |
1232 | puts("Failed to read control FDT\n"); | |
1233 | return -1; | |
1234 | } | |
1235 | # endif | |
1236 | # ifndef CONFIG_SPL_BUILD | |
1237 | /* Allow the early environment to override the fdt address */ | |
1238 | gd->fdt_blob = (void *)getenv_ulong("fdtcontroladdr", 16, | |
1239 | (uintptr_t)gd->fdt_blob); | |
1240 | # endif | |
29a23f9d | 1241 | #endif |
0879361f | 1242 | return fdtdec_prepare_fdt(); |
b45122fd SG |
1243 | } |
1244 | ||
1245 | #endif /* !USE_HOSTCC */ |