projects / people / ms / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| 65b20dce YT |
1 | /* |
| 2 | * (C) Copyright 2008 Dmitry Rakhchev, EmCraft Systems, rda@emcraft.com | |
| 3 | * | |
| 4 | * Developed for DENX Software Engineering GmbH | |
| 5 | * | |
| 6 | * See file CREDITS for list of people who contributed to this | |
| 7 | * project. | |
| 8 | * | |
| 9 | * This program is free software; you can redistribute it and/or | |
| 10 | * modify it under the terms of the GNU General Public License as | |
| 11 | * published by the Free Software Foundation; either version 2 of | |
| 12 | * the License, or (at your option) any later version. | |
| 13 | * | |
| 14 | * This program is distributed in the hope that it will be useful, | |
| 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 17 | * GNU General Public License for more details. | |
| 18 | * | |
| 19 | * You should have received a copy of the GNU General Public License | |
| 20 | * along with this program; if not, write to the Free Software | |
| 21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
| 22 | * MA 02111-1307 USA | |
| 23 | */ | |
| 24 | #include <common.h> | |
| 25 | ||
| 26 | #ifdef CONFIG_POST | |
| 27 | ||
| 28 | /* This test performs testing of FPGA SCRATCH register, | |
| 29 | * gets FPGA version and run get_ram_size() on FPGA memory | |
| 30 | */ | |
| 31 | ||
| 32 | #include <post.h> | |
| 33 | ||
| 34 | #include <asm/io.h> | |
| 35 | ||
| 36 | DECLARE_GLOBAL_DATA_PTR; | |
| 37 | ||
| 38 | #define FPGA_SCRATCH_REG 0xC4000050 | |
| 39 | #define FPGA_VERSION_REG 0xC4000040 | |
| 40 | #define FPGA_RAM_START 0xC4200000 | |
| 41 | #define FPGA_RAM_END 0xC4203FFF | |
| 42 | ||
| 43 | #define FPGA_PWM_CTRL_REG 0xC4000020 | |
| 44 | #define FPGA_PWM_TV_REG 0xC4000024 | |
| 45 | ||
| 46 | /* Turn on backlight, set brightness */ | |
| 47 | void fpga_backlight_enable(int pwm) | |
| 48 | { | |
| 49 | out_be16((void *)FPGA_PWM_CTRL_REG, 0x0701); | |
| 50 | out_be16((void *)FPGA_PWM_TV_REG, pwm); | |
| 51 | } | |
| 52 | ||
| 53 | #if CONFIG_POST & CFG_POST_BSPEC3 | |
| 54 | ||
| 55 | static int one_scratch_test(uint value) | |
| 56 | { | |
| 57 | uint read_value; | |
| 58 | int ret = 0; | |
| 59 | ||
| 60 | out_be32((void *)FPGA_SCRATCH_REG, value); | |
| 61 | /* read other location (protect against data lines capacity) */ | |
| 62 | ret = in_be16((void *)FPGA_VERSION_REG); | |
| 63 | /* verify test pattern */ | |
| 64 | read_value = in_be32((void *)FPGA_SCRATCH_REG); | |
| 65 | if (read_value != value) { | |
| 66 | post_log("FPGA SCRATCH test failed write %08X, read %08X\n", | |
| 67 | value, read_value); | |
| 68 | ret = 1; | |
| 69 | } | |
| 70 | ||
| 71 | return ret; | |
| 72 | } | |
| 73 | ||
| 74 | /* Verify FPGA, get version & memory size */ | |
| 75 | int fpga_post_test(int flags) | |
| 76 | { | |
| 77 | uint old_value; | |
| 78 | ushort version; | |
| 79 | uint read_value; | |
| 80 | int ret = 0; | |
| 81 | ||
| 82 | post_log("\n"); | |
| 83 | old_value = in_be32((void *)FPGA_SCRATCH_REG); | |
| 84 | ||
| 85 | if (one_scratch_test(0x55555555)) | |
| 86 | ret = 1; | |
| 87 | if (one_scratch_test(0xAAAAAAAA)) | |
| 88 | ret = 1; | |
| 89 | ||
| 90 | out_be32((void *)FPGA_SCRATCH_REG, old_value); | |
| 91 | ||
| 92 | version = in_be16((void *)FPGA_VERSION_REG); | |
| 93 | post_log("FPGA : version %u.%u\n", | |
| 94 | (version >> 8) & 0xFF, version & 0xFF); | |
| 95 | ||
| 96 | read_value = get_ram_size((void *)CFG_FPGA_BASE_1, 0x4000); | |
| 97 | post_log("FPGA RAM size: %d bytes\n", read_value); | |
| 98 | ||
| 99 | return ret; | |
| 100 | } | |
| 101 | ||
| 102 | #endif /* CONFIG_POST & CFG_POST_BSPEC3 */ | |
| 103 | #endif /* CONFIG_POST */ | |
| 104 |