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324f6cfd WD |
1 | /* |
2 | * (C) Copyright 2002 | |
3 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. | |
4 | * | |
5 | * See file CREDITS for list of people who contributed to this | |
6 | * project. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or | |
9 | * modify it under the terms of the GNU General Public License as | |
10 | * published by the Free Software Foundation; either version 2 of | |
11 | * the License, or (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
21 | * MA 02111-1307 USA | |
228f29ac WD |
22 | * |
23 | * Be sure to mark tests to be run before relocation as such with the | |
6d0f6bcf | 24 | * CONFIG_SYS_POST_PREREL flag so that logging is done correctly if the |
228f29ac | 25 | * logbuffer support is enabled. |
324f6cfd WD |
26 | */ |
27 | ||
28 | #include <common.h> | |
29 | ||
324f6cfd WD |
30 | #include <post.h> |
31 | ||
6e8ec682 | 32 | extern int ocm_post_test (int flags); |
324f6cfd WD |
33 | extern int cache_post_test (int flags); |
34 | extern int watchdog_post_test (int flags); | |
35 | extern int i2c_post_test (int flags); | |
36 | extern int rtc_post_test (int flags); | |
37 | extern int memory_post_test (int flags); | |
38 | extern int cpu_post_test (int flags); | |
a11e0696 | 39 | extern int fpu_post_test (int flags); |
324f6cfd WD |
40 | extern int uart_post_test (int flags); |
41 | extern int ether_post_test (int flags); | |
42 | extern int spi_post_test (int flags); | |
43 | extern int usb_post_test (int flags); | |
44 | extern int spr_post_test (int flags); | |
4532cb69 | 45 | extern int sysmon_post_test (int flags); |
5a8c51cd | 46 | extern int dsp_post_test (int flags); |
79fa88f3 | 47 | extern int codec_post_test (int flags); |
531e3e8b | 48 | extern int ecc_post_test (int flags); |
f6f7395e | 49 | extern int flash_post_test(int flags); |
4532cb69 | 50 | |
65b20dce YT |
51 | extern int dspic_init_post_test (int flags); |
52 | extern int dspic_post_test (int flags); | |
53 | extern int gdc_post_test (int flags); | |
54 | extern int fpga_post_test (int flags); | |
55 | extern int lwmon5_watchdog_post_test(int flags); | |
56 | extern int sysmon1_post_test(int flags); | |
29fd7ceb | 57 | extern int coprocessor_post_test(int flags); |
2151374f MF |
58 | extern int led_post_test(int flags); |
59 | extern int button_post_test(int flags); | |
65b20dce | 60 | |
4532cb69 WD |
61 | extern int sysmon_init_f (void); |
62 | ||
63 | extern void sysmon_reloc (void); | |
64 | ||
324f6cfd WD |
65 | |
66 | struct post_test post_list[] = | |
67 | { | |
6d0f6bcf | 68 | #if CONFIG_POST & CONFIG_SYS_POST_OCM |
6e8ec682 YT |
69 | { |
70 | "OCM test", | |
71 | "ocm", | |
72 | "This test checks on chip memory (OCM).", | |
7845d490 | 73 | POST_ROM | POST_ALWAYS | POST_PREREL | POST_CRITICAL | POST_STOP, |
6e8ec682 YT |
74 | &ocm_post_test, |
75 | NULL, | |
76 | NULL, | |
6d0f6bcf | 77 | CONFIG_SYS_POST_OCM |
6e8ec682 YT |
78 | }, |
79 | #endif | |
6d0f6bcf | 80 | #if CONFIG_POST & CONFIG_SYS_POST_CACHE |
324f6cfd | 81 | { |
8bde7f77 WD |
82 | "Cache test", |
83 | "cache", | |
84 | "This test verifies the CPU cache operation.", | |
85 | POST_RAM | POST_ALWAYS, | |
86 | &cache_post_test, | |
87 | NULL, | |
88 | NULL, | |
6d0f6bcf | 89 | CONFIG_SYS_POST_CACHE |
324f6cfd WD |
90 | }, |
91 | #endif | |
6d0f6bcf | 92 | #if CONFIG_POST & CONFIG_SYS_POST_WATCHDOG |
65b20dce YT |
93 | #if defined(CONFIG_POST_WATCHDOG) |
94 | CONFIG_POST_WATCHDOG, | |
95 | #else | |
324f6cfd | 96 | { |
8bde7f77 WD |
97 | "Watchdog timer test", |
98 | "watchdog", | |
99 | "This test checks the watchdog timer.", | |
8564acf9 | 100 | POST_RAM | POST_POWERON | POST_SLOWTEST | POST_MANUAL | POST_REBOOT, |
8bde7f77 WD |
101 | &watchdog_post_test, |
102 | NULL, | |
103 | NULL, | |
6d0f6bcf | 104 | CONFIG_SYS_POST_WATCHDOG |
324f6cfd WD |
105 | }, |
106 | #endif | |
65b20dce | 107 | #endif |
6d0f6bcf | 108 | #if CONFIG_POST & CONFIG_SYS_POST_I2C |
324f6cfd | 109 | { |
8bde7f77 WD |
110 | "I2C test", |
111 | "i2c", | |
112 | "This test verifies the I2C operation.", | |
113 | POST_RAM | POST_ALWAYS, | |
114 | &i2c_post_test, | |
115 | NULL, | |
116 | NULL, | |
6d0f6bcf | 117 | CONFIG_SYS_POST_I2C |
324f6cfd WD |
118 | }, |
119 | #endif | |
6d0f6bcf | 120 | #if CONFIG_POST & CONFIG_SYS_POST_RTC |
324f6cfd | 121 | { |
8bde7f77 WD |
122 | "RTC test", |
123 | "rtc", | |
124 | "This test verifies the RTC operation.", | |
8564acf9 | 125 | POST_RAM | POST_SLOWTEST | POST_MANUAL, |
8bde7f77 WD |
126 | &rtc_post_test, |
127 | NULL, | |
128 | NULL, | |
6d0f6bcf | 129 | CONFIG_SYS_POST_RTC |
324f6cfd WD |
130 | }, |
131 | #endif | |
6d0f6bcf | 132 | #if CONFIG_POST & CONFIG_SYS_POST_MEMORY |
324f6cfd | 133 | { |
8bde7f77 WD |
134 | "Memory test", |
135 | "memory", | |
136 | "This test checks RAM.", | |
8564acf9 | 137 | POST_ROM | POST_POWERON | POST_SLOWTEST | POST_PREREL, |
8bde7f77 WD |
138 | &memory_post_test, |
139 | NULL, | |
140 | NULL, | |
6d0f6bcf | 141 | CONFIG_SYS_POST_MEMORY |
324f6cfd WD |
142 | }, |
143 | #endif | |
6d0f6bcf | 144 | #if CONFIG_POST & CONFIG_SYS_POST_CPU |
324f6cfd | 145 | { |
8bde7f77 WD |
146 | "CPU test", |
147 | "cpu", | |
148 | "This test verifies the arithmetic logic unit of" | |
149 | " CPU.", | |
150 | POST_RAM | POST_ALWAYS, | |
151 | &cpu_post_test, | |
152 | NULL, | |
153 | NULL, | |
6d0f6bcf | 154 | CONFIG_SYS_POST_CPU |
324f6cfd WD |
155 | }, |
156 | #endif | |
6d0f6bcf | 157 | #if CONFIG_POST & CONFIG_SYS_POST_FPU |
a11e0696 IL |
158 | { |
159 | "FPU test", | |
160 | "fpu", | |
161 | "This test verifies the arithmetic logic unit of" | |
162 | " FPU.", | |
163 | POST_RAM | POST_ALWAYS, | |
164 | &fpu_post_test, | |
165 | NULL, | |
166 | NULL, | |
6d0f6bcf | 167 | CONFIG_SYS_POST_FPU |
a11e0696 IL |
168 | }, |
169 | #endif | |
6d0f6bcf | 170 | #if CONFIG_POST & CONFIG_SYS_POST_UART |
834a45d7 SR |
171 | #if defined(CONFIG_POST_UART) |
172 | CONFIG_POST_UART, | |
173 | #else | |
324f6cfd | 174 | { |
8bde7f77 WD |
175 | "UART test", |
176 | "uart", | |
177 | "This test verifies the UART operation.", | |
8564acf9 | 178 | POST_RAM | POST_SLOWTEST | POST_MANUAL, |
8bde7f77 WD |
179 | &uart_post_test, |
180 | NULL, | |
181 | NULL, | |
6d0f6bcf | 182 | CONFIG_SYS_POST_UART |
324f6cfd | 183 | }, |
834a45d7 | 184 | #endif /* CONFIG_POST_UART */ |
324f6cfd | 185 | #endif |
6d0f6bcf | 186 | #if CONFIG_POST & CONFIG_SYS_POST_ETHER |
324f6cfd | 187 | { |
8bde7f77 WD |
188 | "ETHERNET test", |
189 | "ethernet", | |
190 | "This test verifies the ETHERNET operation.", | |
191 | POST_RAM | POST_ALWAYS | POST_MANUAL, | |
192 | ðer_post_test, | |
193 | NULL, | |
194 | NULL, | |
6d0f6bcf | 195 | CONFIG_SYS_POST_ETHER |
324f6cfd WD |
196 | }, |
197 | #endif | |
6d0f6bcf | 198 | #if CONFIG_POST & CONFIG_SYS_POST_SPI |
324f6cfd | 199 | { |
8bde7f77 WD |
200 | "SPI test", |
201 | "spi", | |
202 | "This test verifies the SPI operation.", | |
203 | POST_RAM | POST_ALWAYS | POST_MANUAL, | |
204 | &spi_post_test, | |
205 | NULL, | |
206 | NULL, | |
6d0f6bcf | 207 | CONFIG_SYS_POST_SPI |
324f6cfd WD |
208 | }, |
209 | #endif | |
6d0f6bcf | 210 | #if CONFIG_POST & CONFIG_SYS_POST_USB |
324f6cfd | 211 | { |
8bde7f77 WD |
212 | "USB test", |
213 | "usb", | |
214 | "This test verifies the USB operation.", | |
215 | POST_RAM | POST_ALWAYS | POST_MANUAL, | |
216 | &usb_post_test, | |
217 | NULL, | |
218 | NULL, | |
6d0f6bcf | 219 | CONFIG_SYS_POST_USB |
324f6cfd WD |
220 | }, |
221 | #endif | |
6d0f6bcf | 222 | #if CONFIG_POST & CONFIG_SYS_POST_SPR |
324f6cfd | 223 | { |
8bde7f77 WD |
224 | "SPR test", |
225 | "spr", | |
226 | "This test checks SPR contents.", | |
b2e2142c | 227 | POST_RAM | POST_ALWAYS, |
8bde7f77 WD |
228 | &spr_post_test, |
229 | NULL, | |
230 | NULL, | |
6d0f6bcf | 231 | CONFIG_SYS_POST_SPR |
324f6cfd WD |
232 | }, |
233 | #endif | |
6d0f6bcf | 234 | #if CONFIG_POST & CONFIG_SYS_POST_SYSMON |
4532cb69 | 235 | { |
8bde7f77 WD |
236 | "SYSMON test", |
237 | "sysmon", | |
238 | "This test monitors system hardware.", | |
239 | POST_RAM | POST_ALWAYS, | |
240 | &sysmon_post_test, | |
241 | &sysmon_init_f, | |
242 | &sysmon_reloc, | |
6d0f6bcf | 243 | CONFIG_SYS_POST_SYSMON |
4532cb69 WD |
244 | }, |
245 | #endif | |
6d0f6bcf | 246 | #if CONFIG_POST & CONFIG_SYS_POST_DSP |
5a8c51cd WD |
247 | { |
248 | "DSP test", | |
249 | "dsp", | |
250 | "This test checks any connected DSP(s).", | |
5744ddc6 | 251 | POST_RAM | POST_ALWAYS | POST_MANUAL, |
5a8c51cd WD |
252 | &dsp_post_test, |
253 | NULL, | |
254 | NULL, | |
6d0f6bcf | 255 | CONFIG_SYS_POST_DSP |
5a8c51cd WD |
256 | }, |
257 | #endif | |
6d0f6bcf | 258 | #if CONFIG_POST & CONFIG_SYS_POST_CODEC |
79fa88f3 WD |
259 | { |
260 | "CODEC test", | |
261 | "codec", | |
262 | "This test checks any connected codec(s).", | |
263 | POST_RAM | POST_MANUAL, | |
264 | &codec_post_test, | |
265 | NULL, | |
266 | NULL, | |
6d0f6bcf | 267 | CONFIG_SYS_POST_CODEC |
79fa88f3 WD |
268 | }, |
269 | #endif | |
6d0f6bcf | 270 | #if CONFIG_POST & CONFIG_SYS_POST_ECC |
531e3e8b PK |
271 | { |
272 | "ECC test", | |
273 | "ecc", | |
8dafa874 LJ |
274 | "This test checks the ECC facility of memory.", |
275 | POST_ROM | POST_ALWAYS | POST_PREREL, | |
531e3e8b PK |
276 | &ecc_post_test, |
277 | NULL, | |
278 | NULL, | |
6d0f6bcf | 279 | CONFIG_SYS_POST_ECC |
531e3e8b PK |
280 | }, |
281 | #endif | |
6d0f6bcf | 282 | #if CONFIG_POST & CONFIG_SYS_POST_BSPEC1 |
65b20dce YT |
283 | CONFIG_POST_BSPEC1, |
284 | #endif | |
6d0f6bcf | 285 | #if CONFIG_POST & CONFIG_SYS_POST_BSPEC2 |
65b20dce YT |
286 | CONFIG_POST_BSPEC2, |
287 | #endif | |
6d0f6bcf | 288 | #if CONFIG_POST & CONFIG_SYS_POST_BSPEC3 |
65b20dce YT |
289 | CONFIG_POST_BSPEC3, |
290 | #endif | |
6d0f6bcf | 291 | #if CONFIG_POST & CONFIG_SYS_POST_BSPEC4 |
65b20dce YT |
292 | CONFIG_POST_BSPEC4, |
293 | #endif | |
6d0f6bcf | 294 | #if CONFIG_POST & CONFIG_SYS_POST_BSPEC5 |
65b20dce YT |
295 | CONFIG_POST_BSPEC5, |
296 | #endif | |
29fd7ceb AG |
297 | #if CONFIG_POST & CONFIG_SYS_POST_COPROC |
298 | { | |
299 | "Coprocessors communication test", | |
300 | "coproc_com", | |
301 | "This test checks communication with coprocessors.", | |
302 | POST_RAM | POST_ALWAYS | POST_CRITICAL, | |
303 | &coprocessor_post_test, | |
304 | NULL, | |
305 | NULL, | |
306 | CONFIG_SYS_POST_COPROC | |
f6f7395e MF |
307 | }, |
308 | #endif | |
309 | #if CONFIG_POST & CONFIG_SYS_POST_FLASH | |
310 | { | |
311 | "Parallel NOR flash test", | |
312 | "flash", | |
313 | "This test verifies parallel flash operations.", | |
314 | POST_RAM | POST_SLOWTEST | POST_MANUAL, | |
315 | &flash_post_test, | |
316 | NULL, | |
317 | NULL, | |
318 | CONFIG_SYS_POST_FLASH | |
319 | }, | |
29fd7ceb | 320 | #endif |
324f6cfd WD |
321 | }; |
322 | ||
d2397817 | 323 | unsigned int post_list_size = ARRAY_SIZE(post_list); |