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arc: define and use PTAG AUX regs for MMUv3 only
[people/ms/u-boot.git] / arch / arc / include / asm / arcregs.h
1 /*
2 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. All rights reserved.
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7 #ifndef _ASM_ARC_ARCREGS_H
8 #define _ASM_ARC_ARCREGS_H
9
10 #include <asm/cache.h>
11
12 /*
13 * ARC architecture has additional address space - auxiliary registers.
14 * These registers are mostly used for configuration purposes.
15 * These registers are not memory mapped and special commands are used for
16 * access: "lr"/"sr".
17 */
18
19 #define ARC_AUX_IDENTITY 0x04
20 #define ARC_AUX_STATUS32 0x0a
21
22 /* Instruction cache related auxiliary registers */
23 #define ARC_AUX_IC_IVIC 0x10
24 #define ARC_AUX_IC_CTRL 0x11
25 #define ARC_AUX_IC_IVIL 0x19
26 #if (CONFIG_ARC_MMU_VER == 3)
27 #define ARC_AUX_IC_PTAG 0x1E
28 #endif
29 #define ARC_BCR_IC_BUILD 0x77
30
31 /* Timer related auxiliary registers */
32 #define ARC_AUX_TIMER0_CNT 0x21 /* Timer 0 count */
33 #define ARC_AUX_TIMER0_CTRL 0x22 /* Timer 0 control */
34 #define ARC_AUX_TIMER0_LIMIT 0x23 /* Timer 0 limit */
35
36 #define ARC_AUX_INTR_VEC_BASE 0x25
37
38 /* Data cache related auxiliary registers */
39 #define ARC_AUX_DC_IVDC 0x47
40 #define ARC_AUX_DC_CTRL 0x48
41
42 #define ARC_AUX_DC_IVDL 0x4A
43 #define ARC_AUX_DC_FLSH 0x4B
44 #define ARC_AUX_DC_FLDL 0x4C
45 #if (CONFIG_ARC_MMU_VER == 3)
46 #define ARC_AUX_DC_PTAG 0x5C
47 #endif
48 #define ARC_BCR_DC_BUILD 0x72
49
50 #ifndef __ASSEMBLY__
51 /* Accessors for auxiliary registers */
52 #define read_aux_reg(reg) __builtin_arc_lr(reg)
53
54 /* gcc builtin sr needs reg param to be long immediate */
55 #define write_aux_reg(reg_immed, val) \
56 __builtin_arc_sr((unsigned int)val, reg_immed)
57 #endif /* __ASSEMBLY__ */
58
59 #endif /* _ASM_ARC_ARCREGS_H */