arch/arm/cpu/arm925t/start.S

   1 /*
   2  *  armboot - Startup Code for ARM925 CPU-core
   3  *
   4  *  Copyright (c) 2003  Texas Instruments
   5  *
   6  *  ----- Adapted for OMAP1510 from ARM920 code ------
   7  *
   8  *  Copyright (c) 2001  Marius Gröger <mag@sysgo.de>
   9  *  Copyright (c) 2002  Alex Züpke <azu@sysgo.de>
  10  *  Copyright (c) 2002  Gary Jennejohn <garyj@denx.de>
  11  *  Copyright (c) 2003  Richard Woodruff <r-woodruff2@ti.com>
  12  *  Copyright (c) 2003  Kshitij  <kshitij@ti.com>
  13  *
  14  * See file CREDITS for list of people who contributed to this
  15  * project.
  16  *
  17  * This program is free software; you can redistribute it and/or
  18  * modify it under the terms of the GNU General Public License as
  19  * published by the Free Software Foundation; either version 2 of
  20  * the License, or (at your option) any later version.
  21  *
  22  * This program is distributed in the hope that it will be useful,
  23  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  24  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  25  * GNU General Public License for more details.
  26  *
  27  * You should have received a copy of the GNU General Public License
  28  * along with this program; if not, write to the Free Software
  29  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  30  * MA 02111-1307 USA
  31  */
  32
  33 #include <asm-offsets.h>
  34 #include <config.h>
  35 #include <version.h>
  36
  37 /*
  38  *************************************************************************
  39  *
  40  * Jump vector table as in table 3.1 in [1]
  41  *
  42  *************************************************************************
  43  */
  44
  45
  46 .globl _start
  47 _start: b       reset
  48         ldr     pc, _undefined_instruction
  49         ldr     pc, _software_interrupt
  50         ldr     pc, _prefetch_abort
  51         ldr     pc, _data_abort
  52         ldr     pc, _not_used
  53         ldr     pc, _irq
  54         ldr     pc, _fiq
  55
  56 _undefined_instruction: .word undefined_instruction
  57 _software_interrupt:    .word software_interrupt
  58 _prefetch_abort:        .word prefetch_abort
  59 _data_abort:            .word data_abort
  60 _not_used:              .word not_used
  61 _irq:                   .word irq
  62 _fiq:                   .word fiq
  63
  64         .balignl 16,0xdeadbeef
  65
  66
  67 /*
  68  *************************************************************************
  69  *
  70  * Startup Code (reset vector)
  71  *
  72  * do important init only if we don't start from memory!
  73  * setup Memory and board specific bits prior to relocation.
  74  * relocate armboot to ram
  75  * setup stack
  76  *
  77  *************************************************************************
  78  */
  79
  80 .globl _TEXT_BASE
  81 _TEXT_BASE:
  82 #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_TEXT_BASE)
  83         .word   CONFIG_SPL_TEXT_BASE
  84 #else
  85         .word   CONFIG_SYS_TEXT_BASE
  86 #endif
  87
  88 /*
  89  * These are defined in the board-specific linker script.
  90  * Subtracting _start from them lets the linker put their
  91  * relative position in the executable instead of leaving
  92  * them null.
  93  */
  94 .globl _bss_start_ofs
  95 _bss_start_ofs:
  96         .word __bss_start - _start
  97
  98 .globl _image_copy_end_ofs
  99 _image_copy_end_ofs:
 100         .word __image_copy_end - _start
 101
 102 .globl _bss_end_ofs
 103 _bss_end_ofs:
 104         .word __bss_end - _start
 105
 106 .globl _end_ofs
 107 _end_ofs:
 108         .word _end - _start
 109
 110 #ifdef CONFIG_USE_IRQ
 111 /* IRQ stack memory (calculated at run-time) */
 112 .globl IRQ_STACK_START
 113 IRQ_STACK_START:
 114         .word   0x0badc0de
 115
 116 /* IRQ stack memory (calculated at run-time) */
 117 .globl FIQ_STACK_START
 118 FIQ_STACK_START:
 119         .word 0x0badc0de
 120 #endif
 121
 122 /* IRQ stack memory (calculated at run-time) + 8 bytes */
 123 .globl IRQ_STACK_START_IN
 124 IRQ_STACK_START_IN:
 125         .word   0x0badc0de
 126
 127 /*
 128  * the actual reset code
 129  */
 130
 131 reset:
 132         /*
 133          * set the cpu to SVC32 mode
 134          */
 135         mrs     r0,cpsr
 136         bic     r0,r0,#0x1f
 137         orr     r0,r0,#0xd3
 138         msr     cpsr,r0
 139
 140         /*
 141          * Set up 925T mode
 142          */
 143         mov r1, #0x81               /* Set ARM925T configuration. */
 144         mcr p15, 0, r1, c15, c1, 0  /* Write ARM925T configuration register. */
 145
 146         /*
 147          * turn off the watchdog, unlock/diable sequence
 148          */
 149         mov  r1, #0xF5
 150         ldr  r0, =WDTIM_MODE
 151         strh r1, [r0]
 152         mov  r1, #0xA0
 153         strh r1, [r0]
 154
 155         /*
 156          * mask all IRQs by setting all bits in the INTMR - default
 157          */
 158         mov r1, #0xffffffff
 159         ldr r0, =REG_IHL1_MIR
 160         str r1, [r0]
 161         ldr r0, =REG_IHL2_MIR
 162         str r1, [r0]
 163
 164         /*
 165          * wait for dpll to lock
 166          */
 167         ldr  r0, =CK_DPLL1
 168         mov  r1, #0x10
 169         strh r1, [r0]
 170 poll1:
 171         ldrh r1, [r0]
 172         ands r1, r1, #0x01
 173         beq poll1
 174
 175         /*
 176          * we do sys-critical inits only at reboot,
 177          * not when booting from ram!
 178          */
 179 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
 180         bl  cpu_init_crit
 181 #endif
 182
 183         bl      _main
 184
 185 /*------------------------------------------------------------------------------*/
 186
 187 /*
 188  * void relocate_code(addr_moni)
 189  *
 190  * This function relocates the monitor code.
 191  */
 192         .globl  relocate_code
 193 relocate_code:
 194         mov     r6, r0  /* save addr of destination */
 195
 196         adr     r0, _start
 197         subs    r9, r6, r0              /* r9 <- relocation offset */
 198         beq     relocate_done           /* skip relocation */
 199         mov     r1, r6                  /* r1 <- scratch for copy_loop */
 200         ldr     r3, _image_copy_end_ofs
 201         add     r2, r0, r3              /* r2 <- source end address         */
 202
 203 copy_loop:
 204         ldmia   r0!, {r10-r11}          /* copy from source address [r0]    */
 205         stmia   r1!, {r10-r11}          /* copy to   target address [r1]    */
 206         cmp     r0, r2                  /* until source end address [r2]    */
 207         blo     copy_loop
 208
 209 #ifndef CONFIG_SPL_BUILD
 210         /*
 211          * fix .rel.dyn relocations
 212          */
 213         ldr     r0, _TEXT_BASE          /* r0 <- Text base */
 214         ldr     r10, _dynsym_start_ofs  /* r10 <- sym table ofs */
 215         add     r10, r10, r0            /* r10 <- sym table in FLASH */
 216         ldr     r2, _rel_dyn_start_ofs  /* r2 <- rel dyn start ofs */
 217         add     r2, r2, r0              /* r2 <- rel dyn start in FLASH */
 218         ldr     r3, _rel_dyn_end_ofs    /* r3 <- rel dyn end ofs */
 219         add     r3, r3, r0              /* r3 <- rel dyn end in FLASH */
 220 fixloop:
 221         ldr     r0, [r2]                /* r0 <- location to fix up, IN FLASH! */
 222         add     r0, r0, r9              /* r0 <- location to fix up in RAM */
 223         ldr     r1, [r2, #4]
 224         and     r7, r1, #0xff
 225         cmp     r7, #23                 /* relative fixup? */
 226         beq     fixrel
 227         cmp     r7, #2                  /* absolute fixup? */
 228         beq     fixabs
 229         /* ignore unknown type of fixup */
 230         b       fixnext
 231 fixabs:
 232         /* absolute fix: set location to (offset) symbol value */
 233         mov     r1, r1, LSR #4          /* r1 <- symbol index in .dynsym */
 234         add     r1, r10, r1             /* r1 <- address of symbol in table */
 235         ldr     r1, [r1, #4]            /* r1 <- symbol value */
 236         add     r1, r1, r9              /* r1 <- relocated sym addr */
 237         b       fixnext
 238 fixrel:
 239         /* relative fix: increase location by offset */
 240         ldr     r1, [r0]
 241         add     r1, r1, r9
 242 fixnext:
 243         str     r1, [r0]
 244         add     r2, r2, #8              /* each rel.dyn entry is 8 bytes */
 245         cmp     r2, r3
 246         blo     fixloop
 247 #endif
 248
 249 relocate_done:
 250
 251         mov     pc, lr
 252
 253 _rel_dyn_start_ofs:
 254         .word __rel_dyn_start - _start
 255 _rel_dyn_end_ofs:
 256         .word __rel_dyn_end - _start
 257 _dynsym_start_ofs:
 258         .word __dynsym_start - _start
 259
 260         .globl  c_runtime_cpu_setup
 261 c_runtime_cpu_setup:
 262
 263         mov     pc, lr
 264
 265 /*
 266  *************************************************************************
 267  *
 268  * CPU_init_critical registers
 269  *
 270  * setup important registers
 271  * setup memory timing
 272  *
 273  *************************************************************************
 274  */
 275
 276
 277 cpu_init_crit:
 278         /*
 279          * flush v4 I/D caches
 280          */
 281         mov     r0, #0
 282         mcr     p15, 0, r0, c7, c7, 0   /* flush v3/v4 cache */
 283         mcr     p15, 0, r0, c8, c7, 0   /* flush v4 TLB */
 284
 285         /*
 286          * disable MMU stuff and caches
 287          */
 288         mrc     p15, 0, r0, c1, c0, 0
 289         bic     r0, r0, #0x00002300     @ clear bits 13, 9:8 (--V- --RS)
 290         bic     r0, r0, #0x00000087     @ clear bits 7, 2:0 (B--- -CAM)
 291         orr     r0, r0, #0x00000002     @ set bit 2 (A) Align
 292         orr     r0, r0, #0x00001000     @ set bit 12 (I) I-Cache
 293         mcr     p15, 0, r0, c1, c0, 0
 294
 295         /*
 296          * Go setup Memory and board specific bits prior to relocation.
 297          */
 298         mov     ip, lr          /* perserve link reg across call */
 299         bl      lowlevel_init   /* go setup pll,mux,memory */
 300         mov     lr, ip          /* restore link */
 301         mov     pc, lr          /* back to my caller */
 302 /*
 303  *************************************************************************
 304  *
 305  * Interrupt handling
 306  *
 307  *************************************************************************
 308  */
 309
 310 @
 311 @ IRQ stack frame.
 312 @
 313 #define S_FRAME_SIZE    72
 314
 315 #define S_OLD_R0        68
 316 #define S_PSR           64
 317 #define S_PC            60
 318 #define S_LR            56
 319 #define S_SP            52
 320
 321 #define S_IP            48
 322 #define S_FP            44
 323 #define S_R10           40
 324 #define S_R9            36
 325 #define S_R8            32
 326 #define S_R7            28
 327 #define S_R6            24
 328 #define S_R5            20
 329 #define S_R4            16
 330 #define S_R3            12
 331 #define S_R2            8
 332 #define S_R1            4
 333 #define S_R0            0
 334
 335 #define MODE_SVC 0x13
 336 #define I_BIT    0x80
 337
 338 /*
 339  * use bad_save_user_regs for abort/prefetch/undef/swi ...
 340  * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
 341  */
 342
 343         .macro  bad_save_user_regs
 344         sub     sp, sp, #S_FRAME_SIZE           @ carve out a frame on current user stack
 345         stmia   sp, {r0 - r12}                  @ Save user registers (now in svc mode) r0-r12
 346
 347         ldr     r2, IRQ_STACK_START_IN
 348         ldmia   r2, {r2 - r3}                   @ get values for "aborted" pc and cpsr (into parm regs)
 349         add     r0, sp, #S_FRAME_SIZE           @ grab pointer to old stack
 350
 351         add     r5, sp, #S_SP
 352         mov     r1, lr
 353         stmia   r5, {r0 - r3}                   @ save sp_SVC, lr_SVC, pc, cpsr
 354         mov     r0, sp                          @ save current stack into r0 (param register)
 355         .endm
 356
 357         .macro  irq_save_user_regs
 358         sub     sp, sp, #S_FRAME_SIZE
 359         stmia   sp, {r0 - r12}                  @ Calling r0-r12
 360         add     r8, sp, #S_PC                   @ !!!! R8 NEEDS to be saved !!!! a reserved stack spot would be good.
 361         stmdb   r8, {sp, lr}^                   @ Calling SP, LR
 362         str     lr, [r8, #0]                    @ Save calling PC
 363         mrs     r6, spsr
 364         str     r6, [r8, #4]                    @ Save CPSR
 365         str     r0, [r8, #8]                    @ Save OLD_R0
 366         mov     r0, sp
 367         .endm
 368
 369         .macro  irq_restore_user_regs
 370         ldmia   sp, {r0 - lr}^                  @ Calling r0 - lr
 371         mov     r0, r0
 372         ldr     lr, [sp, #S_PC]                 @ Get PC
 373         add     sp, sp, #S_FRAME_SIZE
 374         subs    pc, lr, #4                      @ return & move spsr_svc into cpsr
 375         .endm
 376
 377         .macro get_bad_stack
 378         ldr     r13, IRQ_STACK_START_IN
 379
 380         str     lr, [r13]                       @ save caller lr in position 0 of saved stack
 381         mrs     lr, spsr                        @ get the spsr
 382         str     lr, [r13, #4]                   @ save spsr in position 1 of saved stack
 383
 384         mov     r13, #MODE_SVC                  @ prepare SVC-Mode
 385         @ msr   spsr_c, r13
 386         msr     spsr, r13                       @ switch modes, make sure moves will execute
 387         mov     lr, pc                          @ capture return pc
 388         movs    pc, lr                          @ jump to next instruction & switch modes.
 389         .endm
 390
 391         .macro get_irq_stack                    @ setup IRQ stack
 392         ldr     sp, IRQ_STACK_START
 393         .endm
 394
 395         .macro get_fiq_stack                    @ setup FIQ stack
 396         ldr     sp, FIQ_STACK_START
 397         .endm
 398
 399 /*
 400  * exception handlers
 401  */
 402         .align  5
 403 undefined_instruction:
 404         get_bad_stack
 405         bad_save_user_regs
 406         bl      do_undefined_instruction
 407
 408         .align  5
 409 software_interrupt:
 410         get_bad_stack
 411         bad_save_user_regs
 412         bl      do_software_interrupt
 413
 414         .align  5
 415 prefetch_abort:
 416         get_bad_stack
 417         bad_save_user_regs
 418         bl      do_prefetch_abort
 419
 420         .align  5
 421 data_abort:
 422         get_bad_stack
 423         bad_save_user_regs
 424         bl      do_data_abort
 425
 426         .align  5
 427 not_used:
 428         get_bad_stack
 429         bad_save_user_regs
 430         bl      do_not_used
 431
 432 #ifdef CONFIG_USE_IRQ
 433
 434         .align  5
 435 irq:
 436         get_irq_stack
 437         irq_save_user_regs
 438         bl      do_irq
 439         irq_restore_user_regs
 440
 441         .align  5
 442 fiq:
 443         get_fiq_stack
 444         /* someone ought to write a more effiction fiq_save_user_regs */
 445         irq_save_user_regs
 446         bl      do_fiq
 447         irq_restore_user_regs
 448
 449 #else
 450
 451         .align  5
 452 irq:
 453         get_bad_stack
 454         bad_save_user_regs
 455         bl      do_irq
 456
 457         .align  5
 458 fiq:
 459         get_bad_stack
 460         bad_save_user_regs
 461         bl      do_fiq
 462
 463 #endif
 464
 465         .align  5
 466 .globl reset_cpu
 467 reset_cpu:
 468         ldr     r1, rstctl1     /* get clkm1 reset ctl */
 469         mov     r3, #0x3        /* dsp_en + arm_rst = global reset */
 470         strh    r3, [r1]        /* force reset */
 471         mov     r0, r0
 472 _loop_forever:
 473         b       _loop_forever
 474 rstctl1:
 475         .word   0xfffece10