arch/arm/cpu/arm926ejs/at91/at91sam9261_devices.c

   1 /*
   2  * (C) Copyright 2007-2008
   3  * Stelian Pop <stelian.pop@leadtechdesign.com>
   4  * Lead Tech Design <www.leadtechdesign.com>
   5  *
   6  * See file CREDITS for list of people who contributed to this
   7  * project.
   8  *
   9  * This program is free software; you can redistribute it and/or
  10  * modify it under the terms of the GNU General Public License as
  11  * published by the Free Software Foundation; either version 2 of
  12  * the License, or (at your option) any later version.
  13  *
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17  * GNU General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, write to the Free Software
  21  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  22  * MA 02111-1307 USA
  23  */
  24
  25 #include <common.h>
  26 #include <asm/io.h>
  27 #include <asm/arch/at91_common.h>
  28 #include <asm/arch/at91_pmc.h>
  29 #include <asm/arch/gpio.h>
  30
  31 /*
  32  * if CONFIG_AT91_GPIO_PULLUP ist set, keep pullups on on all
  33  * peripheral pins. Good to have if hardware is soldered optionally
  34  * or in case of SPI no slave is selected. Avoid lines to float
  35  * needlessly. Use a short local PUP define.
  36  *
  37  * Due to errata "TXD floats when CTS is inactive" pullups are always
  38  * on for TXD pins.
  39  */
  40 #ifdef CONFIG_AT91_GPIO_PULLUP
  41 # define PUP CONFIG_AT91_GPIO_PULLUP
  42 #else
  43 # define PUP 0
  44 #endif
  45
  46 void at91_serial0_hw_init(void)
  47 {
  48         at91_pmc_t      *pmc    = (at91_pmc_t *) ATMEL_BASE_PMC;
  49
  50         at91_set_a_periph(AT91_PIO_PORTC, 8, 1);                /* TXD0 */
  51         at91_set_a_periph(AT91_PIO_PORTC, 9, 0);                /* RXD0 */
  52         writel(1 << ATMEL_ID_USART0, &pmc->pcer);
  53 }
  54
  55 void at91_serial1_hw_init(void)
  56 {
  57         at91_pmc_t      *pmc    = (at91_pmc_t *) ATMEL_BASE_PMC;
  58
  59         at91_set_a_periph(AT91_PIO_PORTC, 12, 1);               /* TXD1 */
  60         at91_set_a_periph(AT91_PIO_PORTC, 13, 0);               /* RXD1 */
  61         writel(1 << ATMEL_ID_USART1, &pmc->pcer);
  62 }
  63
  64 void at91_serial2_hw_init(void)
  65 {
  66         at91_pmc_t      *pmc    = (at91_pmc_t *) ATMEL_BASE_PMC;
  67
  68         at91_set_a_periph(AT91_PIO_PORTC, 14, 1);               /* TXD2 */
  69         at91_set_a_periph(AT91_PIO_PORTC, 15, 0);               /* RXD2 */
  70         writel(1 << ATMEL_ID_USART2, &pmc->pcer);
  71 }
  72
  73 void at91_seriald_hw_init(void)
  74 {
  75         at91_pmc_t      *pmc    = (at91_pmc_t *) ATMEL_BASE_PMC;
  76
  77         at91_set_a_periph(AT91_PIO_PORTA, 9, 0);                /* DRXD */
  78         at91_set_a_periph(AT91_PIO_PORTA, 10, 1);               /* DTXD */
  79         writel(1 << ATMEL_ID_SYS, &pmc->pcer);
  80 }
  81
  82 #if defined(CONFIG_HAS_DATAFLASH) || defined(CONFIG_ATMEL_SPI)
  83 void at91_spi0_hw_init(unsigned long cs_mask)
  84 {
  85         at91_pmc_t      *pmc    = (at91_pmc_t *) ATMEL_BASE_PMC;
  86
  87         at91_set_a_periph(AT91_PIO_PORTA, 0, PUP);      /* SPI0_MISO */
  88         at91_set_a_periph(AT91_PIO_PORTA, 1, PUP);      /* SPI0_MOSI */
  89         at91_set_a_periph(AT91_PIO_PORTA, 2, PUP);      /* SPI0_SPCK */
  90
  91         /* Enable clock */
  92         writel(1 << ATMEL_ID_SPI0, &pmc->pcer);
  93
  94         if (cs_mask & (1 << 0)) {
  95                 at91_set_a_periph(AT91_PIO_PORTA, 3, 1);
  96         }
  97         if (cs_mask & (1 << 1)) {
  98                 at91_set_a_periph(AT91_PIO_PORTA, 4, 1);
  99         }
 100         if (cs_mask & (1 << 2)) {
 101                 at91_set_a_periph(AT91_PIO_PORTA, 5, 1);
 102         }
 103         if (cs_mask & (1 << 3)) {
 104                 at91_set_a_periph(AT91_PIO_PORTA, 6, 1);
 105         }
 106         if (cs_mask & (1 << 4)) {
 107                 at91_set_pio_output(AT91_PIO_PORTA, 3, 1);
 108         }
 109         if (cs_mask & (1 << 5)) {
 110                 at91_set_pio_output(AT91_PIO_PORTA, 4, 1);
 111         }
 112         if (cs_mask & (1 << 6)) {
 113                 at91_set_pio_output(AT91_PIO_PORTA, 5, 1);
 114         }
 115         if (cs_mask & (1 << 7)) {
 116                 at91_set_pio_output(AT91_PIO_PORTA, 6, 1);
 117         }
 118 }
 119
 120 void at91_spi1_hw_init(unsigned long cs_mask)
 121 {
 122         at91_pmc_t      *pmc    = (at91_pmc_t *) ATMEL_BASE_PMC;
 123
 124         at91_set_a_periph(AT91_PIO_PORTB, 30, PUP);     /* SPI1_MISO */
 125         at91_set_a_periph(AT91_PIO_PORTB, 31, PUP);     /* SPI1_MOSI */
 126         at91_set_a_periph(AT91_PIO_PORTB, 29, PUP);     /* SPI1_SPCK */
 127
 128         /* Enable clock */
 129         writel(1 << ATMEL_ID_SPI1, &pmc->pcer);
 130
 131         if (cs_mask & (1 << 0)) {
 132                 at91_set_a_periph(AT91_PIO_PORTB, 28, 1);
 133         }
 134         if (cs_mask & (1 << 1)) {
 135                 at91_set_b_periph(AT91_PIO_PORTA, 24, 1);
 136         }
 137         if (cs_mask & (1 << 2)) {
 138                 at91_set_b_periph(AT91_PIO_PORTA, 25, 1);
 139         }
 140         if (cs_mask & (1 << 3)) {
 141                 at91_set_a_periph(AT91_PIO_PORTA, 26, 1);
 142         }
 143         if (cs_mask & (1 << 4)) {
 144                 at91_set_pio_output(AT91_PIO_PORTB, 28, 1);
 145         }
 146         if (cs_mask & (1 << 5)) {
 147                 at91_set_pio_output(AT91_PIO_PORTA, 24, 1);
 148         }
 149         if (cs_mask & (1 << 6)) {
 150                 at91_set_pio_output(AT91_PIO_PORTA, 25, 1);
 151         }
 152         if (cs_mask & (1 << 7)) {
 153                 at91_set_pio_output(AT91_PIO_PORTA, 26, 1);
 154         }
 155 }
 156 #endif