arch/arm/cpu/arm926ejs/at91/at91sam9rl_devices.c

   1 /*
   2  * (C) Copyright 2007-2008
   3  * Stelian Pop <stelian@popies.net>
   4  * Lead Tech Design <www.leadtechdesign.com>
   5  *
   6  * SPDX-License-Identifier:     GPL-2.0+
   7  */
   8
   9 #include <common.h>
  10 #include <asm/io.h>
  11 #include <asm/arch/at91_common.h>
  12 #include <asm/arch/at91_pmc.h>
  13 #include <asm/arch/gpio.h>
  14
  15 /*
  16  * if CONFIG_AT91_GPIO_PULLUP ist set, keep pullups on on all
  17  * peripheral pins. Good to have if hardware is soldered optionally
  18  * or in case of SPI no slave is selected. Avoid lines to float
  19  * needlessly. Use a short local PUP define.
  20  *
  21  * Due to errata "TXD floats when CTS is inactive" pullups are always
  22  * on for TXD pins.
  23  */
  24 #ifdef CONFIG_AT91_GPIO_PULLUP
  25 # define PUP CONFIG_AT91_GPIO_PULLUP
  26 #else
  27 # define PUP 0
  28 #endif
  29
  30 void at91_serial0_hw_init(void)
  31 {
  32         at91_pmc_t      *pmc    = (at91_pmc_t *) ATMEL_BASE_PMC;
  33
  34         at91_set_a_periph(AT91_PIO_PORTA, 6, 1);                /* TXD0 */
  35         at91_set_a_periph(AT91_PIO_PORTA, 7, PUP);              /* RXD0 */
  36         writel(1 << ATMEL_ID_USART0, &pmc->pcer);
  37 }
  38
  39 void at91_serial1_hw_init(void)
  40 {
  41         at91_pmc_t      *pmc    = (at91_pmc_t *) ATMEL_BASE_PMC;
  42
  43         at91_set_a_periph(AT91_PIO_PORTA, 11, 1);               /* TXD1 */
  44         at91_set_a_periph(AT91_PIO_PORTA, 12, PUP);             /* RXD1 */
  45         writel(1 << ATMEL_ID_USART1, &pmc->pcer);
  46 }
  47
  48 void at91_serial2_hw_init(void)
  49 {
  50         at91_pmc_t      *pmc    = (at91_pmc_t *) ATMEL_BASE_PMC;
  51
  52         at91_set_a_periph(AT91_PIO_PORTA, 13, 1);               /* TXD2 */
  53         at91_set_a_periph(AT91_PIO_PORTA, 14, PUP);             /* RXD2 */
  54         writel(1 << ATMEL_ID_USART2, &pmc->pcer);
  55 }
  56
  57 void at91_seriald_hw_init(void)
  58 {
  59         at91_pmc_t      *pmc    = (at91_pmc_t *) ATMEL_BASE_PMC;
  60
  61         at91_set_a_periph(AT91_PIO_PORTA, 21, PUP);             /* DRXD */
  62         at91_set_a_periph(AT91_PIO_PORTA, 22, 1);               /* DTXD */
  63         writel(1 << ATMEL_ID_SYS, &pmc->pcer);
  64 }
  65
  66 #if defined(CONFIG_HAS_DATAFLASH) || defined(CONFIG_ATMEL_SPI)
  67 void at91_spi0_hw_init(unsigned long cs_mask)
  68 {
  69         at91_pmc_t      *pmc    = (at91_pmc_t *) ATMEL_BASE_PMC;
  70
  71         at91_set_a_periph(AT91_PIO_PORTA, 25, PUP);     /* SPI0_MISO */
  72         at91_set_a_periph(AT91_PIO_PORTA, 26, PUP);     /* SPI0_MOSI */
  73         at91_set_a_periph(AT91_PIO_PORTA, 27, PUP);     /* SPI0_SPCK */
  74
  75         /* Enable clock */
  76         writel(1 << ATMEL_ID_SPI, &pmc->pcer);
  77
  78         if (cs_mask & (1 << 0)) {
  79                 at91_set_a_periph(AT91_PIO_PORTA, 28, 1);
  80         }
  81         if (cs_mask & (1 << 1)) {
  82                 at91_set_b_periph(AT91_PIO_PORTB, 7, 1);
  83         }
  84         if (cs_mask & (1 << 2)) {
  85                 at91_set_a_periph(AT91_PIO_PORTD, 8, 1);
  86         }
  87         if (cs_mask & (1 << 3)) {
  88                 at91_set_b_periph(AT91_PIO_PORTD, 9, 1);
  89         }
  90         if (cs_mask & (1 << 4)) {
  91                 at91_set_pio_output(AT91_PIO_PORTA, 28, 1);
  92         }
  93         if (cs_mask & (1 << 5)) {
  94                 at91_set_pio_output(AT91_PIO_PORTB, 7, 1);
  95         }
  96         if (cs_mask & (1 << 6)) {
  97                 at91_set_pio_output(AT91_PIO_PORTD, 8, 1);
  98         }
  99         if (cs_mask & (1 << 7)) {
 100                 at91_set_pio_output(AT91_PIO_PORTD, 9, 1);
 101         }
 102 }
 103 #endif