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git.ipfire.org Git - people/ms/u-boot.git/blob - arch/arm/cpu/arm926ejs/at91/timer.c
2 * (C) Copyright 2007-2008
3 * Stelian Pop <stelian.pop@leadtechdesign.com>
4 * Lead Tech Design <www.leadtechdesign.com>
6 * See file CREDITS for list of people who contributed to this
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26 #include <asm/arch/hardware.h>
27 #include <asm/arch/at91_pit.h>
28 #include <asm/arch/at91_pmc.h>
29 #include <asm/arch/clk.h>
30 #include <asm/arch/io.h>
33 #if !defined(CONFIG_AT91FAMILY)
34 # error You need to define CONFIG_AT91FAMILY in your board config!
37 DECLARE_GLOBAL_DATA_PTR
;
40 * We're using the AT91CAP9/SAM9 PITC in 32 bit mode, by
41 * setting the 20 bit counter period to its maximum (0xfffff).
42 * (See the relevant data sheets to understand that this really works)
44 * We do also mimic the typical powerpc way of incrementing
45 * two 32 bit registers called tbl and tbu.
47 * Those registers increment at 1/16 the main clock rate.
50 #define TIMER_LOAD_VAL 0xfffff
52 static inline unsigned long long tick_to_time(unsigned long long tick
)
54 tick
*= CONFIG_SYS_HZ
;
55 do_div(tick
, gd
->timer_rate_hz
);
60 static inline unsigned long long usec_to_tick(unsigned long long usec
)
62 usec
*= gd
->timer_rate_hz
;
63 do_div(usec
, 1000000);
69 * Use the PITC in full 32 bit incrementing mode
73 at91_pmc_t
*pmc
= (at91_pmc_t
*) AT91_PMC_BASE
;
74 at91_pit_t
*pit
= (at91_pit_t
*) AT91_PIT_BASE
;
76 /* Enable PITC Clock */
77 writel(1 << AT91_ID_SYS
, &pmc
->pcer
);
80 writel(TIMER_LOAD_VAL
| AT91_PIT_MR_EN
, &pit
->mr
);
82 gd
->timer_rate_hz
= gd
->mck_rate_hz
/ 16;
83 gd
->tbu
= gd
->tbl
= 0;
89 * Get the current 64 bit timer tick count
91 unsigned long long get_ticks(void)
93 at91_pit_t
*pit
= (at91_pit_t
*) AT91_PIT_BASE
;
95 ulong now
= readl(&pit
->piir
);
97 /* increment tbu if tbl has rolled over */
101 return (((unsigned long long)gd
->tbu
) << 32) | gd
->tbl
;
104 void __udelay(unsigned long usec
)
106 unsigned long long tmp
;
109 tmo
= usec_to_tick(usec
);
110 tmp
= get_ticks() + tmo
; /* get current timestamp */
112 while (get_ticks() < tmp
) /* loop till event */
117 * reset_timer() and get_timer(base) are a pair of functions that are used by
118 * some timeout/sleep mechanisms in u-boot.
120 * reset_timer() marks the current time as epoch and
121 * get_timer(base) works relative to that epoch.
123 * The time is used in CONFIG_SYS_HZ units!
125 void reset_timer(void)
127 gd
->timer_reset_value
= get_ticks();
130 ulong
get_timer(ulong base
)
132 return tick_to_time(get_ticks() - gd
->timer_reset_value
) - base
;
136 * Return the number of timer ticks per second.
138 ulong
get_tbclk(void)
140 return gd
->timer_rate_hz
;